Abstract: A printed circuit board defines a groove used to engage with an electronic element. The groove defines a plurality of side walls. The PCB further defines a plurality of via holes at junctions between each two neighboring side walls. The via holes are communicate with the groove and have a C-shaped section. When the electronic element is received in the groove, the electronic element snugly engages with the plurality of side walls of the groove.

Abstract: A method of manufacturing circuit boards includes the steps of forming an upper board having an opening, and provided with a circuit and an insulating film layer formed on a surface thereof, forming a lower board provided with a circuit and an insulating film layer formed on a surface thereof, forming an inter-board connecting sheet having a through-hole filled with a conductive paste, and layering the lower board, the inter-board connecting sheet and the upper board together, and applying heat and pressure. The step of forming the lower board includes a step of forming the insulating film layer into a shape leaving a clearance provided between an end of the film layer and any of an end of the opening of the upper board and an end of an opening of the inter-board connecting sheet when these three items are layered together, and the step of applying heat and pressure includes a step of inserting a cushion member into the openings of the inter-board connecting sheet and the upper board and into the clearance.

Abstract: The invention provides a printed circuit board capable of mounting BGA or other IC package of narrow terminal interval by using through-holes of conventional size. On one principal surface of printed circuit board (1), soldering lands (2a), (2b), (2c), and (2d) for connecting solder balls are disposed in lattice. Central point (B) of through-hole (3) is set eccentric to the side of soldering land (2a) at the same potential as through-hole (3), remote from intersection (A) formed by diagonal line (200ab) linking soldering lands (2a) and (2b) and diagonal line (200cd) linking soldering lands (2c) and (2d).

Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.

Abstract: A wiring board has a first resin insulation layer, a first conductive pattern formed on the first resin insulation layer, a second resin insulation layer formed on the first conductive pattern and having an opening portion exposing at least a portion of the first conductive pattern, a second conductive pattern formed on the second resin insulation layer, and a via conductor formed in the opening portion of the second resin insulation layer and electrically connecting the first conductive pattern and the second conductive pattern. The via conductor has a side surface extending between the first conductive pattern and the second conductive pattern and a bent portion where an inclination of the side surface of the via conductor changes in a depth direction of the via conductor.

Abstract: Disclosed is a multi-layer via structure, comprising a metal layer, a first via metal layer formed on a first open of a first dielectric layer and a second via metal layer formed on a second open of a second dielectric layer. The first and second via metal layers comprise first and second bottoms, first and second top portions, first and second inclined walls, respectively. The first and second inclined walls comprise first and second top edges, first and second bottom edges respectively. The second top edge has a point closest to a geometric center of the first bottom. A vertical projection of the point falls on the first inclined wall. Alternatively, a point of the second bottom edge, which is closest to the geometric center, has a vertical projection. The vertical projection is vertical to the metal layer and falls on the first inclined wall.

Abstract: A multilayer wiring board capable of feeding sufficient electric power to a circuit element, such as an IC chip. In one embodiment of the present invention, a multilayer wiring board is comprised of: a core board; a build up layer disposed on an upper surface of the core board; a build up layer disposed on a lower surface of the core board; and a power supply structure embedded in a through hole penetrating the core board and the build up layers. The power supply structure is comprised of: a conductive metal rod made of copper as a main material; a conductive metal tube made of copper as a main material and provided coaxially with the conductive metal rod; and an insulating material filling a gap between the conductive metal rod and the conductive metal tube.

Abstract: An electrical signal connection, an electrical signaling system, and a method of connecting printed circuit boards. The electrical signal connection having a first conductive via and a second conductive via disposed in a first printed circuit board. A first conductive trace with a first end and a second end has the first end electrically coupled to the first conductive via at a first distance from the top surface of the first printed circuit board. The second end of the first conductive via is electrically coupled to the second printed circuit board. A second conductive trace with a first end and a second end has the first end being electrically coupled to the second conductive via at a second distance from the top surface of the first printed circuit board. The second end being is electrically coupled to the second printed circuit board.

Abstract: A printed circuit board includes a reference layer, at least one first hole defined in the reference layer and adjacent from a first pin in a first column of pins of an electronic component, and at least one second hole defined in the reference layer and adjacent from a second pin of the electronic component. The at least one second hole is defined in the reference layer and opposite to the at least one first hole. The second pin is in a neighboring second column of pins from the first column of pins. A diameter of the at least one first hole is greater than a diameter of the at least one second hole such that a difference in current flowing through the first pin and the second pin is reduced.

Abstract: An electromagnetic bandgap structure and a printed circuit board that have a mushroom type structure. The electromagnetic bandgap structure includes a first metal layer; a first dielectric layer, layer-built on the first metal layer; a mushroom type structure having a metal plate layer-built on the first dielectric layer and a via of which one end is connected to the metal plate; a second dielectric layer, layer-built on the metal plate and the first dielectric layer; and a second metal layer, layer-built on the second dielectric layer, wherein the other end of the via is placed in a hole formed on the first metal layer and is connected to the first metal layer through a metal line.

Abstract: The present invention provides a printed circuit board including: an insulating member having a through via hole; a circuit pattern disposed on the insulating member; a solder resist disposed on the insulating member while exposing a portion of the circuit pattern; a via plating pad connected to the circuit pattern, disposed inside the via hole, and covering a lower opening of the via hole along an inner wall of the via hole; and an external connection means having a center portion coinciding with a center portion of the via hole and disposed on the via plating pad, and a method of manufacturing the same.

Abstract: A wiring substrate includes a first insulating layer formed as an outermost layer on one surface side, and exhibiting a black color or a gray color, a first connection pad formed to expose from the first insulating layer, a second insulating layer formed as an outermost layer on another surface side, and exhibiting a black color or a gray color, and a second connection pad formed to expose from the second insulating layer, wherein a connection hole having a side wall surface formed like a curved surface is formed in the second insulating layer, and the second connection pad is exposed to a bottom part of the connection hole.

Abstract: A multilayer printed wiring board including a core substrate, a first conductor layer on a first surface of the substrate, a second conductor layer on a second surface of the substrate, a third conductor layer inside the substrate between the first and second conductor layers, a conductive post connecting the third conductor layer with the first and second conductor layers, a first conductor circuit on the first surface of the substrate, a second conductor circuit on the second surface of the substrate, and a through hole formed through the substrate and connecting the first and second conductor circuits. The through hole is not connected to the third conductor layer, the third conductor layer has thickness larger than thicknesses of the first and second conductor layers, each of the first, second and third conductor layers forms one of power supply and ground layers, and the through hole forms a signal line.

Abstract: A device includes an interposer including a substrate, and a first through-substrate via (TSV) penetrating through the substrate. A glass substrate is bonded to the interposer through a fusion bonding. The glass substrate includes a second TSV therein and electrically coupled to the first TSV.

Abstract: A laminated circuit board includes a first wiring board including a first land formed thereon; a second wiring board including a second land formed thereon; and a bonding layer interposed between the first wiring board and the second wiring board, wherein the bonding layer electrically connects the first land to the second land with a conductive material, wherein the bonding layer has a front-side layer, a rear-side layer, and a middle layer, and the middle layer has a higher viscosity than the front-side layer and the rear-side layer.

Abstract: A printed circuit board of the present disclosure includes a main body, a tin layer, and a solder mask. The main body defines a through hole configured for being connected to a grounding component. The tin layer is formed on a surface of the main body around the through hole. The tin layer contacts the grounding component. The solder mask is formed between a periphery of the through hole and the tin layer. The solder mask is configured to prevent tin cream of the tin layer from flowing into the through hole.

Abstract: An electrical power distribution unit (1) for an electrical system has a printed circuit board (200) with a punched grid (100) arranged thereon. An electrical component (300, 310) is arranged on the printed circuit board on a side of the punched grid (100). An electrical contact (350) of the electrical component projects through a passage opening in the printed circuit board. The punched grid is arranged between the electrical component and the printed circuit board, and an opening is formed in the punched grid in an area (130) around the electrical contact. The punched grid has a current infeed (110) which comprises a plurality of tongues (111, 112; 113). At least one of the tongues is bendable out of a plane of the punched grid in such a way that two of the tongues form a mutually adjacent common portion (115), which is electrically contactable by an electrical plug connector.

Abstract: A printed circuit board (200) includes at least one via (280) defined therein, the via has an upper cap (220) formed on a top surface of the PCB, and a lower cap (240) formed on a bottom surface of the PCB. A conductive hole (290) is defined in the PCB having a plated sidewall (230) plated on its inner surface, and a first clearance hole (271) is defined in a first inner layer (260) of the PCB around the sidewall. A first transmission line (210) defined on the top surface of the PCB is coupled to the upper cap, a first void (273) extending from a boundary of the first clearance hole being disposed along the layout direction of the first transmission line.

Abstract: A printed wiring board wiring board including a substrate having a first penetrating hole and multiple second penetrating holes formed around the first penetrating hole, a first conductive portion and a second conductive portion formed on one surface of the substrate, a third conductive portion and a fourth conductive portion formed on the opposite surface of the substrate, a first through-hole conductor formed in the first penetrating hole and connecting the first conductive portion and the third conductive portion, and multiple second through-hole conductors formed in the second penetrating holes and connecting the second conductive portion and the fourth conductive portion. The first through-hole conductor and the second through-hole conductors are made of conductive material filled in the first penetrating hole or the second penetrating holes.

Abstract: In accordance with a first embodiment, the present invention provides a circuit substrate comprising a first surface; a second surface; a first via having a first end near said first surface and a second end near said second surface; a second via having a first end near said first surface and a second end near said second surface; a first conductive element electrically coupling said first end of said first via and said first end of said second via; a second conductive element electrically coupling said second end of said first via and said second end of said second via; an input signal line coupled to said first via; and an output signal line coupled to said second via.

Abstract: The invention provides a high density package substrate and a method for fabricating the same. A double-sided copper clad laminate containing an upper copper foil and a lower copper foil is provided. A bottom pad is disposed on the lower copper foil, aligned to a predetermined position of a through hole. The through hole is formed by laser drilling through the upper copper foil and the substrate, but not through the bottom pad. A seed layer is formed conformally lining the through hole, and a metal layer is formed on the seed layer by plating to form a plated through hole (PTH).

Abstract: A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.

Abstract: A circuit board includes layers, a pair of vias filled with a conductive material and extending through the layers, first and second pairs of conductive signal paths, and holes extending at least partially through the layers and located between the pair of vias. The first pair of conductive paths is connected to the pair of vias within a first layer; the second pair of conductive paths is connected to the pair of vias within a second layer. The pair of vias has a pair of via stubs defined between the second layer and a bottom layer. A differential signal is to be transmitted between the first and second pairs of conductive signal paths via the pair of vias. The holes have a lower dielectric constant than the layers to increase a resonant frequency of the pair of via stubs beyond the frequency of the differential signal.

Abstract: A base insulating layer is formed on a suspension body. Read wiring patterns, write wiring patterns and a ground pattern are formed in parallel on the base insulating layer. A first cover insulating layer is formed on the base insulating layer to cover the read wiring patterns, the write wiring patterns and the ground pattern. A ground layer is formed in a region on the first cover insulating layer above the write wiring patterns. A second cover insulating layer is formed on the first cover insulating layer to cover the ground layer.

Abstract: A wiring board has a base substrate, a conductive pattern formed on the base substrate, an insulation layer formed on the conductive pattern and the base substrate and including a resin-impregnated inorganic cloth, a conductive pattern formed on the insulating layer, a via formed in the insulation layer and connecting the conductive pattern formed on the base substrate and the conductive pattern formed on the insulating layer, and a through-hole connected to the conductive pattern formed on the base substrate, penetrating through the base substrate and having a hole diameter in a range of 10 ?m to 150 ?m.

Abstract: Techniques are disclosed that can be used to interface a sensor circuit with readout circuitry. The techniques can be employed, for instance, with microchannel plate (MCP) based devices used in numerous sensing/detection applications, and are particularly suitable for applications where it is desirable to interface an MCP having a relatively large active area to a readout circuit having a relatively smaller active area. The interface effectively decouples anode geometry from readout circuit geometry and also may be configured with flexible anode pad geometry, which allows for compensation of optical blur variations as well as a very high fill factor. The interface can be made using standard semiconductor materials and photolithography techniques and can be configured with thermal expansion qualities that closely track or otherwise match that of the readout circuitry.

Abstract: The invention provides a supporting substrate and method for fabricating the same. The supporting substrate includes: a substrate; a first surface metal layer formed on the substrate, wherein the first surface metal layer has a first opening; a second surface metal layer formed on the substrate and disposed oppositely to the first surface metal layer, wherein the substrate has a through hole, and the through hole is formed along the first opening to expose the second surface metal layer; a protective layer formed on the first surface metal layer and the second surface metal layer, wherein the protective layer has a second opening which exposes the through hole; and a conductive bump formed in the through hole, the first opening and the second opening, wherein the conductive bump is electrically connected to the second surface metal layer.

Abstract: A method of fabricating a printed circuit board having a coaxial via is disclosed. The method includes assembling a plurality of layers configured in a stack so that the plurality of layers has a top signal layer and a bottom signal layer; forming a hollow via through the plurality of layers to connect GND layers in the printed circuit board, forming or inserting into the hollow via a conductor coated with non-conductive material, covering the top layer and bottom layer with dielectric and patterned signal layers, covering the top layer and bottom layer with a masking agent, plating the top layer and bottom layer with a conductive material that connects signal traces within via, and removing the masking agent from the top layer and bottom layer.

Abstract: An electrical component configured to engage a circuit board having a thru-hole. The thru-hole has a plated portion of conductive material that includes an outward facing contact pad. The component includes a housing having a mounting surface that is configured to be mounted to the circuit board. The component also includes an electrical contact that is coupled to the housing and projects away from the mounting surface. The contact is configured to engage the thru-hole of the circuit board. The contact includes an elongated body that extends along a contact axis to a leading end that is configured to be inserted into a passage of the plated portion. The contact also includes an engagement projection that extends away from the body and is biased against the contact pad to maintain an electrical connection.

Abstract: A wiring board including a first substrate having a penetrating hole penetrating through the first substrate, a built-up layer formed on one surface of the first substrate and including multiple interlayer resin insulation layers and wiring layers, the built-up layer having an opening portion communicated with the penetrating hole of the first substrate and opened to the outermost surface of the built-up layer, an interposer accommodated in the opening portion of the built-up layer and including a second substrate and a wiring layer formed on the second substrate, the wiring layer of the interposer including multiple conductive circuits for being connected to multiple semiconductor elements, and a filler filling the opening portion of the built-up layer such that the interposer is held in the opening portion of the built-up layer. The opening portion of the built-up layer has a tapered portion tapering toward the outermost surface of the built-up layer.

Abstract: Methods of backdrilling printed circuit boards (PCBs) to remove via stubs and related apparatuses. The method may include removing a via stub through a combination of backdrilling and chemical etching. The backdrilling may remove a masking layer from the via stub. Portions of an underlying layer may remain in the region of the via stub after the backdrilling is completed. The remaining portions of the underlying layer may be removed in a subsequent etching process thereby removing the via stub from the PCB. As the backdrilling step may be used for the limited purpose of removing the outer layer and portions of the underlying layer remaining in the via can be tolerated, the diameter of the backdrilling need not be as large as traditional backdrilling where all layers within the via must be ensured of being completely removed.

Abstract: A wiring board including a core insulation layer having a connection conductor formed in a hole of the core layer, and an interlayer insulation layer laminated on one side of the core layer. The conductor of the core layer includes plating filling the hole of the core layer. The interlayer layer has a connection conductor formed in a hole of the interlayer layer. The conductor of the interlayer layer includes plating filling the hole of the interlayer layer. The conductor of the interlayer layer is stacked on the conductor of the core insulation layer. The conductors of the core and interlayer layers have lands formed on the core and interlayer layers and including metal foils and plating on the foils. The foil of the land on the core layer has a thickness which is thicker than a thickness of the foil of the land on the interlayer layer.

Abstract: A control device has a base plate, a cover plate coupled to the base plate, a cavity formed between the base plate and the cover plate, a circuit carrier disposed in the cavity, and a conducting track carrier electrically coupled to the circuit carrier. The base plate has a continuous recess that is configured and arranged for feeding a casting compound into the cavity between the base plate and the cover plate. The casting compound is embodied to at least partly enclose the circuit carrier and/or the conducting track carrier in a vibration-damping manner.

Abstract: A method of producing substrate 3 having feedthrough electrodes for an inkjet head, including: a step of forming grooves in the substrate 1 in the same pitch as that of the inkjet head; a step of setting conductive member 101 in the grooves; a step of adhering covering substrate 2 onto substrate 1; a step of cutting adhered substrate 1 and covering substrate 2 in a direction perpendicular to that of the grooves in a predetermined width.

Abstract: A circuit board includes a substrate having an upper surface and a lower surface. The circuit board has signal vias extending at least partially through the substrate along signal via axes being configured to receive signal terminals and ground vias extending at least partially through the substrate along ground via axes being configured to receive ground terminals. The ground vias are arranged in a predetermined pattern around the signal vias to create a ground ring surrounding the corresponding signal via, wherein the ground vias are at least partially filled with a conductive material to create a ground column. Each ground column extends from a column top to a column bottom. A first subset of the ground columns extending to a first depth and a second subset of the ground columns extending to a second depth greater than the first depth.

Abstract: A die having a base formed of a first material is connected to a board having a base formed of a second material. An interposer having a coefficient of thermal expansion intermediate coefficients of thermal expansion of the first and second materials is positioned between the die and the board.

Abstract: A carrier assembly for an integrated circuit is disclosed. The assembly has a printed circuit board, a receiving zone for operatively locating the integrated circuit, and a matrix of island contacts surrounding the receiving zone. The matrix of island contacts is separated from the receiving zone by a passage and is in electrical contact with the PCB. The receiving zone electrically connects the integrated circuit to the island contacts.

Abstract: One or more customization layers can be added to a wiring substrate. The customization layers can provide customized electrical connections from electrical contacts of the base wiring substrate to electrical contacts at an outer surface of the customization layers, which can allow the contacts at the outer surface of the customization layers can be in a different pattern than the contacts at the surface of the base wiring substrate. The customization layers can comprise electrically insulating material, electrically conductive via structures through the insulating material, electrically conductive traces, electrically conductive jumpers electrically connecting two traces without contacting a trace disposed between the two traces, and/or other such elements.

Abstract: An interconnection system that includes a daughter card and backplane electrical connectors, each mounted to a printed circuit board at a connector footprint. The backplane connector has conductive elements with transition regions that allow the mating contact portions to be positioned on a uniform pitch while contact tail portions can be shaped to improve signal integrity or to provide a more compact and/or mechanically robust footprint. The conductive elements in both connectors are configured such that the contact tails of the ground conductors align from column to column, but the planar portions of the ground conductors in one column align with a pair of signal conductors in the other column, which improves mechanical and signal integrity. Mechanical integrity may be improved by forming the connector footprints with pads for the ground conductors that span multiple columns.

Abstract: A wiring board includes a substrate having first and second surfaces and a first penetrating hole through the substrate, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, an interlayer insulation layer on the substrate and the first or second circuit, and a third conductive circuit on the interlayer layer. The interlayer layer has a via conductor in the interlayer layer and connecting the third circuit and the second conductor. The substrate has a first through-hole conductor connecting the first and second circuits and on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor in the second hole. The via conductor is shifted from the center of the second conductor in the direction parallel to the first surface of the substrate.

Abstract: A method and a structure for a coaxial via that extend along the entire length of a signal via in a printed circuit board. Signal integrity is improved by providing ground shield for the entire length of the coaxial via. The ground shielding can be implemented by either providing ground cage vias around a signal via and routing a trace to the signal via on a built up layer or by providing a semi circle ground trench through a build up layer to permit a trace access to the signal via.

Abstract: To provide more compact dimensions of a via structure formed by signal via pairs and ground vias in multilayer substrate. A multilayer substrate is provided such that the multilayer substrate comprising a high-isolated via cell wherein the high-isolated via cell comprises: two signal via pairs; a shield structure around two signal via pairs consisting of ground vias and ground strips connected to ground vias wherein the shield structure is formed symmetrically in respect to two via pairs to reduce the transformation between mixed modes and also leakage from two signal via pairs; a clearance hole separating signal via pairs from other conductive parts of the multilayer substrate and having predetermined dimensions to provide broadband operation of the high-isolated via cell; and the separating strip disposed symmetrically between said signal via pairs to provide crosstalk reduction between two signal via pairs and common mode decrease.

Abstract: A substrate for a display device is disclosed which enables further reduction in area of a frame region and a display device comprising the substrate.

Abstract: There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.

Abstract: A printed circuit board and a manufacturing method thereof are disclosed. The method in accordance with an embodiment of the present invention includes: providing a substrate on which a first insulation layer, a first circuit pattern, a second insulation layer and a resin layer are successively laminated; boring a through-hole penetrating the substrate; forming roughness on the resin layer by a desmear process; forming a via making an electrical connection between layers through the through-hole; and forming a second circuit pattern on the resin layer having roughness formed thereon.

Abstract: One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the (PCB), and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.

Abstract: A unit cell (106) of a structure (100) has a plurality of first conductors (2), a second conductor (1), a third conductor (3), and a plurality of connective conductors (4). The first conductors (2) are located in a first layer (20), and are separated from each other. The second conductor (1) is located in a second layer (10) which is different from the first layer (20), and is provided so as to have at least a part thereof fallen in a region opposed to the plurality of first conductors (2). The third conductor (3) is located in a third layer (30) located opposite to the second layer (10) while placing the first layer (20) in between, and are opposed to every adjacent ones of the plurality of first conductors (2). The connective conductors (4) respectively connect the third conductors (3) with the plurality of first conductors (2) which overlap the third conductors (3) in a plan view.

Abstract: A method of fabricating a multi-trace via substrate is disclosed. A substrate at least having a first surface and a hole is provided, wherein the hole has a hole wall. A first conductive layer is formed on the entire surface of the substrate and the hole wall. A photoresist layer applied over the entire surface of the first conductive layer is selectively patterned to define a plurality of laterally separated regions on the first conductive layer. A patterned photoresist layer is used as a mask and a second conductive layer substantially thicker than the first conductive layer is electroplated on the laterally separated regions. The patterned photoresist layer is removed. The portion of the first conductive layer not covered by the second conductive layer is substantially removed to form a plurality of laterally separated traces extended on the first surface and through the hole.

Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.

Abstract: A multilayer wiring board has a structure in which vias are formed on an inner wiring layer in directions toward both surfaces of the inner wiring layer, respectively, and lands are each defined in the inner wiring layer at a position to be connected to one of the vias, each of the lands having a side surface formed in a tapered shape. The lands include first lands and second lands, and the vias include a via connected to a surface on a smaller diameter side of the first land, and a via connected only to a surface on a larger diameter side of the second land. The size of the surface of the larger diameter side of the second land is equal to the size of the surface of the smaller diameter side of the first land.