Abstract: A light sensor having a light conversion element between first and second electrodes is disclosed. The light conversion element includes a body of semiconductor material having first and second surfaces. The body of semiconductor material is of a first conductivity type and has doping elements in a concentration gradient that creates a first electrostatic field having a magnitude that varies monotonically from the first surface to the second surface. A bias circuit applies a variable potential between the first and second electrodes to create a second electrostatic field having a direction opposite to that of the first electrostatic field and a magnitude determined by the potential. One of the electrodes is transparent to light in a predetermined band of wavelengths. The body of semiconductor material can include an epitaxial body having a monotonically increasing concentration of a doping element as a function of the distance from one the surfaces.

Abstract: The reduction in size, noise and voltage is realized in a MOS solid-state imaging device. A gate electrode in a pixel part is formed in a two-level structure. An amplifier gate of an amplifier transistor is formed in the first level while a select gate of a select transistor is formed in the second level. The both are structurally partly overlapped. With the first-level amplifier gate as self-alignment, ions are implanted for a select gate in the second level. Although the gate electrode if formed in one level as in the conventional requires a space of nearly a design rule between the amplifier gate and the select gate, the structure of the invention can eliminate such a dead space. Meanwhile, because the diffusion layer does not exist between the amplifier gate and the select gate, the diffusion layer is eliminated of sheet resistance and voltage drop.

Abstract: An imager having gates with spacers formed of a high dielectric material. The high dielectric spacer provides larger fringing fields for charge transfer and improves image lag and charge transfer efficiency.

Abstract: It is an object of the present invention to provide a volatile semiconductor device into which data can be additionally written and which is easy to manufacture, and a method for manufacturing the same. It is a feature of the present invention that a semiconductor device includes an element formation layer including a first transistor and a second transistor which are provided over a substrate; a memory element provided over the element formation layer; and a sensor portion provided above the memory element, wherein the memory element has a layered structure including a first conductive layer, and an organic compound layer, and a second conductive layer, the first conductive layer is electrically connected to the first transistor, and the sensor portion is electrically connected to the second transistor.

Abstract: A pixel structure of a solid-state image sensor in which residual electrons in a photodiode is reduced and which has a first-stage gate that is arranged adjacent to the photodiode and controls read-out of electrons generated in the photodiode, a second-stage gate that is adjacent to the first-stage gate on the rear stage of the gate at a predetermined gap and controls movement of electrons read out by the readout control of the first-stage gate to the plurality of the charge-storage sections, and a plurality of third-stage gates that are adjacent to the second-stage gate on the rear stage of the gate at a predetermined gap, severally arranged corresponding to the plurality of the charge-storage sections, and perform control of distributing the electrons moved by the movement control of the second-stage gate severally to the plurality of the charge-storage sections, and gradient on which electrons are moved in the first-stage gate direction is formed on the potential of the photodiode.

Abstract: Example embodiments relate to an image sensor and a fabrication method thereof. An image sensor may include a semiconductor substrate. A charge transfer structure may be formed on the semiconductor substrate. The charge transfer structure may include a gate insulating film that may be formed on a channel region in the semiconductor substrate between a photoelectric conversion region and charge detection region, and a transfer gate electrode that may be formed on the gate insulating film that may have a region doped with a first conductivity type impurity-doped region and a second conductivity type impurity-doped region which may be adjacent to each other.

Abstract: An image sensor includes: a light source that irradiates a light on an object; a lens body that converges a reflection of the light from the object; a plurality of IC chips that receive the reflection passed through the lens body; and a transparent member provided between the IC chips and the lens body. The transparent member includes a refractive index changing region provided at a portion opposite to a gap between adjacent IC chips. A refractive index in the refractive index changing region increases continuously or stepwise toward an inner portion of the transparent member from a surface of the transparent member on an IC chips side so that the refractive index changing region refracts a part of the reflection to be incident into the gap to the IC chips.

Abstract: A pixel cell including a substrate having a top surface. A photo-conversion device is at a surface of the substrate and a trench is in the substrate adjacent the photo-conversion device. The trench has sidewalls and a bottom. At least one sidewall is angled less than approximately 85 degrees from the plane of the top surface of the substrate.

Abstract: A solid image pick-up element comprises: a photoelectric converting portion; a charge transmitting portion comprising a charge transmitting electrode that transmits a charge generated by the photoelectric converting portion; and a peripheral circuit portion connected to the charge transmitting portion, wherein a surface level of a field oxide film provided at the peripheral circuit portion and the charge transmitting portion to surround an effective image pick-up region of the photoelectric converting portion is to a degree the same as a surface level of the photoelectric converting portion.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract: A photoelectric conversion device according to the present invention has a plurality of photoreceiving portions provided in a substrate, an interlayer film overlying the photoreceiving portion, a large refractive index region which is provided so as to correspond to the photoreceiving portion and has a higher refractive index than the interlayer film, and a layer which is provided in between the photoreceiving portion and the large refractive index region, and has a lower etching rate than the interlayer film, wherein the layer of the lower etching rate is formed so as to cover at least the whole surface of the photoreceiving portion. In addition, the layer of the lower etching rate has a refractive index in between the refractive indices of the large refractive index region and the substrate. Such a configuration can provide the photoelectric conversion device which inhibits the lowering of the sensitivity and the variation of the sensitivity among picture elements.

Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.

Abstract: A solid-state imaging device includes an N-type semiconductor substrate, an N-type impurity region provided in the surficial portion of the N-type semiconductor substrate, a photo-electric conversion unit formed in the N-type impurity region, a charge accumulation unit formed in the N-type impurity region so as to contact with the photo-electric conversion unit, and temporarily accumulating charge generated in the photo-electric conversion unit, a charge hold region (barrier unit) formed in the N-type impurity region so as to contact with the charge accumulation unit, and allowing the charge accumulation unit to accumulate the charge, and a charge accumulating electrode provided to the charge accumulation unit. The charge accumulation unit and the charge hold region are formed to be N?-type.

Abstract: A novel CMOS image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate having an upper surface, a gate comprising a dielectric layer formed on the substrate and a gate conductor formed on the gate dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. A portion of the bottom of the gate conductor is recessed below the surface of the substrate.

Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).

Abstract: A CMOS solid-state imaging device configured to restrain the occurrence of white spots and dark current caused by pixel defects, and also to increase the saturation signal amount. Adjacent pixels are separated by an element isolation portion formed of a diffusion layer and an insulating layer thereon, and the insulating layer of the element isolation portion is formed in a position equal to or shallower than the position of a pn junction on the side of an accumulation layer of a photoelectric conversion portion 38 constituting a pixel.

Abstract: The present invention provides a back illuminated photodetector having a sufficiently small package as well as being capable of suppressing the scattering of to-be-detected light and method for manufacturing the same. A back illuminated photodiode 1 comprises an N-type semiconductor substrate 10, a P+-type impurity semiconductor region 11, a recessed portion 12, and a window plate 13. In the surface layer on the upper surface S1 side of the N-type semiconductor substrate 10 is formed the P+-type impurity semiconductor region 11. In the rear surface S2 of the N-type semiconductor substrate 10 and in an area opposite the P+-type impurity semiconductor region 11 is formed the recessed portion 12 that functions as an incident part for to-be-detected light. Also, the window plate 13 is bonded to the outer edge portion 14 of the recessed portion 12. The window plate 13 covers the recessed portion 12 and seals the rear surface S2 of the N-type semiconductor substrate 10.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein, and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. Wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: A forward light monitoring photodiode having a high reflection film with low dark current for detecting forward light emitted from a laser diode and power of the laser diode in spite of the change of temperatures or yearly degradation. The high reflection film is made by depositing an SiON layer upon an InP window layer or an InP substrate by a plasma CVD method. Al2O3/Si reciprocal layers or Al2O3/TiO2 reciprocal layers are produced upon the SiON layer. The high reflection film reflects 80%-90% of a 45 degree inclination incidence beam and allows 20%-10% of the incidence beam to pass the film and arrive at the InP window or substrate.

Abstract: A solid-state imaging device includes: a plurality of light-receiving parts arranged in an array in a substrate and performing photoelectric conversion on incident light; and a plurality of color separators each provided for adjacent four of the light-receiving parts arranged in two rows and two columns. In each of the color separators, absorption color filters and transmission color filters are combined.

Abstract: A semiconductor range-finding element and a solid-state imaging device, which can provide a smaller dark current and a removal of reset noise. With n-type buried charge-generation region, buried charge-transfer regions, buried charge read-out regions buried in a surface of p-type semiconductor layer, an insulating film covering these regions, transfer gate electrodes arranged on the insulating film for transferring the signal charges to the buried charge-transfer regions, read-out gate electrodes arranged on the insulating film for transferring the signal charges to the buried charge read-out regions, after receiving a light pulse by the buried charge-generation region, in the semiconductor layer just under the buried charge-generation region, an optical signal is converted into signal charges, and a distance from a target sample is determined by a distribution ratio of the signal charges accumulated in the buried charge-transfer regions.

Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.

Abstract: A two-dimensional, temporally modulated electromagnetic wavefield, preferably in the ultraviolet, visible or infrared spectral range, can be locally detected and demodulated with one or more sensing elements. Each sensing element consists of a resistive, transparent electrode (E) on top of an insulated layer (O) that is produced over a semiconducting substrate whose surface is electrically kept in depletion. The electrode (E) is connected with two or more contacts (C1; C2) to a number of clock voltages that are operated synchronously with the frequency of the modulated wavefield. In the electrode and in the semiconducting substrate lateral electric fields are created that separate and transport photogenerated charge pairs in the semiconductor to respective diffusions (D1; D2) close to the contacts (C1; C2).

Abstract: A solid-state imaging device having an arrangement in which well contact is achieved for each pixel is provided. In the solid-state imaging device, a well contact part is formed in an activation region of a photoelectric conversion portion. The well contact part fixes a well in which the photoelectric conversion portion and transistors of the pixel are provided at a predetermined potential.

Abstract: A solid-state imaging device is provided and includes: a semiconductor substrate; a plurality of photoelectric conversion films stacked above the semiconductor layer and absorbing different wavelength regions of light; and a transmission-blocking film at least one between the plurality of photoelectric conversion films, the transmission-blocking film blocking a transmission of a particular region of light, the particular region of light having a wavelength in a region to be absorbed in a photoelectric conversion film located above and nearest to the transmission-blocking film.

Abstract: A two-branch outputting solid-state imaging device is provided and includes: two output amplifiers including a first output amplifier and a second output amplifier, each outputting a voltage signal in accordance with the signal charge transferred toward the output end through the charge transfer path; and a branching part that distributes the signal charge transferred through the charge transfer path toward the first output amplifier in a case the signal charge corresponds to the first signal charge, toward the second output amplifier in a case the signal charge corresponds to the second signal charge, and toward the first output amplifier in a case the signal charge corresponds to the third signal charge.

Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.

Abstract: A solid-state imaging device includes: a substrate; a photo-receiving portion formed in the substrate; a wiring layer formed on the substrate and having a trench being formed on a region directly above the photo-receiving portion; and a light guiding member provided in the trench and made of organic material. An empty space is formed between a side wall of the trench and a side surface of the light guiding member. The side surface of the light guiding member is curved so that a central part of the side surface along a vertical direction is closer to a center axis of the trench than both end parts of the side surface along the vertical direction.

Abstract: A solid-state element has: a semiconductor layer formed on a substrate, the semiconductor layer having a first layer that corresponds to an emission area of the solid-state element to and a second layer through which current is supplied to the first layer; a light discharge surface through which light emitted from the first layer is externally discharged, the light discharge surface being located on the side of the substrate; and an electrode having a plurality of regions that are of a conductive material and are in ohmic-contact with the second layer.

Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.

Abstract: The invention relates to a substrate for epitaxy, especially for preparation of nitride semiconductor layers. Invention covers a bulk nitride mono-crystal characterized in that it is a mono-crystal of gallium nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium nitride has a surface area greater than 100 mm2, it is more than 1,0 ?m thick and its C-plane surface dislocation density is less than 106/cm2, while its volume is sufficient to produce at least one further-processable non-polar A-plane or M-plane plate having a surface area at least 100 mm2. More generally, the present invention covers a bulk nitride mono-crystal which is characterized in that it is a mono-crystal of gallium-containing nitride and its cross-section in a plane perpendicular to c-axis of hexagonal lattice of gallium-containing nitride has a surface area greater than 100 mm2, it is more 1,0-?m thick and its surface dislocation density is less than 106/cm2.

Abstract: In the solid-state imaging device of the present invention having a photoelectric conversion section and a charge transfer section equipped with a charge transfer electrode for transferring an electric charge generated in the photoelectric conversion section, the charge transfer electrode has an alternate arrangement of a first layer electrode including a first layer electrically conducting film and a second layer electrode including a second layer electrically conducting film, which are formed on a gate oxide film including a laminate film consisting of a silicon oxide film and a metal oxide thin film, and the first layer electrode and the second layer electrode are separated by insulation with an interelectrode insulating film including a sidewall insulating film formed by a CVD process to cover the lateral wall of the first layer electrode.

Abstract: A semiconductor device includes a transfer channel for transferring charge generated by photoelectric conversion, an insulating film formed on the transfer channel, and a transfer electrode for applying a transfer voltage to the transfer channel via the insulating film. The insulating film has a first thickness and a second thickness that is thinner than the first thickness. The insulating film has the first thickness below both ends of the transfer electrode in a width direction of the transfer channel that is orthogonal to a charge transfer direction through the transfer channel, and the insulating film has the second thickness on a part including a center of the transfer channel in the width direction.

Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.

Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.

Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.

Abstract: An image sensor device includes a semiconductor substrate having a first type of conductivity, a semiconductor layer having the first type of conductivity formed on the semiconductor substrate, and pixels formed in the semiconductor layer. The semiconductor layer includes a first deep well having the first type of conductivity and substantially underlying the plurality of pixels, and a second deep well having a second type of conductivity different from the first type of conductivity and substantially underlying the first deep well.

Abstract: A solid-state image pick-up unit comprises: a semiconductor substrate comprising an area in which a photoelectric converting portion is formed; and an electric charge transfer portion that transfers an electric charge formed by the photoelectric converting portion, wherein the electric charge transfer portion comprises: an electric charge transfer electrode including a first layer electrode and a second layer electrode; and a gate oxide film, the gate oxide film comprises a second gate oxide film formed under the second layer electrode, the second gate oxide film comprising an ONO film which comprises a SiO film, a SiN film and a SiO film in this order, and the second gate oxide film is continuously formed to cover whole of a region between the first layer electrode and the second layer electrode and a region under the second layer electrode.

Abstract: A CMOS image sensor (CIS) device includes an array of pixels, each pixel including a sensing element (e.g., a photodiode) and access circuitry. To facilitate the passage of light to the photodiode, each pixel includes a via wave guide (VWG) defined in the metallization layer formed over the pixel's photodiode. The VWG includes an upper light concentrator having a curved (e.g., parabolic) surface extending from a relatively wide upper opening to a relatively small lower opening. The VWG also includes a lower section extending between the lower opening of the light concentrator and the associated photodiode. A mirror coating is optionally formed on the surface of the VWG. An optional light-guiding material and/or color filter materials are disposed inside the VWG. An optional microlens is formed over the VWG.

Abstract: The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a photosensor and providing an electrical connection to pixel circuitry, and the method of making the same.

Abstract: An imaging device includes a first electrode for generating an electric field storing signal charges, a charge multiplication section for multiplying the stored signal charges, a second electrode for generating the electric field in the charge multiplication section, a voltage conversion portion for converting the signal charges into a voltage, a third electrode for transferring the signal charges to the voltage conversion portion, provided between the first electrode and the voltage conversion portion, wherein the second electrode is provided on a side opposite to the third electrode and the voltage conversion portion with respect to the first electrode.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract: PROBLEM To provide a high quality solid state image pickup device. SOLUTION Impurities are implanted into a semiconductor substrate to form vertical transfer channels for transferring electric charges in a first direction and to form a drain near each of the vertical transfer channels via a gate which forms a barrier. A first silicon oxide film, a silicon nitride film and a second silicon oxide film are deposited in this order from the bottom, on the surfaces of the vertical transfer channels, gates and drains. A first layer vertical transfer electrode is formed on the second silicon oxide film above the vertical transfer channel, and an insulating film if formed on the surface of the first layer vertical transfer electrode. The second silicon oxide film and silicon nitride film are etched in such a manner that the silicon nitride film covers the vertical transfer channel and extends above the gate excepting a portion near the drain.

Abstract: A solid-state imaging device includes a two-dimensional array of photosensor sections on a semiconductor substrate, and a vertical transfer section including two-layer vertical transfer electrodes. The photosensor sections store signal charges generated by photoelectric conversion. The vertical transfer section reads signal charges from the photosensor sections and vertically transfers the read signal charges. The two-layer vertical transfer electrodes have first transfer electrode layers and second transfer electrode layers, and the first transfer electrode layers serve as read electrodes for reading the signal charges from the photosensor sections. The first transfer electrode layers have a larger electrode width with respect to the photosensor sections than the second transfer electrode layers.

Abstract: A microcrystalline germanium image sensor array. The array includes a number of pixel circuits fabricated in or on a substrate. Each pixel circuit comprises a charge collecting electrode for collecting electrical charges and a readout means for reading out the charges collected by the charge collecting electrode. A photodiode layer of charge generating material located above the pixel circuits convert electromagnetic radiation into electrical charges. This photodiode layer includes microcrystalline germanium and defines at least an n-layer, and i-layer and a p-layer. The sensor array also includes and a surface electrode in the form of a grid or thin transparent layer located above the layer of charge generating material. The sensor is especially useful for imaging in visible and near infrared spectral regions of the electromagnetic spectrum and provides imaging with starlight illumination.

Abstract: CMOS and CCD imaging devices comprising different in-pixel capacitors and peripheral capacitors and methods of formation are disclosed. The capacitors used in periphery circuits have different requirements from the capacitors used in the pixel itself. Dual stack capacitors comprising two dielectric layers may be provided to achieve low leakage and high capacitance. A single masking step may be provided such that one region has a dual dielectric capacitor and a second region has a single dielectric capacitor. A different dielectric may also be provided in one region compared to another region wherein the inter-electrode insulator comprises a single dielectric in both regions.

Abstract: In an element for a MOS type solid-state imaging device, a leakage current caused by a stress generated in a vicinity of an element isolation region having an STI structure is reduced. The element for the MOS type solid-state imaging device comprises: a signal accumulation region 102, of a second conductivity type, provided in an interior of a semiconductor substrate or well 101 of a first conductivity type, for accumulating a signal charge generated by performing photoelectric convention; agate electrode 104 provided on the semiconductor substrate or well 101; a drain region 105, of a second conductivity type, provided on a surface portion, of the semiconductor substrate or well 101, on which the gate electrode is formed; and an element isolation region 201 provided on the surface portion, of the semiconductor substrate or well 101, on which the gate electrode is formed. The element isolation region 201 has the STI structure, and a cavity 202 is formed in an interior of the element isolation region 201.

Abstract: In a charge transfer device which has many two-layered transfer electrodes, 8L disposed along a charge transfer direction X above a transfer channel is driven with two-phase driving pulses supplied to the transfer electrodes of the second layer, the transfer channel below the last-stage transfer electrode disposed at the last stage of the charge transfer direction X is constructed to have three-step potential, and the potential is set to be stepwise deeper from the upstream side to the downstream side in the charge transfer direction X.

Abstract: Provided are an electroluminescence (EL) device and corresponding method for forming a rare earth element-doped silicon (Si)/Si dioxide (SiO2) lattice structure. The method comprises: providing a substrate; DC sputtering a layer of amorphous Si overlying the substrate; DC sputtering a rare earth element; in response, doping the Si layer with the rare earth element; DC sputtering a layer of SiO2 overlying the rare earth-doped Si; forming a lattice structure; annealing; and, in response to the annealing, forming nanocrystals in the rare-earth doped Si having a grain size in the range of 1 to 5 nanometers (nm). In one aspect, the rare earth element and Si are co-DC sputtered. Typically, the steps of DC sputtering Si, DC sputtering the rare earth element, and DC sputtering the SiO2 are repeated 5 to 60 cycles, so that the lattice structure includes the plurality (5-60) of alternating SiO2 and rare earth element-doped Si layers.

Abstract: A solid state image pickup device comprising: a semiconductor substrate having a surface layer; charge storage regions disposed in the surface layer; vertical channels disposed in the surface layer adjacent to respective columns of the charge storage regions; vertical transfer electrodes formed above the semiconductor substrate, crossing the vertical channels; a horizontal channel disposed in the surface layer coupled to the vertical channels, having a first portion with transfer stages, each including a barrier region and a well region, and a second portion constituting a gate region with gradually decreasing width, and including an upstream region and a downstream region of different effective impurity concentration, establishing a built-in potential; horizontal transfer electrodes disposed above respective transfer stages of the horizontal channel; an output gate electrode disposed above the gate region; a floating diffusion region disposed in the surface layer coupled to the gate region of the horizontal