With Specified Semiconductor Materials Patents (Class 257/22)
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Patent number: 6858864Abstract: A photonic device includes a silicon semiconductor based superlattice. The superlattice has a plurality of layers that form a plurality of repeating units. At least one of the layers in the repeating unit is an optically active layer with at least one species of rare earth ion.Type: GrantFiled: April 16, 2004Date of Patent: February 22, 2005Assignee: Translucent Photonics, Inc.Inventors: Petar B. Atanackovic, Larry R. Marshall
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Patent number: 6858863Abstract: A semiconductor laser device includes a resonant cavity formed on a GaAs substrate, the resonant cavity including a quantum well (QW) active layer structure having a GaInNAs(Sb) well layer and a pair of barrier layers. The QW structure has a conduction band offset energy (?Ec) equal to or higher than 350 milli-electron-volts (meV) between the well layer and the barrier layers, and each of the barrier layers a tensile strain equal to or lower than 2.5%.Type: GrantFiled: March 8, 2002Date of Patent: February 22, 2005Assignee: The Furukawa Electric Co., Ltd.Inventors: Hitoshi Shimizu, Kouji Kumada, Norihiro Iwai
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Patent number: 6853022Abstract: A semiconductor memory device having as its main storage portion a capacitor storing charges as binary information and an access transistor controlling input/output of the charges to/from the capacitor, and eliminating the need for refresh, is obtained. The semiconductor memory device includes a capacitor with a storage node located above a semiconductor substrate and holding the charges corresponding to a logical level of stored binary information, an access transistor located on the semiconductor substrate surface and controlling input/output of the charges accumulated in the capacitor, and a latch circuit located on the semiconductor substrate and maintaining a potential of the capacitor storage node. At least one of circuit elements constituting the latch circuit is located above the access transistor.Type: GrantFiled: January 29, 2003Date of Patent: February 8, 2005Assignee: Renesas Technology Corp.Inventors: Tsuyoshi Koga, Yoshiyuki Ishigaki, Motoi Ashida, Yukio Maki, Yasuhiro Fujii, Tomohiro Hosokawa, Takashi Terada, Makoto Dei, Yasuichi Masuda
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Patent number: 6849865Abstract: An air trap in a blind hole is eliminated by circulating a liquid chemical along a surface-to-be-processed in substantially a given direction at all times and by setting a velocity gradient of the liquid chemical over the surface to 300/second or more thereby eliminating the air trap in the blind hole.Type: GrantFiled: July 10, 2003Date of Patent: February 1, 2005Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Takeo Nakamoto, Katsuya Kosaki, Masaru Kinugawa
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Patent number: 6849864Abstract: A nitride semiconductor device including a light emitting device comprises a n-type region of one or more nitride semiconductor layers having n-type conductivity, a p-type region of one or more nitride semiconductor layers having p-type conductivity and an active layer between the n-type region and the p-type region. In such devices, there is provided with a super lattice layer comprising first layers and second layers which are nitride semiconductors having a different composition respectively. The super lattice structure makes working current and voltage of the device lowered, resulting in realization of more efficient devices.Type: GrantFiled: June 24, 2003Date of Patent: February 1, 2005Assignee: Nichia Chemical Industries, Ltd.Inventors: Shinichi Nagahama, Masayuki Senoh, Shuji Nakamura
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Patent number: 6849862Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.Type: GrantFiled: May 18, 2001Date of Patent: February 1, 2005Assignee: Technologies and Devices International, Inc.Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
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Patent number: 6849914Abstract: A thermo-optic semiconductor device has one semiconductor region providing an optical waveguide and an adjacent semiconductor region providing a resistive heater between two doped regions, current may be passed through the resistive heater within the adjacent semiconductor region to heat it and thereby vary the optical characteristics of the waveguide.Type: GrantFiled: October 30, 2002Date of Patent: February 1, 2005Assignee: Bookham Technology PLCInventor: Ian Edward Day
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Patent number: 6847046Abstract: A light-emitting device and a method for manufacturing the same are described, by forming a SiN/Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) superlattice layer between a substrate and an undoped GaN as a buffer layer, so as to reduce dislocation density of the buffer layer. In the SiN/Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) superlattice layer, Al1-x-yInxGayN(0?x?1, 0?y?1, x+y?1) can be n-type, p-type or undoped.Type: GrantFiled: December 31, 2003Date of Patent: January 25, 2005Assignees: Epitech Corporation, Ltd.Inventors: Shih-Chen Wei, Yung-Hsin Shie, Wen-Liang Li, Shi-Ming Chen
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Patent number: 6835948Abstract: A transfer recording material allowing the production of customized holographic images is described. The transfer recording material comprises a multilayer structure on a carrier forming a plurality of panels. A portion of the multilayer structure corresponding to a panel comprises an embossable layer (holographic layer) wherein each pixel is configured to reflect incoming light at a predetermined angle &agr;1. Each pixel corresponding to the embossable layer of an adjacent panel is configured to reflect incoming light at a different predetermined angle &agr;2. The transfer recording material can have as many panels as desired by a particular application, each of the layers having an embossable layer with pixels configured to reflect incoming light at a certain angle &agr;. The transfer material is therefore formed by a plurality of spaced-apart panels each of which comprises an embossable holographic layer reflecting light at a predetermined angle different from that of other panels.Type: GrantFiled: September 10, 2003Date of Patent: December 28, 2004Assignee: Illinois Tool Works, Inc.Inventor: Marc O. Woontner
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Patent number: 6835965Abstract: An object of the present invention is to provide a semiconductor light-emitting device that reduces dislocation density and has a high luminous efficiency. A semiconductor light-emitting device 20 has an underlayer 13 made of nitride semiconductor containing Al and a dislocation density of 1011/cm2 or less. The device further has an n-type conductive layer 14 and p-type conductive layer 17 each composed of nitride semiconductor having an Al content smaller than that of the nitride semiconductor constituting the underlayer and having a dislocation density of 1×1010/cm2 or less. The device still further has a light emitting layer 15 composed of nitride semiconductor having an Al content smaller than that of the nitride semiconductor constituting the underlayer and having a dislocation density of 1×1010/m2 or less, as well.Type: GrantFiled: January 27, 2003Date of Patent: December 28, 2004Assignee: NGK Insulators, LimitedInventors: Mitsuhiro Tanaka, Tomohiko Shibata, Osamu Oda, Takashi Egawa
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Publication number: 20040256614Abstract: A method for forming and the structure of a strained lateral channel of a field effect transistor, a field effect transistor and CMOS circuitry is described incorporating a drain, body and source region on a single crystal semiconductor substrate wherein a hetero-junction is formed between the source and body of the transistor, wherein the source region and channel are independently lattice strained with respect the body region. The invention reduces the problem of leakage current from the source region via the hetero-junction and lattice strain while independently permitting lattice strain in the channel region for increased mobility via choice of the semiconductor materials and alloy composition.Type: ApplicationFiled: June 17, 2003Publication date: December 23, 2004Applicant: International Business Machines CorporationInventors: Qiqing Christine Ouyang, Jack Oon Chu
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Patent number: 6828594Abstract: A simple and low cost semiconductor light emission element exerting high performance and a process for producing the same are provided. The semiconductor light emission element contains a nitride semiconductor layer containing at least one or more element selected from Group IIIA elements and one or more element selected from Group VA element, a dissimilar semiconductor having a polarity different from the nitride semiconductor layer, and a light emission layer provided between the dissimilar semiconductor and the nitride semiconductor, in which electrons or positive holes are injected from semiconductors of the dissimilar semiconductor and the nitride semiconductor layer to the light emission layer to carry out light emission.Type: GrantFiled: October 30, 2002Date of Patent: December 7, 2004Assignee: Fuji Xerox Co., Ltd.Inventor: Shigeru Yagi
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Patent number: 6825542Abstract: The present invention relates to a semiconductor photodetector. The photodetector is a waveguide photodetector, which comprises: a waveguide (1,2,3) having a III-V ridge structure including an active layer (1); a semiconductor layer (4) deposited on top of the ridge structure; and, metal detector electrodes (not shown) on the surface of the higher refractive index semiconductor layer (4). The semiconductor layer (4) has a higher refractive index than the waveguide structure (1,2,3). The ridge structure is configured to widen along the length of the waveguide (1,2,3) such that light passing through the active layer (1) of the waveguide couples more efficiently up into the higher refractive index semiconductor layer (4).Type: GrantFiled: January 24, 2003Date of Patent: November 30, 2004Assignee: Denselight Semiconductors Pte LtdInventors: Yee Loy Lam, Yuen Chuen Chan, Chai Leng Terence Wee
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Patent number: 6812495Abstract: A photodetector device includes a plurality of Ge epilayers that are grown on a substrate and annealed in a defined temperature range. The Ge epilayers form a tensile strained Ge layer that allows the photodetector device to operate efficiently in the C-band and L-band.Type: GrantFiled: December 2, 2002Date of Patent: November 2, 2004Assignee: Massachusetts Institute of TechnologyInventors: Kazumi Wada, Lionel C. Kimerling, Yasuhiko Ishikawa, Douglas D. Cannon, Jifeng Liu
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Patent number: 6812483Abstract: Disclosed is an optical semiconductor device which has a quantum well structure comprising a quantum well made of a zinc oxide or a zinc oxide mixed crystal thin film, and utilizes optical transition between subbands in the quantum well structure. An element of this device can be formed as a film on a transparent substrate or a plastic substrate at a temperature of 200° C. or lower. The quatum well structure includes a barrier layer made of an insulating material such as ZnMgO; a homologous compound expressed by the following general formula: RMO3(AO)m, wherein R=Sc or In, M=Fe, Cr, Ga or Al, A=Zn, Mg, Cu, Mn, Fe, Co, Ni or Cd, and m=a natural number; or (Li, Na)(Ga, Al)O2.Type: GrantFiled: May 12, 2004Date of Patent: November 2, 2004Assignee: Japan Science and Technology AgencyInventors: Hideo Ohno, Masashi Kawasaki, Keita Ohtani
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Patent number: 6803598Abstract: Interband tunnel diodes which are compatible with Si-based processes such as, but not limited to, CMOS and SiGe HBT fabrication. Interband tunnel diodes are disclosed (i) with spacer layers surrounding a tunnel barrier; (ii) with a quantum well adjacent to, but not necessarily in contact with, one of the injectors, and (iii) with a first quantum well adjacent to, but not necessarily in contact with, the bottom injector and a second quantum well adjacent to, but not necessarily in contact with, the top injector. Process parameters include temperature process for growth, deposition or conversion of the tunnel diode and subsequent thermal cycling which to improve device benchmarks such as peak current density and the peak-to-valley current ratio.Type: GrantFiled: May 5, 2000Date of Patent: October 12, 2004Assignee: University of DelawareInventors: Paul R. Berger, Phillip E. Thompson, Roger Lake, Karl Hobart, Sean L. Rommel
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Patent number: 6794673Abstract: An amorphous silicon thin film includes a plastic substrate as a base, and insulating layers are formed thereon each radiated with a pulse laser beam which removes volatile contaminants like a resist as a pretreatment. A protective layer including a gas barrier layer and a refractory buffer layer is formed on the substrate. Gas penetration from the substrate to the amorphous silicon film is thereby prevented. Conduction of heat produced by energy beam radiation to the substrate is prevented as well. it is possible to increase energy intensity of energy beam radiated for the polycrystallization of the amorphous silicon film to the optimal value for perfect polycrystallization.Type: GrantFiled: December 11, 2001Date of Patent: September 21, 2004Assignee: Sony CorporationInventors: Dharam Pal Gosain, Jonathan Westwater, Miyako Nakagoe, Setsuo Usui, Kazumasa Nomoto
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Patent number: 6791103Abstract: A light-emitting gallium nitride-based compound semiconductor device of a double-heterostructure. The double-heterostructure includes a light-emitting layer formed of a low-resistivity InxGa1−xN (0<x<1) compound semiconductor doped with p-type and/or n-type impurity. A first clad layer is joined to one surface of the light-emitting layer and formed of an n-type gallium nitride-based compound semiconductor having a composition different from the light-emitting layer. A second clad layer is joined to another surface of the light-emitting layer and formed of a low-resistivity, p-type gallium nitride-based compound semiconductor having a composition different from the light-emitting layer.Type: GrantFiled: August 27, 2002Date of Patent: September 14, 2004Assignee: Nichia CorporationInventors: Shuji Nakamura, Takashi Mukai, Naruhito Iwasa
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Patent number: 6785311Abstract: An optical semiconductor device comprising: an active region; and a p-doped cladding region disposed on one side of the active region; wherein an electron-reflecting barrier is provided on the p-side of the active region for reflecting both &Ggr;-electrons and X-electrons, the electron-reflecting barrier providing a greater potential barrier to &Ggr;-electrons than the p-doped cladding region.Type: GrantFiled: August 27, 2001Date of Patent: August 31, 2004Assignee: Sharp Kabushiki KaishaInventor: Stephen Peter Najda
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Patent number: 6774460Abstract: The present invention relates to an impact ionisation avalanche transit time (IMPATT) diode device comprising an avalanche region and a drift region, wherein at least one narrow bandgap region, with a bandgap narrower than the bandgap in the avalanche region, is located adjacent to or within the avalanche region in order to generate within the narrow bandgap region a tunnel current which is injected into the avalanche region. This improves the predictability with which a current can be injected into the avalanche region and enables a relatively narrow pulse of current to be injected into the avalanche region in order to enable a relatively noise free avalanche multiplication. The narrow bandgap region may be located between a heavily doped contact region and the avalanche region and is preferably arranged to generate a tunnel current at the peak reverse bias applied to the diode.Type: GrantFiled: April 16, 2001Date of Patent: August 10, 2004Assignee: Qinetiq LimitedInventors: David C Herbert, Robert G Davis
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Patent number: 6759676Abstract: In a multiply-complexed one-dimensional structure having a hierarchical structure in which a linear structure as an element of a one-dimensional structure having a finite curvature is made of a thinner one-dimensional structure having a finite curvature, at least two layers of one-dimensional unit structures are bonded in at least one site. For example, in a multiply-twisted helix having a hierarchical structure in which a linear structure as an element of a spiral structure is made of a thinner spiral structure, at least two layers of the unit spiral structures are bonded in at least one site. Alternatively, in a multiply-looped ring structure having a hierarchical structure in which a linear structure as an element of a ring structure is made of a thinner ring structure, at least two layers of ring unit structures are bonded in at least one site.Type: GrantFiled: February 26, 2002Date of Patent: July 6, 2004Assignee: Sony CorporationInventors: Ryuichi Ugajin, Shintaro Hirata, Masakazu Ukita
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Publication number: 20040113143Abstract: An indium arsenide (InAs) layer is disposed on a gallium arsenide (GaAs) substrate. A semiconductor layer is disposed over the indium arsenide layer. The semiconductor layer has a lattice constant larger than that of the gallium arsenide substrate and smaller than that of the indium arsenide layer.Type: ApplicationFiled: October 3, 2003Publication date: June 17, 2004Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Hidetoshi Fujimoto
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Publication number: 20040108500Abstract: The object of the invention is to provide a semiconductor device having a nitride-based hetero-structure in which an epitaxial nitride film has a uniformly flat surface at a single molecule level, and a method of easily fabricating such a device. The object of the invention is achieved by providing a semiconductor device comprising a sapphire substrate whose c-surface is modified to be nitride-surfaced, GaN buffer layer, N polarity GaN layer, N polarity AlN layer, N polarity InN/InGaN multi-layered device structure, Al polarity AlN layer, and GaN cap layer.Type: ApplicationFiled: September 23, 2003Publication date: June 10, 2004Applicant: CHIBA UNIVERSITYInventors: Akihiko Yoshikawa, Ke Xu
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Patent number: 6747357Abstract: A dielectric device has a multi-layer oxide artificial lattice. The artificial lattice is a stacked structure with a plurality of dielectrics. The dielectric film is deposited at a single atomic layer thickness or at a unit lattice thickness. The dielectric film is formed by repeatedly depositing with layer-by-layer growth process at least two dielectric materials having dielectric constant different from each other at least one time in a range of the single atomic layer thickness to 20 nm or by depositing at least two dielectric materials in a predetermined alignment adapted for a functional device, thereby forming one artificial lattice having an identical directional feature. By utilizing the stress applied to an interfacial surface of the consisting layers in the artificial oxide lattice, the dielectric constant and tunability are greatly improved, so the artificial lattice can be adapted for high-speed switching and high-density semiconductor devices and high-frequency response telecommunication devices.Type: GrantFiled: May 1, 2002Date of Patent: June 8, 2004Assignee: Sungkyunkwan UniversityInventors: Jaichan Lee, Juho Kim, Leejun Kim, Young Sung Kim
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Patent number: 6744064Abstract: A semiconductor light emitting device including means for reducing strain and carrier overflow caused by injection of a number of carriers in semiconductor light emitting devices using GaN is provided. The semiconductor light emitting device includes a multi-quantum barrier formed by depositing an AlGaN/GaN double layer a predetermined number of times, or a strain-compensating multiple quantum barrier formed at either the upper or lower sides of an active layer by depositing an AlGaN/InGaN double layer a predetermined number of times, and does not need a p-type clad layer.Type: GrantFiled: February 6, 2001Date of Patent: June 1, 2004Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Sung-nam Lee, Yong-jo Park, Ok-hyun Nam, In-hwan Lee, Won-seok Lee, Shi-yun Cho, Cheol-soo Sone
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Patent number: 6744065Abstract: A single electron tunnelling device is formed by positioning between first and second electrodes a particle formed of a material having a first conductivity characteristic having a surface layer of a material of a second conductivity characteristic, the thickness of said layer being sufficiently small to support quantum mechanical tunnelling therethrough.Type: GrantFiled: May 2, 2000Date of Patent: June 1, 2004Assignee: BTG International LimitedInventors: Lars Ivar Samuelson, Knut Wilfried Deppert
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Patent number: 6734452Abstract: An AlxGa1−xAs/GaAs/AlxGa1−xAs quantum well exhibiting a bound-to-quasibound intersubband absorptive transition is described. The bound-to-quasibound transition exists when the first excited state has the same energy as the “top” (i.e., the upper-most energy barrier) of the quantum well. The energy barrier for thermionic emission is thus equal to the energy required for intersubband absorption. Increasing the energy barrier in this way reduces dark current. The amount of photocurrent generated by the quantum well is maintained at a high level.Type: GrantFiled: April 3, 2001Date of Patent: May 11, 2004Assignee: California Institute of TechnologyInventors: Sarath Gunapala, John K. Liu, Jin S. Park, True-Lon Lin, Mani Sundaram
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Patent number: 6727531Abstract: A gallium nitride-based HEMT device, comprising a channel layer formed of an InGaN alloy. Such device may comprise an AlGaN/InGaN heterostructure, e.g., in a structure including a GaN layer, an InGaN layer over the GaN layer, and a (doped or undoped) AlGaN layer over the InGaN layer. Alternatively, the HEMT device of the invention may be fabricated as a device which does not comprise any aluminum-containing layer, e.g., a GaN/InGaN HEMT device or an InGaN/InGaN HEMT device.Type: GrantFiled: August 7, 2000Date of Patent: April 27, 2004Assignee: Advanced Technology Materials, Inc.Inventors: Joan M. Redwing, Edwin L. Piner
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Patent number: 6727551Abstract: The object of the present invention is to suppress a short channel effect on a threshold voltage. A channel region 5, a pair of source-drain regions and an isolating film 2 having a trench isolation structure are selectively formed in a main surface of a semiconductor substrate 1. An upper surface of the isolating film 2 recedes to be lower than an upper surface of the channel region 5 in a trench portion adjacent to side surfaces of the channel region 5 and to be almost on a level with the upper surface of the channel region 5 in other regions. Consequently, a part of the side surfaces of the channel region 5 as well as the upper surface thereof are covered by a gate electrode 4 with a gate insulating film 3 interposed therebetween. A channel width W of the channel region 5 is set to have a value which is equal to or smaller than a double of a maximum channel depletion layer width Xdm.Type: GrantFiled: February 5, 2003Date of Patent: April 27, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Shigeto Maegawa
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Patent number: 6717175Abstract: A semiconductor laser device is provided in which compositions of a lower optical confinement layer and an upper optical confinement layer are continuously changed in a thickness direction and the change in composition is reverse with respect to an active layer.Type: GrantFiled: September 26, 2002Date of Patent: April 6, 2004Assignee: The Furukawa Electric Co., Ltd.Inventors: Ryuichiro Minato, Takahiro Ono
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Patent number: 6710367Abstract: A quantum-confined Stark effect semiconductor optical modulator, operable to modulate light of a particular wavelength in the range of around 780 to 840 nm. A p-i-n diode having p, intrinsic and n regions, as well as first and second electrical contacts for application of a reverse bias voltage defines the modulator. The particular intrinsic region includes a plurality of semiconductor layers defining a plurality of quantum wells separated by barrier layers having a certain bandgap energy above that of the quantum wells. The quantum wells including at least two ultra-thin barrier layers within the quantum well and being of a material having a certain bandgap energy above that of the quantum wells. The width of each ultra-thin barrier layer is no more than approximately two molecular layers thick.Type: GrantFiled: May 17, 2002Date of Patent: March 23, 2004Assignee: The United States of America as represented by the Secretary of the ArmyInventors: John D. Bruno, Mary S. Tobin
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Patent number: 6703645Abstract: A spin filter is composed of a first magnetic semiconductor multi-quantum well structure, a second magnetic semiconductor multi-quantum well structure and a non-magnetic semiconductor quantum well structure which is located between the first magnetic semiconductor multi-quantum well structure and the second magnetic semiconductor multi-quantum well structure. The first magnetic semiconductor multi-quantum well structure and the second magnetic semiconductor multi-quantum well structure are split in spin state. Carriers in down-spin state are penetrated through the first magnetic semiconductor multi-quantum well structure and carriers in up-spin state are penetrated through the second magnetic semiconductor multi-quantum well structure.Type: GrantFiled: November 12, 2002Date of Patent: March 9, 2004Assignee: Tohoku UniversityInventors: Hideo Ohno, Keita Ohtani
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Patent number: 6696372Abstract: A method for the production of a semiconductor structure having self-organized quantum wires is described. The process includes the formation of multi-atomic steps on a (001) oriented semiconductor substrate inclined at an angle toward the [110] direction. Quantum wires are then spontaneously formed in situ along edges of the multi-atomic steps during epitaxial growth of a semiconductor with a larger or smaller lattice constant than the substrate but with a band gap narrower than that of the underlying material. Further deposition of a layer of semiconductor with a lattice constant within 1% of the substrate but with a band gap wider than that of the wire material then buries the quantum wires between this layer and the substrate layers. These layers are free of defects.Type: GrantFiled: December 7, 2001Date of Patent: February 24, 2004Assignee: Agency for Science, Technology and ResearchInventors: Benzhong Wang, Soo Jin Chua
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Publication number: 20040026685Abstract: A nitride semiconductor laser device includes a nitride semiconductor substrate, and a layered portion corresponding to a nitride semiconductor film grown on the nitride semiconductor substrate, the layered portion including an n-type layer and a p-type layer and a light emitting layer posed between the n- and p-type layers, of the n- and p-type layers a layer opposite to the nitride semiconductor substrate with the light emitting layer opposed therebetween serving as an upper layer having a stripe of 1.9 &mgr;m to 3.0 &mgr;n in width, the light emitting layer and the upper layer having an interface distant from a bottom of the stripe by 0 &mgr;m to 0.2 &mgr;m.Type: ApplicationFiled: July 9, 2003Publication date: February 12, 2004Inventors: Shigetoshi Ito, Yuhzoh Tsuda
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Patent number: 6690025Abstract: This relates to optical devices such as planar light-wave components/circuits which are designed to have a high waveguide pattern density effecting a higher etch selectivity and overall improved dimensional control of the functional waveguides on the optical device.Type: GrantFiled: July 10, 2001Date of Patent: February 10, 2004Assignee: Lightwave Microsystems CorporationInventors: Jongik Won, Calvin Ka Kuen Ho, Fan Zhong, Liang Zhao
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Patent number: 6670653Abstract: A Double Heterojunction Bipolar Transistor (DHBT) is disclosed employing a collector of InP, an emitter of InP or other material such as InAlAs, and a base of either a selected InxGa1−xAsySb1−y compound, which preferably is lattice-matched to InP or may be somewhat compressively strained thereto, or of a superlattice which mimics the selected InGaAsSb compound. When an emitter having a conduction band non-aligned with that of the base is used, such as InAlAs, the base-emitter junction is preferably graded using either continuous or stepped changes in bulk material, or using a chirped superlattice. Doping of the junction may include one or more delta doping layer to improve the shift of conduction band discontinuities provided by a grading layer, or to permit a wider depletion region.Type: GrantFiled: July 30, 1999Date of Patent: December 30, 2003Assignee: HRL Laboratories, LLCInventors: Miroslav Micovic, Daniel P. Docter, Mehran Matloubian
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Patent number: 6649942Abstract: A nitride-based semiconductor light-emitting device capable of attaining homogeneous emission with a low driving voltage is obtained. This nitride-based semiconductor light-emitting device comprises a first conductivity type first nitride-based semiconductor layer formed on a substrate, an emission layer, consisting of a nitride-based semiconductor, formed on the first nitride-based semiconductor layer, a second conductivity type second nitride-based semiconductor layer formed on the emission layer, a second conductivity type intermediate layer, consisting of a nitride-based semiconductor, formed on the second nitride-based semiconductor layer, a second conductivity type contact layer, including a nitride-based semiconductor layer having a smaller band gap than gallium nitride, formed on the intermediate layer, and a light-transmitting electrode formed on the contact layer.Type: GrantFiled: May 21, 2002Date of Patent: November 18, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Masayuki Hata, Yasuhiko Nomura, Kunio Takeuchi, Tsutomu Yamaguchi, Takashi Kano
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Publication number: 20030197170Abstract: A method for fabricating a radiation-emitting semiconductor chip having a thin-film element based on III-V nitride semiconductor material includes the steps of depositing a layer sequence of a thin-film element on an epitaxy substrate. The thin-film element is joined to a carrier, and the epitaxy substrate is removed from the thin-film element. The epitaxy substrate has a substrate body made from PolySiC or PolyGaN or from SiC, GaN or sapphire, which is joined to a grown-on layer by a bonding layer, and on which the layer sequence of the thin-film element is deposited by epitaxy.Type: ApplicationFiled: February 28, 2003Publication date: October 23, 2003Inventors: Stefan Bader, Michael Fehrer, Berthold Hahn, Volker Harle, Hans-Jurgen Lugauer
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Patent number: 6624440Abstract: An FET (Field Effect Transistor) has an epitaxial wafer including an Al0.2Ga0.8As gate contact layer. A GaAs gate buried layer doped with Si, Al0.2Ga0.8As wide-recess stopper layer doped with Si, an undoped GaAs layer and a GaAs cap layer doped with Si are sequentially formed on the gate contact layer by epitaxial growth. An electron accumulation layer is formed on the undoped GaAs layer and reduces a potential barrier. This allows electrons to pass through the potential barrier of the AlGaAs layer with higher probability. Because the GaAs layer is not doped with an impurity, electrons are scattered little and achieve higher mobility. It is therefore possible to reduce contact resistance from the cap layer to a channel layer. In addition, sheet resistance sparingly increases because the gate contact layer is not exposed to the outside. An ON resistance as low as 1.4 &OHgr;·mm is achievable which is lower than the conventional ON resistance by 0.2 &OHgr;·mm.Type: GrantFiled: October 30, 2001Date of Patent: September 23, 2003Assignee: NEC CorporationInventors: Yasunori Bito, Naotaka Iwata
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Patent number: 6621096Abstract: A device isolation process flow for an atomic resolution storage (ARS) system inserts device isolation into a process flow of the ARS system so that diodes may be electrically insulated from one another to improve signal to noise ratio. In addition, since most harsh processing is done prior to depositing a phase change layer, which stores data bits, process damage to the phase change layer may be minimized.Type: GrantFiled: May 21, 2001Date of Patent: September 16, 2003Assignee: Hewlett-Packard Develpoment Company, L.P.Inventors: Heon Lee, Chung-Ching Yang, Peter Hartwell
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Patent number: 6617607Abstract: A nitride semiconductor laser device includes a nitride semiconductor substrate, and a layered portion corresponding to a nitride semiconductor film grown on the nitride semiconductor substrate, the layered portion including an n-type layer and a p-type layer and a light emitting layer posed between the n- and p-type layers, of the n- and p-type layers a layer opposite to the nitride semiconductor substrate with the light emitting layer opposed therebetween serving as an upper layer having a stripe of 1.9 &mgr;m to 3.0 &mgr;m in width, the light emitting layer and the upper layer having an interface distant from a bottom of the stripe by 0 &mgr;m to 0.2 &mgr;m.Type: GrantFiled: April 26, 2001Date of Patent: September 9, 2003Assignee: Sharp Kabushiki KaishaInventors: Shigetoshi Ito, Yuhzoh Tsuda
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Publication number: 20030160232Abstract: A nitride semiconductor substrate including (a) a supporting substrate, (b) a first nitride semiconductor layer having a periodical T-shaped cross-section, having grown from periodically arranged stripe-like, grid-like or island-like portions on the supporting substrate, and (c) a second nitride semiconductor substrate covering said supporting substrate, having grown from the top and side surfaces of said first nitride semiconductor layer, wherein a cavity is formed under the second nitride semiconductor layer.Type: ApplicationFiled: March 18, 2003Publication date: August 28, 2003Applicant: Nichia CorporationInventors: Tokuya Kozaki, Hiroyuki Kiyoku, Kazuyuki Chocho, Hitoshi Maegawa
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Publication number: 20030160231Abstract: A sensor comprises two photodiodes sensitive to different wavelengths. The photodiodes or detectors are stacked in a vertical relationship to each other. A bandpass filter is provided to limit the wavelengths of light reaching the detectors. The photodiodes are formed of various combinations of materials such as AlGaN or InGaN, or different compositions of the same material. Charge detectors are coupled to each detector to provide a signal representative of the amount of radiation detected in their corresponding bandwidths. A biological sample is provided proximate the filter. A laser is used to illuminate the biological sample to create biofluorescence corresponding to intrinsic tryptophan of bacteria.Type: ApplicationFiled: February 22, 2002Publication date: August 28, 2003Inventors: Barrett E. Cole, Wei Yang, Thomas E. Nohava
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Patent number: 6607932Abstract: A light emitting device providing a first part that includes a source of excess minority carriers including excess electron-hole pairs; a second part, coupled to the first part, that includes a minority carrier barrier; and a third part, coupled to the second part, that includes a region that exhibits a low radiative recombination efficiency and a short minority carrier lifetime. In response to a first stimulus minority carriers are constrained by the second part to remain in the first part, leading to an increase of minority carrier radiative recombination in the first part and an increase in light emission; while in response to a second stimulus the minority carriers are enabled to cross the minority carrier barrier of the second part to enter the third part, leading to a decrease of minority carrier radiative recombination in the first part and a decrease in light emission.Type: GrantFiled: August 28, 2002Date of Patent: August 19, 2003Assignee: Yale UniversityInventors: Jerry M. Woodall, Robert D. Koudelka
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Patent number: 6608330Abstract: First and second well layers of a light emitting device emit light of different peak wavelengths so as to produce a mixed light, such as white light having high luminous intensity and high luminous efficiency. A color rendering property of the device can be controlled by adjusting the ratio of the growth numbers of the first and second well layers, and/or the thickness of the barrier layers sandwiching the well layers. The color rendering property can also be controlled by forming the second well layer so as to have a degree of asperity greater than that of the first well layer, or so that a degree of area occupied by dished portions having a thickness which is less than half of an average thickness over a total surface is not less than 10%.Type: GrantFiled: September 21, 1999Date of Patent: August 19, 2003Assignee: Nichia CorporationInventor: Motokazu Yamada
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Publication number: 20030146431Abstract: A method for producing quantum dots. The method includes cleaning an oxide substrate and separately cleaning a metal source. The substrate is then heated and exposed to the source in an oxygen environment. This causes metal oxide quantum dots to form on the surface of the substrate.Type: ApplicationFiled: January 10, 2003Publication date: August 7, 2003Inventors: Yong Liang, John L. Daschbach, Yali Su, Scott A. Chambers
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Patent number: 6600200Abstract: A MOS transistor and a method for fabricating the same include producing a well doped by a first conductivity type in a semiconductor substrate. An epitaxial layer having a dopant concentration of less than 1017 cm−3 is disposed on a surface of the doped well. Source/drain regions doped by a second conductivity type, opposite to the first conductivity type, and a channel region, are disposed in the epitaxial layer, and their depth is less than or equal to the thickness of the epitaxial layer. A method for fabricating two complementary MOS transistors is also provided.Type: GrantFiled: August 25, 2000Date of Patent: July 29, 2003Assignee: Infineon Technologies AGInventors: Bernhard Lustig, Herbert Schäfer, Lothar Risch
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Publication number: 20030136909Abstract: A special infrared photodetector is operable at high temperatures. The detector is a very wideband detector which may be operated in a direct detection mode or in a heterodyne mode. A multiple quantum well photodetector includes a plurality of wells and a plurality of barriers formed of alternating layers of gallium-arsenide and aluminum-gallium-arsenide material respectively. The gallium-arsenide layers are highly doped with an n-type dopant such as silicon atoms. The high doping produces an unexpected result of improved operational efficiency at elevated temperatures. Photodetectors of these inventions have a large number of quantum well structures to improve absorption or interaction cross section. In all versions, the middle portion of wells include a special region of a highly doped gallium arsenide material in a density of about one to three trillion silicon atoms per square centimeter.Type: ApplicationFiled: January 23, 2002Publication date: July 24, 2003Inventor: James Plante
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Patent number: 6593589Abstract: The present invention provides a unipolar semiconductor structure comprising: at least one active layer comprising at least one group III-nitride; and at two barrier layers disposed on either side of the active layer, each of the two barrier layers comprising at least one groupType: GrantFiled: January 29, 1999Date of Patent: July 15, 2003Assignee: The University of New MexicoInventors: Marek Osinski, Petr Eliseev
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Patent number: 6589449Abstract: A high-melting-point conductive oxide includes a mixture of a powdered Sr compound and Ru compound and/or Ru metal. The mixture is sintered at a primary temperature of 900° C. to 1300° C. in an atmosphere containing oxygen to form a sintered body that is pulverized back to a powder. The powder is given a desired shape that is again sintered, this time at a secondary temperature of 1000° C. to 1500° C. higher than the primary temperature, again in an atmosphere containing oxygen. The high-melting point conductive oxide is used as a heating element for high-temperature use, an electrode material for high-temperature use, a material for high-temperature thermocouple use and a light-emitting material for high-temperature use.Type: GrantFiled: December 29, 2000Date of Patent: July 8, 2003Assignees: National Institute of Advanced Industrial Science and TechnologyInventors: Shinichi Ikeda, Naoki Shirakawa, Hiroshi Bando