Abstract: In the nitride semiconductor device of the present invention, an active layer 12 is sandwiched between a n-type nitride semiconductor layer 11 and an p-type nitride semiconductor layer 13. The active layer 12 has, at least, a barrier layer 2a having an n-type impurity; a well layer 1a made of a nitride semiconductor that includes In; and a barrier layer 2c that has a p-type impurity, or that has been grown without being doped. An appropriate injection of carriers into the active layer 12 becomes possible by arranging the barrier layer 2c nearest to the p-type layer side.

Abstract: A method for growing strain-engineered, self-assembled, semiconductor quantum dots (QDs) into ordered lattices. The nucleation and positioning of QDs into lattices is achieved using a periodic sub-surface lattice built-up on a substrate, stressor layer, and spacer layer. The unit cell dimensions, orientation and the number of QDs in the basis are tunable. Moreover, a 2D lattice can be replicated at periodic intervals along the growth direction to form a three-dimensional (3D) lattice of QDs.

Abstract: A semiconductor device includes group III-V layers formed over a substrate. At least one of the group III-V layers is doped with a dopant. The dopant includes a first dopant and one of a second dopant and an isovalent impurity. The first dopant has a covalent radius different in size than the covalent radii of each of the second dopant and the isovalent impurity.

Abstract: Quantum computing systems and methods that use opposite magnetic moment states read the state of a qubit by applying current through the qubit and measuring a Hall effect voltage across the width of the current. For reading, the qubit is grounded to freeze the magnetic moment state, and the applied current is limited to pulses incapable of flipping the magnetic moment. Measurement of the Hall effect voltage can be achieved with an electrode system that is capacitively coupled to the qubit. An insulator or tunnel barrier isolates the electrode system from the qubit during quantum computing. The electrode system can include a pair of electrodes for each qubit. A readout control system uses a voltmeter or other measurement device that connects to the electrode system, a current source, and grounding circuits. For a multi-qubit system, selection logic can select which qubit or qubits are read.

Abstract: This patent is generally directed towards a method and device for providing a diode structure that has a barrier height that may be readily engineered with a series resistance that may be independently varied while simultaneously providing for the complete characterization and discernment of the barrier height in a microwave and millimeter-wave rectifying diode without the need for device fabrication and electrical measurement. The present invention generally relates to microwave and millimeterwave diodes, and more particularly to low barrier structures within these diodes that are capable of rectification of microwave and millimeterwave radiation.

Abstract: A quantum semiconductor device includes intermediate layers of a first semiconductor crystal having a first lattice constant and stacked repeatedly, and a plurality of quantum dots of a second semiconductor crystal having a second lattice constant different from the first lattice constant. The quantum dots are dispersed in each of the intermediate layers and form a strained heteroepitaxial system with respect to the corresponding intermediate layer. Each of the quantum dots has a height substantially identical with a thickness of the corresponding intermediate layer.

Abstract: A semiconductor device having a solid-state image sensor is provided in which the leakage current is less likely to occur. The surface portion of a P-type semiconductor substrate (1) is susceptible to various defects, which are likely to cause the leakage current. Accordingly an N-type buried channel layer (7a) is provided. While the potential is high in the vicinity of the surface of the P-type semiconductor substrate (1) where defects are present, the potential is minimized in the vicinity of the PN junction plane formed by the N-type buried channel layer (7a) and the P-type semiconductor substrate (1). Accordingly, when a transfer switch (M1) is operated, a channel is formed in the vicinity of this PN junction plane, so that a charge stored in an N-type source region (4a) of the photodiode (PD) can be transferred to an N-type drain region (5) without suffering leakage current.

Abstract: A surface-light-emitting device including a semiconductor substrate, and a laminar semiconductor structure consisting of a plurality of semiconductor layers formed by epitaxial growth on the semiconductor substrate, the laminar semiconductor structure including a light-generating layer, and two multi-film reflecting layers between which the light-generating layer is interposed and which constitute a light resonator for reflecting a light generated by the light-generating layer, the structure having a light-emitting surface at one of opposite ends thereof remote from the substrate, so that the light generated by the light-generating layer is emitted from the light-emitting surface, wherein the two multi-film reflecting layers consist of a first multi-film reflecting layer formed principally of AlGaInP on the substrate, and a second multi-film reflecting layer formed principally of AlGaAs on one of opposite sides of the light-generating layer which is remote from the substrate.

Abstract: The invention concerns a light emitting and guiding device comprising at least one active region (22) in silicon and the means for creating photons in the said active region. In accordance with the invention, the means for creating the photons comprise a diode (22c, 22d) formed in the active region. In addition, the device includes the means for confining the carriers injected by the diode, and the silicon in the active region is mono-crystalline.

Abstract: A semiconductor device having a solid-state image sensor is provided in which the leakage current is less likely to occur. The surface portion of a P-type semiconductor substrate (1) is susceptible to various defects, which are likely to cause the leakage current. Accordingly an N-type buried channel layer (7a) is provided. While the potential is high in the vicinity of the surface of the P-type semiconductor substrate (1) where defects are present, the potential is minimized in the vicinity of the PN junction plane formed by the N-type buried channel layer (7a) and the P-type semiconductor substrate (1). Accordingly, when a transfer switch (M1) is operated, a channel is formed in the vicinity of this PN junction plane, so that a charge stored in an N-type source region (4a) of the photodiode (PD) can be transferred to an N-type drain region (5) without suffering leakage current.

Abstract: An opto-electronic integrated circuit device includes top emitter/detector devices on a substrate. The top emitter/detector devices have top and bottom sides. The top emitter/detector devices are capable of emitting and detecting light beam from the top side, and have top contact pads on the top side. An optically transparent superstrate is attached to the top side. Micro-optic devices such as lenses can be attached to the superstrate. Top contact pads are connected to bottom contact pads. The bottom contact pads are attached to matching pads of an integrated circuit chip to produce an opto-electronic integrated circuit.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. One way to achieve the formation of a compliant substrate includes first growing an accommodating buffer layer (204) on a silicon wafer (202). The accommodating buffer layer is a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer (206) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer.

Abstract: An integrated circuit includes a layered superlattice material having the formula A1w1+a1A2w2+a2 . . . Ajwj+ajS1x1+s1S2x2+s2 . . . Skxk+skB1y1+b1B2y2+b2 . . . Blyl+blQz−q, where A1, A2 . . . Aj represent A-site elements in a perovskite-like structure, S1, S2 . . . Sk represent superlattice generator elements, B1, B2 . . . B1 represent B-site elements in a perovskite-like structure, Q represents an anion, the superscripts indicate the valences of the respective elements, the subscripts indicate the number of atoms of the element in the unit cell, and at least w1 and y1 are non-zero. Some of these materials are extremely low fatigue ferroelectrics and are applied in ferroelectric FETs in non-volatile memories. Others are high dielectric constant materials that do not degrade or break down over long periods of use and are applied as the gate insulator in volatile memories.

Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.

Abstract: Aluminum gallium nitride (AlxGa1−xN, 0<x<1) is employed as a substrate of a Group III nitride compound semiconductor device. In light-emitting diodes and laser diodes employing the substrate, crack generation is prevented, even when a thick cladding layer formed of aluminum gallium nitride (AlxGa1−xN, 0<x<1) is stacked on the substrate. The smaller the difference in Al compositional proportion between the substrate and an aluminum gallium nitride (AlxGa1−xN, 0<x<1) layer, the less likely the occurrence of crack generation.

Abstract: The object of the present invention is to suppress a short channel effect on a threshold voltage. A channel region 5, a pair of source-drain regions and an isolating film 2 having a trench isolation structure are selectively formed in a main surface of a semiconductor substrate 1. An upper surface of the isolating film 2 recedes to be lower than an upper surface of the channel region 5 in a trench portion adjacent to side surfaces of the channel region 5 and to be almost on a level with the upper surface of the channel region 5 in other regions. Consequently, a part of the side surfaces of the channel region 5 as well as the upper surface thereof are covered by a gate electrode 4 with a gate insulating film 3 interposed therebetween. A channel width W of the channel region 5 is set to have a value which is equal to or smaller than a double of a maximum channel depletion layer width Xdm.

Abstract: A method and device for converting light from a first wavelength to a second wavelength. The method comprises the steps of exciting an electron in a quantum dot with an incident infrared photon having the first wavelength, the excited electron having a first energy, tunneling the excited electron through a barrier into a stress induced quantum dot, and recombining the excited electron with a hole in the stress induced quantum dot, therein producing a photon having the second wavelength, typically in the visible range.

Abstract: A method for producing quantum dots. The method includes cleaning an oxide substrate and separately cleaning a metal source. The substrate is then heated and exposed to the source in an oxygen environment. This causes metal oxide quantum dots to form on the surface of the substrate.

Abstract: A nitride semiconductor epitaxial substrate includes a low-temperature-deposited buffer layer, the composition of which is AlxGa1−xN, where 0≦x≦1, and a single crystalline layer, the composition of which is AlyGa1−yN, where 0>y≦1. The single crystalline layer is deposited directly over the low-temperature-deposited buffer layer, wherein the buffer layer has a mole fraction x satisfying (y−0.3)≦x>y.

Abstract: A group III-nitride quaternary material system and method is disclosed for use in semiconductor structures, including laser diodes, transistors, and photodetectors, which reduces or eliminates phase separation and provides increased emission efficiency. In an exemplary embodiment the semiconductor structure includes a first InGaAlN layer of a first conduction type formed substantially without phase separation, an InGaAlN active layer substantially without phase separation, and a third InGaAlN layer of an opposite conduction type formed substantially without phase separation.

Abstract: A light emitting diode with strained layer superlatices (SLS) crystal structure is formed on a substrate. A nucleation layer and a buffer layer are sequentially formed on the substrate, so as to ease the crystal growth for the subsequent crystal growing process. An active layer is covered between an upper and a lower cladding layers. The active later include III-N group compound semiconductive material. A SLS contact layer is located on the upper cladding layer. A transparent electrode is located on the contact later to serve as an anode. Another electrode layer has contact with the buffer layer, and is separated from the lower and upper cladding layers.

Abstract: A light emitting diode is disclosed. The diode includes a silicon carbide substrate having a first conductivity type, a first gallium nitride layer above the SiC substrate having the same conductivity type as the substrate, a superlattice on the GaN layer formed of a plurality of repeating sets of alternating layers selected from among GaN, InGaN, and AlInGaN, a second GaN layer on the superlattice having the same conductivity type as the first GaN layer, a multiple quantum well on the second GaN layer, a third GaN layer on the multiple quantum well, a contact structure on the third GaN layer having the opposite conductivity type from the substrate and the first GaN layer, an ohmic contact to the SiC substrate, and an ohmic contact to the contact structure.

Abstract: To provide a semiconductor device capable of preventing the bowing of the substrate, and having a semiconductor layer of a III-V group compound of a nitride system with excellent crystallinity. The semiconductor layer of the III-V group compound of the nitride system whose thickness is equal to or less than 8 &mgr;m, is provided onto a substrate made of sapphire. This reduces the bowing of the substrate due to differences in a thermal expansion coefficient and a lattice constant between the substrate and the semiconductor layer of the III-V group compound of the nitride system. An n-side contact layer forming the semiconductor layer of the III-V group of the nitride system has partially a lateral growth region made by growing in a lateral direction from a crystalline part of a seed crystal layer. In the lateral growth region, dislocation density restricts low, therefore, regions corresponding to the lateral growth region of each layer formed onto the n-side contact layer has excellent crystallinity.

Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy, epitaxial growth of single crystal silicon onto single crystal oxide, and epitaxial growth of Zintl phase materials.

Abstract: A nitride compound semiconductor element having improved characteristics, productivity and yield. A nitride compound semiconductor element comprises: a sapphire substrate; a first single crystalline layer of AIN formed on said sapphire substrate; a second single crystalline layer formed on said first single crystalline layer, said second single crystalline layer being made of AlxGal1-xN(0.8≦x≦0.97) and having a thickness of equal to or more than 0.3 &mgr;m and equal to or less than 6 &mgr;m; and a device structure section of a nitride semiconductor formed on said second single crystalline layer.

Abstract: A light emitting device and a method of increasing the light output of the device utilize a chirped multi-well active region to increase the probability of radiative recombination of electrons and holes within the light emitting active layers of the active region by altering the electron and hole distribution profiles within the light emitting active layers of the active region (i.e., across the active region). The chirped multi-well active region produces a higher and more uniform distribution of electrons and holes throughout the active region of the device by substantially offsetting carrier diffusion effects caused by differences in electron and hole mobility by using complementary differences in layer thickness and/or layer composition within the active region.

Abstract: Presented is an LED device that produces white light by performing phosphor conversion on substantially all of the primary light emitted by the light emitting structure of the LED device. The LED device comprises a light emitting structure and at least one phosphor-converting element located to receive and absorb substantially all of the primary light. The phosphor-converting element emits secondary light at second and third wavelengths that combine to produce white light. Some embodiments include an additional phosphor-converting element, which receives light from a phosphor-converting element and emits light at a fourth wavelength. In the embodiments including an additional phosphor-converting element, the second, third, and fourth wavelengths combine to produce white light. Each phosphor-converting element includes at least one host material doped with at least one dopant. The phosphor-converting element may be a phosphor thin film, a substrate for the light emitting structure, or a phosphor powder layer.

Abstract: An interband cascade (IC) light emitting device having narrow ridges, and a method of growing and fabricating the IC light emitting device is disclosed. The IC light emitting device produced by the method of the present invention has 18 active regions separated by n-type injection regions and a plurality of coupled quantum wells of Al(In)Sb, InAs, and Ga(In)Sb layers. The IC light emitting device produced according to the present method has a differential external quantum efficiency of at least 500%, a peak power output of at least 4W/facet, a power conversion efficiency of at least 14% in continuous wave at 80K, a power conversion efficiency of at least 18% in pulsed wave operation at 80K, a continuous wave operation temperature of 142 K or less, a thermal resistance of from about 24-29 K*cm2/kW and continuous wave output powers of at least 100 mW/facet at temperatures above 77K.

Abstract: Silicon possesses an indirect band-gap, which limits its use in some photonic applications. A phonon generator is included in a silicon-based device, which promotes electron-hole recombination and so allows silicon to emit photons efficiently. Phonons may be generated by optical or electrical stimulation or as a result energy relaxation of hot-electrons.

Abstract: An intersubband light emitting element includes a semiconducting substrate, a first layer composed of a first semiconducting material, and a second layer composed of second semiconducting material. The first layer makes a heterojunction with the second layer. The top of a valence band of the first semiconducting material is higher in energy than the bottom of a conduction band of the second semiconducting material. The element further includes a third layer making a heterojunction with the first or second layer. The third layer has a superlattice structure. One of the first and second layer is provided on the semiconducting substrate directly or through at least one semiconducting layer.

Abstract: Group III-nitride quaternary and pentenary material systems and methods are disclosed for use in semiconductor structures, including laser diodes, transistors, and photodetectors, which reduces or eliminates phase separation and provides increased emission efficiency. In an exemplary embodiment the semiconductor structure includes a first ternary, quaternary or pentenary material layer using an InGaAlNP layer of a first conduction type formed substantially without phase separation, a quaternary or pentenary material active layer using an InGaAlNP active layer substantially without phase separation, and a third ternary, quaternary or pentenary InGaAlNP material layer of an opposite conduction type formed substantially without phase separation.

Abstract: Provided are a semiconductor device which shows excellent negative differential conductance or negative transconductance and is manufactured without a complicated manufacturing process and a method of manufacturing the same. The semiconductor device includes a channel layer serving as a conduction region and a floating region electrically separated from the channel layer. Provided between the channel layer and the floating region is a quantum well layer constituted with a pair of barrier layers and a quantum well layer sandwiched between the pair of barrier layers. A source electrode and a drain electrode are electrically connected to the channel layer. A gate electrode is provided in an opposite position from the well layer in the floating region. When changing a drain voltage relative to a predetermined gate voltage, drain current characteristics show negative differential conductance.

Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III—V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.

Abstract: A method for monitoring silicide failures in the semiconductor process provides P-channel gate oxide capacitors on a semiconductor wafer. The breakdown voltages of the P-channel oxide gate capacitors are measured. With higher rapid thermal anneal (RTA) temperatures, an increased number of short failures occur in the P-channel gate oxide capacitors. Based on a correlation of the P-channel gate oxide capacitor failures and the RTA temperatures, the optimum RTA temperature for the silicide process is determined.

Abstract: The first GaAs layer and a FET gate electrode are formed on the top surface of an epitaxial substrate. An AlGaAs layer, the second GaAs layer and the first diode electrode are successively formed on the top surface of the first GaAs layer and near the left end thereof. A diode/FET electrode is formed on the top surface of the first GaAs layer and between the first diode electrode and the FET gate electrode. The diode/FET electrode serves as the second diode electrode in combination with the first diode electrode, and as a source or drain electrode in combination with the FET gate electrode. The first diode electrode is formed by evaporation, and the FET gate electrode is formed by spattering. Since the physical property of the first diode electrode is different form that of the FET gate electrode, the noise characteristic of the diode in the low frequency band and the heat-resisting property of the FET can be simultaneously improved in the same chip.

Abstract: Nitrogen-containing III-V alloy semiconductor materials have both a conduction band offset &Dgr;Ec and a valence band offset &Dgr;Ev large enough for the practical applications to light emitting devices. The semiconductor materials are capable of providing laser diodes, having excellent temperature characteristics with emission wavelengths in the red spectral region and of 600 nm or smaller, and high brightness light emitting diodes with emission wavelengths in the visible spectral region. The light emitting device is fabricated on an n-GaAs substrate, which has the direction normal to the substrate surface is misoriented by 15° from the direction normal to the (100) plane toward the [011] direction. On the substrate, there disposed by MOCVD, for example, are an n-GaAs buffer layer, an n-(Al0.7Ga0.3)0.51In0.49P cladding layer, an (Al0.2Ga0.8)0.49In0.51N0.01P0.99 active layer, a p-(Al0.7Ga0.3)0.51In0.49P cladding layer, and a p-GaAs contact layer.

Abstract: A superlattice structure for thermoelectric power generation includes m monolayers of a first barrier material alternating with n monolayers of a second quantum well material with a pair of monolayers defining a superlattice period and each of the materials having a relatively smooth interface therebetween. Each of the quantum well layers have a thickness which is less than the thickness of the barrier layer by an amount which causes substantial confinement of conduction carriers to the quantum well layer and the alternating layers provide a superlattice structure having a figure of merit which increases with increasing temperature.

Abstract: A quantic effect device which functions using a Coulomb blockade phenomenon. The device includes two electron reservoirs, two sets of islands that are separated by a dielectric layer, a protective insulating layer and a control electrode.

Abstract: A semiconductor photonic device includes a substrate having a cleavage plane perpendicular to a principal plane thereof; a ZnO film on the substrate; and a compound semiconductor layer expressed by InxGayAlzN (x+y+z=1, 0≦x≦1, 0≦y ≦1, 0≦z≦1).

Abstract: A quantum computer comprises a crystal lattice having storage atoms. The storage atoms have nuclear storage spins, and quantum bits are stored as orientations of the storage spins. A magnetic field is applied to the crystal, the magnetic field having a gradient on the order of 1T/&mgr;m. The gradient is generated by a micromagnet. The electrons of the crystal acquire a regular order, and the storage spins are initialized by inducing combined electron-nucleus transitions in the crystal, thereby transferring the electronic order to the storage spins. The storage spins are decoupled from each other by a decoupling magnetic field. Quantum logic operations are performed on the storage spins. Certain quantum logic operations require a modification of the decoupling field to recouple a plurality of the storage spins. Final polarizations of the storage spins are measured.

Abstract: A heterojunction field effect transistor has a buffer layer, a channel layer, a gate insulating layer, a source electrode, a drain electrode, and a gate electrode to be in contact with a substrate. The buffer layer has at least one GaN layer. The channel layer has a composition of InzGa1−zN (0≦z<1) and the gate insulating layer is an InAlGaN layer. The source and drain electrodes are in ohmic contact with the channel layer and the gate electrode and the gate insulating layer are in Schottky contact with each other.

Abstract: Disclosed is an electroabsorption-type optical modulator, which has: a semiconductor substrate; and a semiconductor buffer layer, a semiconductor optical absorption layer and a semiconductor cladding layer which are layered in this order on the semiconductor substrate; wherein the absorption of a light wave supplied to an end of the semiconductor optical absorption layer is controlled by changing an intensity of electric field applied to the semiconductor optical absorption layer; and the semiconductor optical absorption layer has a region with absorption-edge wavelength shorter than that of the other region of the semiconductor optical absorption layer and a voltage corresponding an external electrical signal is simultaneously applied to both the regions of the semiconductor optical absorption layer, so that, to an incident light, a refractive index of the semiconductor optical absorption layer is decreased and an absorption coefficient of the semiconductor optical absorption layer is increased when an inten

Abstract: An undercoat layer inclusive of a metal nitride layer is formed on a substrate. Group III nitride compound semiconductor layers are formed on the undercoat layer continuously.

Abstract: A method for growing GaN forms a group III alloy material in a processing chamber. A GaN nucleation layer is formed on the group III alloy in the processing chamber to provide a GaN substrate. A GaN structure is formed on the GaN substrate using a plurality of gas phase reactants in the processing chamber.

Abstract: A method of growing p-type group II-VI compound semiconductor crystals, includes a step of forming ZnO layers and ZnTe layers alternately on a ZnO substrate, the ZnO layer being not doped with impurities and having a predetermined impurity concentration, and the ZnTe layer being doped with p-type impurities N to a predetermined impurity concentration or higher.

Abstract: A Si1−xGex/Si1−yCy short-period superlattice which functions as a single SiGeC layer is formed by alternately growing Si1−xGex layers (0<x<1) and Si1−yCy layers (0<y<1) each having a thickness corresponding to several atomic layers which is small enough to prevent discrete quantization levels from being generated. This provides a SiGeC mixed crystal which is free from Ge—C bonds and has good crystalline quality and thermal stability. The Si1−xGex/Si1−yCy short-period superlattice is fabricated by a method in which Si1−xGex layers and Si1−yCy layers are epitaxially grown alternately, or a method in which a Si/Si1−xGex short-period superlattice is first formed and then C ions are implanted into the superlattice followed by annealing for allowing implanted C ions to migrate to Si layers.

Abstract: A semiconductor component, selected from the group comprising a photodetector, a light emitting diode, an optical modulator and a waveguide. The semiconductor component comprises an Si substrate, an active region formed on said substrate, and an Si capping layer on said active region. In one embodiment the active region is a superlattice comprising alternating layers of Si1-yCy and Si1-x-yGexCy, with the atomic fraction y of the Si1-x-yGexCy layers being equal to or different from the atomic fraction y of the Si1-yCy layers. In another embodiment it is a superlattice comprising a plurality of periods of a three-layer structure comprising Si, Si1-yCy and Si1-xGex layers. In a third embodiment it is a superlattice comprising a plurality of periods of a three-layer structure comprising Si, Si1-yCy and Si1-x-yGexCy layers, with the atomic fraction y of the Si1-x-yGexCy layers being equal to or different from the atomic fraction y of the Si1-yCy layers.

Abstract: The present invention provides a photoreceiving device that is inexpensive and has good properties as a photoreceiving device for selectively receiving long wavelength light. This is a semiconductor photoreceiving device 10 for selectively receiving long wavelength light from multiplexed light including long wavelength light A and short wavelength light B. This photoreceiving device comprises a multilayered film 22 comprising alternately stacked layers of materials having mutually different indexes of refraction and the thicknesses and number of which are designed so as to transmit said long wavelength light and reflect said short wavelength light; and a first light-absorbing layer 14 composed of a material having a band gap wavelength longer than the wavelength of said long wavelength light.

Abstract: A stacked material free from a degraded quality of crystal, formed with a precise periodicity, and fabricated without relying on the vapor phase growth method is provided. An optical function device using the stacked material is also provided. A starting stacked material composed of two alternate layers (A), (B) having different refractive indexes is stacked over two periods or more by a substrate bonding method to provide a multi-periodic stacked structure.

Abstract: A novel amorphous optical device contributes to economic construction of optical computers. Since economic parallel processing of signals such as image information is made possible, the novel amorphous optical device contributes also to development of optical computers capable of performing ultra-high speed and parallel processing, object recognizing apparatuses in which image optical signals are processed by using image optical signals, motion picture extracting apparatuses used for eyes of robots and object movement monitors and optical surge absorbers. An amorphous optical device which is doped with an element having a negative optical input-output characteristic to incident light, wherein the number of ions and/or atoms of the element is 1×1026 to 2.