With Specified Semiconductor Materials Patents (Class 257/22)
  • Patent number: 6054706
    Abstract: The subject invention includes a far-infrared detector based on InSbBix1-x which operates 12 .mu.m at room temperature with an energy band gap as low as 0.13 eV (9.3 .mu.m) at 77K and 12 .mu.m at 300K. The subject invention may be prepared by growing epitaxial layers of InSbBi on InSb which is grown on a suitable substrate. The wavelength of absorption may be controlled through the variation of the Bi concentration in the InSbBi active layer.
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: April 25, 2000
    Assignee: Northwestern University
    Inventor: Manijeh Razeghi
  • Patent number: 6043517
    Abstract: A photodetector which can be operated in two wavelength ranges and is comprised of two detectors (A, B) arranged one on top of the other. A Si Schottky diode forms detector A which absorbs light in a region .lambda.<0.9 .mu.m. Longer-waved light (1 .mu.m<.lambda.<2 .mu.m) is absorbed in detector B which is comprised of an Si/SiGe pn-diode. To increase the efficiency, detector B is made with an integrated resonator. A further increase of the efficiency of the photodetector is accomplished through the mounting of a Bragg reflector on the absorbing layer of detector B.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: March 28, 2000
    Assignee: Daimler-Benz AG
    Inventors: Hartmut Presting, Ulf Konig, Andreas Gruhle
  • Patent number: 6040588
    Abstract: A semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of In.sub.Y1 Ga.sub.1-Y1 N (Y1.gtoreq.0) and a quantum well layer being made of In.sub.Y2 Ga.sub.1-Y1 N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: March 21, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6037603
    Abstract: An opto-electronic device, such as a light-emitting diode, comprises a transparent high lateral conductivity current spreading layer 31 overlying a conventional p-n junction active region 10. The current spreading layer 31 comprises a multiple quantum-well heterostructure having a plurality of thin layers 33 of a material having a band-gap narrower than the band-gap of the active region disposed between layers 32 of a material having a band-gap greater than or equal to the band-gap of the active region 10, the wide band-gap layers 32 being more highly doped than said narrow band-gap layers 33. Quantum confinement occurs in the narrow band-gap layers 33, so that it becomes transparent to light emitted from the active region 10. Furthermore, the layers 33 of narrow band-gap material become highly conductive owing to charge carriers which have transferred from the more highly doped wide band-gap material layers 32.
    Type: Grant
    Filed: May 21, 1998
    Date of Patent: March 14, 2000
    Assignee: Epitaxial Products International Limited
    Inventor: Andrew William Nelson
  • Patent number: 6037604
    Abstract: A InGaSb/GaSb strained-layer superlattices infrared photodetector in which the light-hole and heavy-hole are dispersed by the stress of the lattice mismatch, making the confined energy of the light hole and that of the heavy hole different. The wave function coupling of 1C-1HH is larger at near zero bias, thus the 1C-1HH is dominant. The wave function coupling of 1C-1LH is increased as reverse bias increases. When the reverse bias is high enough, the 1C-1HH transition becomes dominant. Because the transition energy of 1C-1HH and that of 1C-1LH are different, the modes of photodetector can be modulated by applying voltage.
    Type: Grant
    Filed: August 30, 1994
    Date of Patent: March 14, 2000
    Assignee: National Science Council
    Inventors: Yan-Kuin Su, Shi-Ming Chen
  • Patent number: 6031244
    Abstract: A luminescent semiconductor device comprises: an active layer composed of a Group II-VI semiconductor device which comprises at least one Group II element selected from the group consisting of zinc, magnesium, beryllium, cadmium, manganese and mercury, and at least one Group VI element selected from the group consisting of oxygen, sulfur, selenium and tellurium. the Group II-VI compound semiconductor forming said active layer contains at least one element selected from the group consisting of magnesium, beryllium and cadmium as the Group II element and tellurium as the Group VI element. At least one antidiffusion layer preventing diffusion of these elements from the active layer is provided on at least one surface of the active layer.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: February 29, 2000
    Assignee: Sony Corporation
    Inventors: Hiroyasu Noguchi, Kazushi Nakano, Akira Ishibashi, Atsushi Toda, Satoshi Taniguchi, Tomonori Hino, Eisaku Kato
  • Patent number: 6031256
    Abstract: Structure of a wide voltage operation regime double heterojunction bipolar transistor, specifically a modified InGaP/GaAs double heterojunction bipolar transistor featuring a very broad collector-emitter voltage operation range, an invention of high speed, low power consumption and high breakdown voltage rated microwave power transistor. Unique in the incorporation of In.sub.0.49 Ga.sub.0.51 P collector layer, GaAs delta-doping sheet and undoped GaAs spacer in the collector zone. The introduction of a spacer with a delta doping sheet into the effective base-collector heterojunction serves to eliminate potential spike from appearing at base-collector interfacing any more, thus effectively precludes electron blocking effect. In the emitter zone the inventive design comprises a five-period In.sub.0.49 Ga.sub.0.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: February 29, 2000
    Assignee: National Science Council of Republic of China
    Inventors: Wen-Chan Liu, Shiou-Ying Cheng
  • Patent number: 6025604
    Abstract: Dispose a fine metal particle on a semiconductor substrate. By heat-treating this in a vacuum, a constituent element of the semiconductor substrate is dissolved into the fine metal particle to form a solid solution, resulting in further formation of a homogeneous liquid phase (liquid droplet) composed of semiconductor-metal. By annealing this, the constituent element of the semiconductor substrate is precipitated from the semiconductor-metal liquid droplet. Thus, a fine projection composite structure comprising a semiconductor substrate, a semiconductor fine projection epitaxially grown selectively at an arbitrary position on the semiconductor substrate, and a metal layer disposed selectively on the semiconductor fine projection, can be obtained. The metal layer can be removed as demands arise. Such a fine projection composite structure possesses applicability in, for instance, an ultra-high integration semiconductor device or a quantum size device.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: February 15, 2000
    Assignees: Japan Science and Technology Corporation, Kabushiki Kaisha Toshiba
    Inventors: Yutaka Wakayama, Shun-ichiro Tanaka
  • Patent number: 6022749
    Abstract: A method is provided for determining the temperature of a semiconductor fabrication process in which a resistivity versus temperature calibration curve for a superlattice structure is created. A plurality of similar superlattice structures which include alternating layers of a conductor and a semiconductor may be annealed at different temperatures. The resistivity of each superlattice structure may then be measured after the superlattice structures have been cooled to room temperature in order to form the calibration curve. A similar superlattice structure may then be subjected to the temperature at which the semiconductor fabrication process is typically performed, causing the resistivity of the superlattice structure to change. Based on the resulting resistivity of the superlattice structure, the calibration curve may be used to determine the process temperature of the superlattice structure during the fabrication process.
    Type: Grant
    Filed: February 25, 1998
    Date of Patent: February 8, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bradley M. Davis, Shengnian Davis Song, Sey-Ping Sun
  • Patent number: 6018166
    Abstract: The present invention includes forming a conductive layer on a substrate. Portions of the conductive layer are removed using a first photoresist layer as a mask. A first oxide layer is formed over the conductive layer and the substrate, and an amorphous silicon layer is then formed on the first oxide layer. After annealing the amorphous silicon layer, thereby transforming amorphous silicon layer to a polysilicon layer, a second oxide layer is formed on the polysilicon layer. The second oxide layer is removed using a second photoresist layer as a mask. An amorphous silicon carbon layer is formed over the second oxide layer and the polysilicon layer, and a heavily-doped amorphous silicon carbon layer is formed on the amorphous silicon carbon layer.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: January 25, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Kang-Cheng Lin, Hong-Jye Hong
  • Patent number: 6005259
    Abstract: The invention concerns an InAs/GaSb superlattice infrared detector that is prepared on a GaSb or a GaAs substrate by low pressure organometaleic chemical vapor deposition. The thickness of well and barrier modulated in the superlattice is used to control the wavelength of absorption. As the superlattice is sandwiched by the Si-doped InAs layer, the wavelength of absorption is in the 8.about.14 .mu.m range. As the superlattice is sandwiched by the Zn-doped GaSb layer, the wavelength of absorption is in the 3.about.5 .mu.m range.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: December 21, 1999
    Assignee: National Science Council
    Inventors: Yan-Kuin Su, Shoou-Jinn Chang, Shi-Ming Chen, Chuing-Liang Lin
  • Patent number: 5994639
    Abstract: Thermodynamically metastable skutterudite crystalline-structured compounds are disclosed having preselected stoichiometric compositions and superior and optimizable thermoelectric properties. The compounds are formed at low nucleation temperatures and satisfy the formula:M.sub.1-x M'.sub.4-y Co.sub.y M".sub.12wherein:M=any metal, metalloid, or mixture thereof, except for La, Ce, Pr, Nd, and Eu when x=0, and M'=Fe, Ru, or Os, and M"=Sb, P, or As;M'=Fe, Ru, Os, Rh, or mixture thereof;M"Sb, As, P, Bi, Ge.sub.0.5-w Se.sub.0.5+w, wherein w=0 to 0.5 or mixture thereof;x=0 to 1;y=0 to 4; andwherein M' and/or M" are doped or undoped. These compounds generally have the crystalline structure of a skutterudite, wherein the crystalline structure is cubic with 34 atoms in the unit-cell in the space group Im3. The M".sub.12 atoms occupy unit-cell sites 24(g), the M'.sub.4-y atoms form a cubic sublattice occupying unit-cell sites 8(c), and the M.sub.
    Type: Grant
    Filed: March 25, 1997
    Date of Patent: November 30, 1999
    Assignee: The State of Oregon Acting by and Through the State Board of Higher Education on Behalf of the University of Oregon
    Inventors: David C. Johnson, Marc Hornbostel
  • Patent number: 5977698
    Abstract: A cold-cathode emitter includes a high-voltage tank of a second conductivity that is formed in a substrate having a first conductivity. An emitter tip is integral with the tank and extends outwardly from the substrate. The tank forms either a drain region or a collector region of a transistor. A cold-cathode emitter device includes a drive transistor formed in a substrate of a first conductivity. The transistor includes an electron receive region of a second conductivity. An emitter tip is integral with the electron receive region and extends outwardly from the substrate.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: November 2, 1999
    Assignee: Micron Technology, Inc.
    Inventor: John K. Lee
  • Patent number: 5977564
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: November 2, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Setsuko Kobayashi, Takashi Shinohe, Tomoki Inoue, Akihiro Yahata
  • Patent number: 5970080
    Abstract: The gallium nitride compound semiconductor light emitting element includes: a substrate; a first semiconductor multilayer structure including, at least, an active layer, a first cladding layer of a first conductivity type, and a second cladding layer of a second conductivity type, the first and second cladding layers sandwiching the active layer therebetween; a dry etching stop layer of the second conductivity type formed on the first semiconductor multilayer structure; and a second semiconductor multilayer structure formed on the dry etching stop layer.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: October 19, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshio Hata
  • Patent number: 5959308
    Abstract: Heteroepitaxy of lattice-mismatched semiconductor materials such as GaAs (110) on silicon (102) is accomplished by formation of a defect annihilating grid (104) on the silicon (102) prior to the epitaxy of the GaAs (110).
    Type: Grant
    Filed: January 29, 1993
    Date of Patent: September 28, 1999
    Assignee: Texas Instruments Incorporated
    Inventors: Hisashi Shichijo, Richard J. Matyi
  • Patent number: 5952673
    Abstract: The optical semiconductor device comprises a multiple quantum well structure of an AlGaInAs system material formed on an InP semiconductor substrate. The multiple quantum well structure comprises a barrier layer of a below 1.0 .mu.m of PL wavelength and a below 4.5 nm of film thickness active layer alternately laid one on another. An above 0.5% compressive strain is applied to the active layer. Thus the AlGaInAs/InP system optical semiconductor can have good temperature characteristics.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: September 14, 1999
    Assignee: Fujitsu Limited
    Inventors: Toshio Higashi, Takuya Fujii
  • Patent number: 5932899
    Abstract: A semiconductor having enhanced acceptor activation is disclosed. The semiconductor comprises a ternary compound having a non-abruptly varying composition that is uniformly doped. The modulation of the chemical composition leads to a variation of the valence band energy. The modulation of the valence band results in a strong enhancement of the acceptor activation. A method for making a semiconductor having enhanced acceptor activation comprises two steps. They are (1) forming a ternary compound semiconductor having a non-abruptly varying composition, and (2) uniformly doping said semiconductor with a dopant. These two steps may be conducted simultaneously.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: August 3, 1999
    Assignee: Trustees of Boston University
    Inventor: E. Fred Schubert
  • Patent number: 5929461
    Abstract: A surface emission semiconductor laser device has a semiconductor laminate mirror constituted of a plurality of pairs of InGaAS/InAlP films epitaxially grown on a GaAs or InGaAs substrate and a laser element bonded to the laminate mirror. The InAlP films of the laminate mirror are lattice-matched or not lattice-matched due to the amount of Al in the InAlP films. The laminate mirror has a high relative refractive index between the InGaAs and InAlP films and thus has a high reflectance to thereby improve the emission efficiency of the surface emission laser device.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: July 27, 1999
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takeharu Yamaguchi, Michio Ohkubo, Takao Ninomiya
  • Patent number: 5929462
    Abstract: A semiconductor laser has a multiple-quantum well (MQW) structure overlying a first III-V compound semiconductor. The MQW includes a plurality of layer combinations including a strained well layer and a strained barrier layer, which are formed in a cyclic order. An ultra-thin intermediate film made of the first III-V compound semiconductor and having a thickness corresponding to from monoatomic layer to ten atomic layer is interposed between each strained well layer and each strained barrier layer. The intermediate film functions for preventing formation of mixed crystal formed between the well layer and the barrier layer, thereby improving current density threshold and other characteristics of the semiconductor laser.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: July 27, 1999
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Akihiko Kasukawa, Michio Ohkubo, Nobumitsu Yamanaka
  • Patent number: 5920078
    Abstract: This invention relates to the field of semiconductor devices. Silicon-based semiconductor devices ordinarily lack desirable optical properties because silicon's small, indirect band gap causes electrons to emit radiation with negligible quantum efficiency. This invention solves that problem by taking advantage of the change in the nature of the electron band gap when electron flow is confined within a one-dimensional channel known as a quantum wire. By biasing the junction between the quantum wire and the surrounding silicon support matrix with a voltage, a semiconductor device of this invention emits radiation of a variable and modulable wavelength, including visible light, as well as of a variable and modulable intensity. Alternatively, the workings of the device may be reversed such that it detects incoming radiation. Given its optical properties, such a device has numerous applications in the field of optoelectronics and integrated circuits.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: July 6, 1999
    Inventor: Jeffrey Frey
  • Patent number: 5917195
    Abstract: A structure of periodically varying density is provided, that acts as a phonon resonator for phonons capable of participating in phonon-electron interactions. Specifically, a phonon resonator that is resonant for phonons of appropriate momentum to participate in indirect radiative transitions and/or inter zone intervalley scattering events is provided. Preferably, the structure is an isotope superlattice, most preferably of silicon. The structure of the present invention has improved optical, electrical, and/or heat transfer properties. A method of preparing a the structure of the present invention is also provided.
    Type: Grant
    Filed: February 17, 1995
    Date of Patent: June 29, 1999
    Assignee: B.A. Painter, III
    Inventor: Thomas G. Brown
  • Patent number: 5917196
    Abstract: A group III-V type nitride compound semiconductor light-emitting device employing compound semiconductors the lattices of which are matched to each other and having a large band discontinuity value between the semiconductor layers is characterized in that it is a light-emitting device obtained by junction of a barrier layer and an active layer and that the active layer contains Nb. The present invention provides a group III-V type nitride compound semiconductor light-emitting device which has low threshold current and low threshold voltage characteristics.
    Type: Grant
    Filed: December 8, 1997
    Date of Patent: June 29, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Nobuaki Teraguchi
  • Patent number: 5900642
    Abstract: On a first cladding layer formed of n-type Al.sub.0.7 Ga.sub.0.3 P, an active region having a staggered-type (type II) heterojunction superlattice structure is disposed. The active region includes 50 light emitting layers formed of Al.sub.0.1 Ga.sub.0.9 P doped with nitrogen and 50 barrier layers formed of Al.sub.0.7 Ga.sub.0.3 P. The 50 light emitting layers and the 50 barrier layers formed of such materials are stacked alternately to form 50 pairs. On the active region, a second cladding layer formed of Al.sub.0.1 Ga.sub.0.9 P is disposed. In the formation of the active layers the composition of the light emitting layer and the barrier layer end the thickness of the barrier layer are controlled so that the isoelectronic level in the light emitting layer and the quantum level in the barrier layer will fulfill the resonance conditions.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: May 4, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatsu, Jun-ichi Nakamura
  • Patent number: 5889295
    Abstract: Disclosed is a long-life GaN-based semiconductor device which is achieved by reducing the operating voltage of the semiconductor device comprising a GaN-based or a ZnSe-based compound semiconductor formed on a sapphire substrate and by preventing the electromigration of metal atoms from an electrode into compound semiconductor layers. The operating voltage of the GaN-based or ZnSe-based semiconductor device formed on a sapphire substrate or a SiC substrate can be greatly reduced by employing a ZnO layer doped with a significant amount of Al as a material for forming ohmic contact to p- or n- compound semiconductor layers. The long-life GaN-based semiconductor device can be attained by preventing electromigration of atoms from a metallic electrode by use of ZnO layer. If a superlattice including the ZnO layer is employed as an optical guide layer or if the superlattice including the ZnO layer as an active layer, a long-life laser diode with a low operating voltage and a wide wavelength range can be obtained.
    Type: Grant
    Filed: February 26, 1997
    Date of Patent: March 30, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: John Rennie, Genichi Hatakoshi
  • Patent number: 5886361
    Abstract: A valence band quantum-well structure with a modulation doping for an optical-component implemented in Si technology. With this component, a high quantum efficiency and detection efficiency are accomplished. By way of spatial separation of the doped zone from the almost undoped SiGe quantum well, the Coulomb scattering and the recombination probability of the charge carriers drifting in the externally applied electrical field is greatly reduced at the doping material cores.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: March 23, 1999
    Assignee: Daimler Benz AG
    Inventors: Hartmut Presting, Milan Jaros
  • Patent number: 5886360
    Abstract: A semiconductor device includes a semiconductor substrate; a semiconductor laminated structure including a first barrier layer, a conduction layer including a natural superlattice, and a second barrier layer, disposed on the semiconductor substrate. The first barrier layer, the conduction layer, and the second barrier layer produce heterojunctions that confine charge carriers within the conduction layer. The first barrier layer has steps at the surface contacting the conduction layer, the steps including, alternatingly arranged, a first crystal plane having a first orientation and a second crystal plane having a second orientation. The conduction layer includes first portions where the natural superlattice is ordered and second portions where the natural superlattice is disordered, the first and second portions being disposed on the first and second crystal planes, respectively. The degree of order in the conduction layer is higher in the first portions than in the second portions.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: March 23, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Seiji Ochi
  • Patent number: 5880483
    Abstract: A field effect transistor having a substrate supporting an active layer comprising a Group III-V material. The active layer has a dopant concentration with a source electrode and a drain electrode disposed over and with a gate electrode disposed between the source and drain electrodes in Schottky barrier contact to the active layer. A surface layer portion of the active layer has a negatively charged surface potential disposed between the drain and gate electrodes comprised of said Group III-V material and oxygen. The surface layer portion has a thickness in the range of 25 .ANG. to 35 .ANG.. A layer of passivation material is disposed at least on the surface layer portion of the active layer.
    Type: Grant
    Filed: February 23, 1993
    Date of Patent: March 9, 1999
    Inventors: Stanley R. Shanfield, Bharat Patel, Hermann Statz
  • Patent number: 5880491
    Abstract: A low-cost Si-based construction for optical and electronic bulk-heterostructure devices and multiple-quantum-well devices in which the active layers of the device are SiC or AlGaN or InGaN or InAlN. Material quality is high, and the MQW devices such as blue light lasers or LEDs have stable pseudomorphic layers with low defect densities. The low-cost large-area 3C SiC substrate is created by converting 100% of a 100-500 angstrom (.ANG.) layer of Si in a silicon-on-insulator wafer to 3C SiC with propane at 1300 degrees C. The SiO2 layer provides strain-free support for the "perfect" 3C SiC crystal layer. Direct-gap wurtzite nitride heterostructures, bulk or pseudomorphic MQW, are grown upon an (0001) 6H SiC epilayer on the (111) 3C SIC substrate, or directly upon the (111) 3C SiC substrate. For zincblende heterostructures, a (100) 3C SiC substrate is used.
    Type: Grant
    Filed: January 31, 1997
    Date of Patent: March 9, 1999
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Richard A. Soref, Fereydoon Namavar
  • Patent number: 5856685
    Abstract: A heterojunction field effect transistor having an InP substrate, comprising a buffer layer formed between an active layer where a carrier travels and said InP substrate, wherein said buffer layer has at least two cycles of superlattices, each of said superlattices being formed of at least one semiconductor selected from the group consisting of Al.sub.x In.sub.1-x P (0.1.ltoreq.x.ltoreq.1), Ga.sub.x In.sub.1-x P (0.ltoreq.x.ltoreq.1), Al.sub.x Ga.sub.1-x As (0.ltoreq.x.ltoreq.1), and Al.sub.x In.sub.1-x As (0.5.ltoreq.x.ltoreq.1), and at least one semiconductor selected from the group consisting of InP and In.sub.0.52 Al.sub.0.48 As.
    Type: Grant
    Filed: February 21, 1996
    Date of Patent: January 5, 1999
    Assignee: NEC Corporation
    Inventor: Tatsuo Nakayama
  • Patent number: 5851310
    Abstract: An indium phosphide photovoltaic cell is provided where one or more quantum wells are introduced between the conventional p-conductivity and n-conductivity indium phosphide layer. The approach allows the cell to convert the light over a wider range of wavelengths than a conventional single junction cell and in particular convert efficiently transparency losses of the indium phosphide conventional cell. The approach hence may be used to increase the cell current output.A method of fabrication of photovoltaic devices is provided where ternary InAsP and InGaAs alloys are used as well material in the quantum well region and results in an increase of the cell current output.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: December 22, 1998
    Assignee: University of Houston
    Inventors: Alexandre Freundlich, Philippe Renaud, Mauro Francisco Vilela, Abdelhak Bensaoula
  • Patent number: 5850089
    Abstract: Modulated-structure polycrystalline or heteroepitaxial multilayers of PZT/PT ferroelectric thin films are deposited on a substrate, preferably by laser ablation. The laser ablation of the PZT/PT layers onto a prepared substrate occurs while maintaining the substrate at a temperature between 380.degree. C. to about 650.degree. C. The target source for the PZT/PT laser ablated film may be either bulk PZT and PT ceramics or powders or individual metal oxides or metal pellets. The ferroelectric thin film device may be used for a random access memory.
    Type: Grant
    Filed: March 13, 1992
    Date of Patent: December 15, 1998
    Assignee: American Research Corporation of Virginia
    Inventors: Usha Varshney, Angus Ian Kingon
  • Patent number: 5847418
    Abstract: Described is a semiconductor photo detector comprising, between a lower electrode and an upper electrode, an optical absorption layer which generates photo carriers, receiving light and an amplification layer which amplifies the photo carriers so generated. In the semiconductor photo detector, the amplification layer is formed of a well layer which causes an avalanche phenomenon and a barrier layer which has a band gap larger than that of the optical absorption layer. The well layer is formed of a crystal substance, by which at the interface with the barrier layer, the energy value of the conduction band of the photo carriers in the well layer is lower than that in the barrier layer and at the same time, the difference in the energy value of the conduction band between the well layer and the barrier layer is larger than the band gap between the valence band and the conduction band of the well layer.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: December 8, 1998
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Takeshi Nakamura, Shinya Kyozuka, Takayuki Yamada, Yasuaki Miyamoto
  • Patent number: 5841152
    Abstract: An optical semiconductor device provided with a strained quantum well layer uses a ternary mixed-crystal compound semiconductor substrate on which a strained quantum well layer sandwiched by barrier layers is formed.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: November 24, 1998
    Assignee: Fujitsu Limited
    Inventor: Hiroshi Ishikawa
  • Patent number: 5841151
    Abstract: A semiconductor device having a quantum well structure, the quantum well structure having: a first quantum well layer for forming a quantum well for electrons, the first quantum well layer having a first band structure; a second quantum well layer for forming a quantum well for holes, the second quantum well layer having a second band structure different from the first band structure; and an intermediate layer interposed between the first and second quantum well layers having a third band structure different from the first and second band structures, wherein the first quantum well layer forms a barrier to holes, and the second quantum well layer forms a barrier to electrons. Semiconductor devices having quantum well structures different from conventional type I and II quantum well structures are provided.
    Type: Grant
    Filed: October 17, 1995
    Date of Patent: November 24, 1998
    Assignee: Fujitsu Limited
    Inventor: Richard Sahara
  • Patent number: 5834792
    Abstract: The disclosed novel doping method makes it possible to tailor the effective activation energy of a dopant species in semiconductor material. The method involves formation of very thin layers of .delta.-doped second semiconductor material in first semiconductor material, with the second material chosen to have a bandgap energy that differs from that of the first material. Exemplarily, in a Be-doped GaAs/AlGaAs structure according to the invention the effective activation energy of the dopant was measured to be about 4 meV, and in conventionally Be-doped GaAs it was measured to be about 19 meV. The invention can be advantageously used to dope III-V and II-VI semiconductors. In some cases it may make possible effective doping of a semiconductor for which prior art techniques are not satisfactory.
    Type: Grant
    Filed: August 25, 1993
    Date of Patent: November 10, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: John Edward Cunningham, Won-Tien Tsang
  • Patent number: 5831277
    Abstract: The subject invention involves the p-type doping of Al.sub.x Ga.sub.1-x N thin films with a III-nitride composition and specifically a {Al.sub.x Ga.sub.1-x N/GaN} short-period superlattice structure of less than 5000 .ANG. thickness in total in which both the barriers and the wells are p-type doped with Mg.
    Type: Grant
    Filed: March 19, 1997
    Date of Patent: November 3, 1998
    Assignee: Northwestern University
    Inventor: Manijeh Razeghi
  • Patent number: 5818073
    Abstract: A semiconductor device includes a III-V compound semiconductor layer including two or more Group III elements and containing dopant impurities, including a spontaneous superlattice, and having a stripe shape with two ends, and electrodes disposed on the ends of the stripe shaped semiconductor layer to form a resistor element. Because of the spontaneous superlattice, electrons are one-dimensionally confined within the III-V compound semiconductor layer, i.e., the electrons flow easier in the direction perpendicular to the periodic direction of the spontaneous superlattice than in the direction parallel to it, resulting in anisotropic of electrical resistivity. Therefore, the orientation of the resistor element with respect to the periodic direction of the spontaneous superlattice becomes another factor in determining the resistance of the resistor element.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: October 6, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Seiji Ochi, Tatuya Kimura
  • Patent number: 5808314
    Abstract: The present invention relates to a semiconductor emission device with fast wavelength modulation and constituted by three sections, namely two lateral sections, each having an active layer and a DFB network and which produce an optical gain, connected across a central electroabsorbant section, to which is applied a reverse voltage making it possible to quasi-instantaneously modify the absorption rate in said section.
    Type: Grant
    Filed: August 30, 1996
    Date of Patent: September 15, 1998
    Assignee: France Telecom
    Inventors: Hisao Nakajima, Josette Charil, Serge Slempkes
  • Patent number: 5804834
    Abstract: In a wide band cap semiconductor, a GaP.sub.x N.sub.1-x (0.1.ltoreq.x.ltoreq.0.9) layer is inserted between a layer comprising AlGaInN and an electrode, The potential barrier between the electrode and the surface layer can be reduced. Contact resistance can be decreased, and ohmic contact can be easily taken up.
    Type: Grant
    Filed: July 7, 1997
    Date of Patent: September 8, 1998
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Kenji Shimoyama, Hideki Gotoh
  • Patent number: 5799026
    Abstract: A gain region for an interban quantum well laser incudes (a) an emitter ron of semiconductor material having at least one conduction subband and at least one valence subband, these subbands being spaced apart by an energy band-gap; (b) a collector region of semiconductor material having at least one conduction subband and at least one valence subband, these subbands spaced apart by an energy band-gap; (c) a type-I or type-II active region; and (d) a blocking quantum well region of semiconductor material between the active region and the collector region, for keeping electrons in the active region from tunnelling or scattering into the collector region, but allowing electrons in the highest valence subband in the active region to pass into the collector region.
    Type: Grant
    Filed: November 1, 1996
    Date of Patent: August 25, 1998
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Jerry Meyer, Igor Vurgaftman, Ruan Q. Yang
  • Patent number: 5796118
    Abstract: A photodetection semiconductor device is constructed in such a manner that a photodiode light absorbing layer includes an Si/SiGe super-lattice layer (6), which forms a layer in parallel with the surface of a silicon substrate (1), and upper and lower P type low Ge concentration SiGe epitaxial layers (5) and (7), which sandwich the Si/SiGe super-lattice layer between them and contain Ge lower than a Ge content in the Si/SiGe super-lattice layer, a highly dense P+ type Si contact layer (8) is directly formed on the upper SiGe epitaxial layer (7) and a highly dense N+ type epitaxial layer (2) is formed immediately below the lower SiGe epitaxial layer (5). Preferably, Ge concentration in each of the upper and lower SiGe epitaxial layers (5) and (7) is set to be at least 1% or higher.
    Type: Grant
    Filed: December 27, 1996
    Date of Patent: August 18, 1998
    Assignee: NEC Corporation
    Inventors: Takenori Morikawa, Tsutomu Tashiro
  • Patent number: 5796119
    Abstract: A resonant tunneling diode (400) made of a silicon quantum well (406) with silicon oxide tunneling barriers (404, 408). The tunneling barriers have openings (430) of size smaller than the electron wave packet spread to insure crystal alignment through the diode without affecting the tunneling barrier height.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: August 18, 1998
    Assignee: Texas Instruments Incorporated
    Inventor: Alan C. Seabaugh
  • Patent number: 5793054
    Abstract: A gallium nitride type compound semiconductor light emitting element, such as a semiconductor laser, a light emitting diode is constructed by forming an In.sub.0.06 Ga.sub.0.94 N buffer layer, an n-type In.sub.0.06 Ga.sub.0.94 N clad layer, an n-type In.sub.0.06 Al.sub.0.15 Ga.sub.0.79 N clad layer, an undoped GaN active layer having layer thickness of 50 nm, a p-type In.sub.0.06 Al.sub.0.15 Ga.sub.0.79 N clad layer and a p-type In.sub.0.06 Ga.sub.0.94 N cap layer on a (0001) azimuth sapphire substrate. A p-side electrode is formed on the p-type In.sub.0.06 Ga.sub.0.94 N cap layer, and an n-side electrode is formed on the n-type In.sub.0.06 Ga.sub.0.94 N clad layer. In the construction set forth above, a greater thickness for the active layer is provided. Also, tensile strain is applied to the active layer. Light is taken out in parallel direction to the substrate. This threshold current of the semiconductor laser is lowered and light emitting efficiency of the light emitting diode is improved.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: August 11, 1998
    Assignee: NEC Corporation
    Inventor: Masaaki Nido
  • Patent number: 5793092
    Abstract: A thermoelectric radiation detector having a substrate (1) and a film (2) of solid state material having thermal anisotropy and containing YBa.sub.2 Cu.sub.3 O.sub.7, formed on the surface of the substrate, and wherein said film has CuO.sub.2 planes (3) inclined with respect to the substrate plane, the improvement wherein at least a portion of the Y is replaced by another rare earth metal and/or at least a portion of the Ba and/or of the Cu is replaced by at least one other heavy metal at least in partial areas of the film and in a sufficient amount to increase the thermal anisotropy of the detector.
    Type: Grant
    Filed: September 22, 1995
    Date of Patent: August 11, 1998
    Assignee: Max-Planck-Gesselschaft
    Inventors: Hanns-Ulrich Habermeier, Gerold Jager-Waldau, Bernd Leibold, Najeh Jisrawi
  • Patent number: 5783838
    Abstract: Described is a semiconductor photo detector comprising, between two electrodes, at least one of said electrodes being a transparent electrode, an optical absorption layer which is composed of a non-single crystalline material, absorbs light and generates photo carriers and a carrier multiplication layer which is composed of a non-single crystalline material and multiplies the photo carriers generated by the optical absorption layer. The carrier multiplication layer is formed of a multilayer film obtained by stacking films each having plural layers which are composed of non-single crystalline Zn.sub.x Cd.sub.1-x M (0.ltoreq.x.ltoreq.1, M represents one selected from the group consisting of S, Se and Te) and are different in a composition ratio in accordance with a change in the value of x in said Zn.sub.x Cd.sub.1-x M, whereby a band discontinuity .DELTA.Ec of the conduction band can be made larger, an ionization rate of electrons can be heightened and the place where ionization occurs can be specified.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: July 21, 1998
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Shinya Kyozuka, Takeshi Nakamura, Takayuki Yamada, Yasuaki Miyamoto
  • Patent number: 5763896
    Abstract: A separate absorption thermal conduction band infrared photocathode fabricated with an engineered material system having energy band gaps specifically selected to provide an energy barrier that is selectively tuned to the momentum and energy of the photogenerated carriers. Such a material system produces an infrared detector having a substantially reduced dark current.
    Type: Grant
    Filed: February 3, 1997
    Date of Patent: June 9, 1998
    Assignee: ITT Industries, Inc.
    Inventor: Arlynn Walter Smith
  • Patent number: 5753933
    Abstract: Disclosed is an optical semiconductor device includes a multiquantum well structure comprising a well layer and a barrier layer, wherein: the well layer is made of InGaAsP, InGaAs or InGaP; the barrier layer is made of InGaAlAsP, InGaAlAs or InGaAlP; and optionally the well layer has the same In/Ga ratio as the barrier layer and the well layer is compressively strained. Also disclosed is a vapor-phase growth method of a multiquantum well structure comprises a well layer and a barrier layer or further comprises an intermediate layer between the well layer and the barrier layer, comprising the steps of: continuously supplying at a constant flow rate one or several V group gases and one or several first III group gases during the growth of the multiquantum well; forming the well and barrier layer by interrupting the supply of a second III group gas different from the first III group gas; and forming the intermediate layer by varying a flow rate of the second III group gas.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: May 19, 1998
    Assignee: NEC Corporation
    Inventor: Takao Morimoto
  • Patent number: 5751014
    Abstract: On a first cladding layer formed of n-type Al.sub.0.7 Ga.sub.0.3 P, an active region having a staggered-type (type II) heterojunction superlattice structure is disposed. The active region includes 50 light emitting layers formed of Al.sub.0.1 Ga.sub.0.9 P doped with nitrogen and 50 barrier layers formed of Al.sub.0.7 Ga.sub.0.3 P. The 50 light emitting layers and the 50 barrier layers formed of such materials are stacked alternately to form 50 pairs. On the active region, a second cladding layer formed of Al.sub.0.1 Ga.sub.0.9 P is disposed. In the formation of the active layer, the composition of the light emitting layer and the barrier layer and the thickness of the barrier layer are controlled so that the isoelectronic level in the light emitting layer and the quantum level in the barrier layer will fulfill the resonance conditions.
    Type: Grant
    Filed: May 22, 1997
    Date of Patent: May 12, 1998
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatsu, Jun-ichi Nakamura
  • Patent number: 5742071
    Abstract: A logical operation circuit in which wiring as generally performed between transistors is made unnecessary to improve reliability, stability and integration degree of a logical circuit using a tunnel phenomenon, for example, a single-electron tunnel phenomenon, or a flight phenomenon of a particle group. Conducting materials are arranged in a two-dimensional plane or three-dimensional space in the logical circuit. When two conducting materials are arranged to be nearest each other, the two conducting materials are connected, for example, by a single-electron tunnel phenomenon. When two conducting materials are arranged to be not nearest, there is no connection between the conducting materials by the tunnel phenomenon. Propagation of electrons is controlled by changing the arrangement.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: April 21, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Shiroo Kamohara, Peter M. Lee, Hitoshi Matsuo, Sigeo Ihara