Abstract: An active pixel image sensor is formed on a P-type epitaxial layer on a P-type substrate. An active pixel array is in the P-type epitaxial layer. Each pixel includes an N-well functioning as a collection node, and a P-well adjacent the N-well. The P-well includes only NMOS transistors functioning as active elements. The in-pixel transistors cooperate with off-pixel PMOS transistors to form A-D converters.

Abstract: A image detector comprises a light source for radiating light in accordance with a predetermined signal; a window for transmitting the light from the light source; a thin film phototransistor for generating an optical current in accordance with the intensity of external light; a storage capacitor for storing charge information transmitted from the thin film phototransistor; a thin film switching transistor for outputting the information stored in the storage capacitor in accordance with an external control signal; an insulating layer for covering the window, the thin film phototransistor, the storage capacitor, and the thin film switching transistor; a protecting layer formed on the insulating layer; and a conductive object detection pattern formed on the protecting layer to apply an electrical power supply signal to the light source when a conductive living object contacts the conductive objecting detecting pattern.

Abstract: A single capacitor (C) can be used for both readout and noise reduction in an imaging sensor. This dual-purpose use of the single capacitor is facilitated by a switching arrangement (?1-?5) which connects the capacitor to a low impedance node (n7, n41) during charge storage. The low impedance node is also used to drive a column readout line (Vout).

Abstract: A liquid crystal display device comprises a pair of substrates (11, 12) bonded to each other by a sealing material (13) in the form of a frame provided therebetween, liquid crystal (14) held between the pair of substrates; a reflective layer (111) formed on one (11) of the substrates, and an alignment film (116) formed over the reflective layer (111) at the liquid crystal side. The surface of said one (11) of the substrates has a roughened area (11b) which is roughened and a flat area (11a) which is flat and surrounds the roughened area (11b). The alignment film (116) is formed in the roughened area (11b), and the sealing material (13) is formed in the flat area (11a).

Abstract: A solid state imaging device includes a transparent insulation film. The insulation film is laminated on transfer electrodes over the power supply lines. A transparent protection film, which has a refractive index that is greater than that of the insulation film, is laminated on the insulation film. The transparent insulation film has portions above the channels in which the thickness continuously increases from the center of adjacent channels to the associated channel separating region.

Abstract: A unit pixel in a CMOS image sensor with a high sensitivity is employed by modifying a unit pixel circuit and a layout. The unit pixel in the CMOS image sensor includes: a photodiode; a transfer transistor disposed between the photodiode and a floating diffusion node, wherein a transfer control signal is applied to a gate; a reset transistor disposed between the photodiode and a VDD terminal, wherein a reset control signal is applied to a gate and a VDD is applied to a drain; a drive transistor of which a drain is connected to the VDD terminal and a gate is connected to the floating diffusion node; a selection transistor of which a drain is connected to a source of the drive transistor and a source is connected to an output terminal, wherein a selection control signal is applied to a gate; and a dummy transistor disposed between the drive transistor and the floating diffusion node, of which a gate is connected to the floating diffusion node.

Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.

Abstract: An organic integrated device for thin film transistor and light emitting diode. The organic integrated device of the present invention includes a top-gate organic thin film transistor (top-gate OTFT) and an organic light emitting diode (OLED), both formed on the same substrate. In the organic integrated device, some layers can be commonly used by both OTFT and OLED, and some layers can be made of the same material and formed in the same course, which simplifies the entire process.

Abstract: An active matrix organic electroluminescent display device of the present invention is fabricated through a six-mask process unlike the related art that uses eight masks. In the present invention, since the ground line and the power line are entirely disposed above the substrate, the resistance of the power line is reduced and the thermal damage that may occur in the power line during driving the device is prevented. Therefore, the image quality increases and the uniformity in the display can be obtained. Furthermore, due to the reduction of the mask process, the occurrence of defects is reduced and the production yield can be raised. Additionally, the principles of the present invention can be applied to either the top emission type organic electroluminescent display device or the bottom emission type organic electroluminescent display device. When it is utilized for the top emission type, the active matrix organic electroluminescent display device can have a high aperture ratio.

Abstract: Depletion-mode ferroelectric transistors are adapted for use as non-volatile memory cells. Various embodiments are described having a diode interposed between the bit line and a source/drain region of the transistor for added margin against read disturb. Various additional embodiments are described having an array architecture such that two memory cells sharing the same bit line also share the same program line. Using this configuration, non-selected cells are readily supplied with gate/source voltages sufficient to maintain the cells in a deactivated state during read and write operations on selected cells.

Abstract: A unit pixel in a CMOS image sensor is employed to reduce a threshold voltage of a reset transistor by modifying a unit pixel circuit. The unit pixel in the CMOS image sensor including: a semiconductor substrate including an epitaxial layer in which an active area and a FOX area are defined; a photodiode formed in the epitaxial layer; a transfer transistor including source/drain regions disposed between the photodiode and a floating diffusion node, wherein a control signal is applied to a gate thereof; a reset transistor including source/drain regions disposed between the floating diffusion node and a VDD terminal, wherein a control signal is applied to a drain thereof; a drive transistor of which a gate is connected to the floating diffusion node and a drain is connected to the VDD terminal; and a selection transistor of which a drain is connected to the drain of the drive transistor and a source is connected to an output terminal, wherein a control signal is applied to a gate thereof.

Abstract: The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.

Abstract: Depletion mode ferroelectric transistors are adapted for use as non-volatile memory cells. Various embodiments are described having a diode interposed between the bit line and a source/drain region of the transistor for added margin against read disturb. Various additional embodiments are described having an array architecture such that two memory cells sharing the same bit line also share the same program line. Using this configuration, non-selected cells are readily supplied with gate/source voltages sufficient to maintain the cells in a deactivated state during read and write operations on selected cells.

Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.

Abstract: A resin-dispersed organic semiconductor layer (3) is formed on a lower electrode (2) of an ITO transparent electrode formed on a glass substrate (1). An upper electrode (4) of a gold deposited film is formed on the resin-dispersed organic semiconductor layer (3). The resin-dispersed organic semiconductor layer (3) is formed by spin-coating a dispersion liquid prepared by mixing a perylene pigment and polycarbonate in a THF solvent and drying the coating. By applying a voltage by means of the electrodes (2, 4) and by irradiating the resin-dispersed organic semiconductor layer (3) with light, a multiplied light irradiation-induced current flows.

Abstract: A method of manufacturing an organic light-emitting device having reduced ambient-light reflection is disclosed. The method comprises the following steps. First, a metal reflective layer is formed on a provided substrate. Then a transparent anode, an organic layer, a translucent electron-injecting cathode, a buffer layer and a transparent electrode are sequentially deposited on the metal reflective layer. In order to reduce the affect of the ambient-light reflection, adjusting the thickness of the aforementioned layers that the reflected lights generate destructive optical interference and improve the visually perceived contrast of the emitted light.

Abstract: Depletion-mode ferroelectric transistors are adapted for use as non-volatile memory cells. Various embodiments are described having a diode interposed between the bit line and a source/drain region of the transistor for added margin against read disturb. Various additional embodiments are described having an array architecture such that two memory cells sharing the same bit line also share the same program line. Using this configuration, non-selected cells are readily supplied with gate/source voltages sufficient to maintain the cells in a deactivated state during read and write operations on selected cells.

Abstract: In an electron beam detector, a light guide optically couples a fluorescence emitting surface of the compound semiconductor substrate to a light incident surface of the photodetector, and physically connects the compound semiconductor substrate with the photodetector, thereby integrating the compound semiconductor substrate with the photodetector. When the compound semiconductor substrate converts incident electrons to fluorescent light, the light guide guides the fluorescent light to the photodetector, and the photodetector detects the fluorescent light, thereby detecting the incident electrons.

Abstract: The present invention is to provide an image sensor, including: a semiconductor substrate of a first conductive type: a peripheral circuit formed on a first region of the semiconductor substrate, wherein a ground voltage level is applied to the first region; a unit pixel array having a plurality of unit pixels formed on a second region of the semiconductor substrate, wherein the first region is isolated from the second region and wherein a negative voltage level is applied to the second region; and a negative voltage generator for providing the negative voltage for the second region.

Abstract: The present invention has an object of providing a light emitting device including an OLED formed on a plastic substrate, which can prevent the degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light emitting layer in the OLED (hereinafter, referred to as barrier films) and a film having a smaller stress than that of the barrier films (hereinafter, referred to as a stress relaxing film), the film being interposed between the barrier films, are provided. Owing to a laminate structure of a plurality of barrier films, even if a crack occurs in one of the barrier films, the other barrier film(s) can effectively prevent moisture or oxygen from penetrating into the organic light emitting layer. Moreover, the stress relaxing film, which has a smaller stress than that of the barrier films, is interposed between the barrier films, thereby making it possible to reduce a stress of the entire sealing film.

Abstract: The invention provides an elevated photodiode for image sensors and methods of formation of the photodiode. Elevated photodiodes permit a decrease in size requirement for pixel sensor cells while reducing leakage, image lag and barrier problems typically associated with conventional photodiodes.

Abstract: Disclosed is a photodiode having a p-type electrode of a mushroom shape. The p-type electrode is formed in a mushroom shape, so that the contact area faced by the spreading region of a dopant for the photodiode and the electrode can be minimized and the capacitance of the photodiode can be reduced. Further, the p-type electrode is configured to have a broader width in its upper end, thus allowing the wire bonding to be performed easily.

Abstract: Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted.

Abstract: Embodiments of the invention provide a method of forming a pixel cell and the resultant pixel cell a photo-conversion device formed at a surface of a substrate and a transistor adjacent to the photo-conversion device. The transistor comprises a gate overlying a channel region. The gate comprises at least one gate region having a work-function greater than a work-function of n+ polysilicon. The channel region comprises respective portions below each gate region. A dopant concentration in at least one portion of the channel region is determined at least in part by the work-function of the respective gate region.

Abstract: A conventional solid-state imaging device in which a sealing resin is applied onto a microlens has a low condensing efficiency. There are provided a photodiode 14 for receiving light, a microlens 4 made of a resin set on the photodiode 14 and having a refractive index of n3, a thin-film lens 3 formed on the microlens 4 and having a refractive index of n2, a sealing resin 2 formed on the thin-film lens 3 and having a refractive index of n1, and cover glass 1 formed on the sealing resin 2 to seal the sealing resin 2. The refractive index n2 of the thin-film lens 3 is set to a value smaller than n1 and n3. In this case, it is assumed that values of n1 and n3 are substantially equal to each other and the thin-film lens 3 is made of fluoride and/or oxide.

Abstract: A thin-film transistor is formed on a transparent substrate and has a gate electrode film layer and a source and drain regions, and further has an alignment mark made of one and the same constituent material as a constituent material of at least one of the gate electrode film layer and source and drain regions and formed at one and the same position as the gate electrode film layer or source and drain region.

Abstract: The subject invention is directed to use of photoconductors as conductors of light to photo diodes in a CMOS chip, wherein said photoconductors are separated by at least one low refractive index material (i.e. air). The present invention offers advantages over previous CMOS imaging technology, including enhanced light transmission to photo diodes. The instant methods for producing a CMOS imaging device and CMOS imager system involve minimal power loss. Since no lens is required, the invention eliminates concerns about radius limitation and about damaging lenses during die attach, backgrind, and mount. The invention also provides little or no cross talk between photo diodes.

Abstract: An active pixel array has the signal output of each pixel connected to a first column conductor, and a reset switch connected to a second column conductor. The first and second column conductors are connected to a read-reset amplifier. The read-reset amplifier operates in a first mode in which a reset voltage is applied to the second column line, and in a second mode in which pixel output signals are buffered from the first column line. The read-reset amplifier can also operate as a comparator forming part of an ADC circuit.

Abstract: An image sensor is disclosed. The image sensor includes a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. Further, a multilayer stack is formed over the pixels, the multilayer stack adapted to filter incident light in the infrared region. Finally, micro-lenses are formed over the multilayer stack and over the light sensitive element.

Abstract: A light emitting diode (LED) bulb includes a heat sink, a circuit layer having two opposite sides, multiple LEDs mounted on one side and an electrical insulating layer connected between the opposite side and the heat sink. Heat generated by the LEDs is conducted to the heat sink through the circuit layer and the electrical insulting layer and is dissipated quickly. Further, a fan can be mounted on the fins to dissipate heat from the heat sink more quickly. Therefore, the LED bulb has good heat dissipating efficiency.

Abstract: The invention provides a solid-state imaging device including a pixel array having a plurality of pixels arranged in a matrix. The pixels can each include a photo diode that generates carriers depending on the intensity of incident light, an accumulation region that accumulates the generated holes, an output transistor that outputs a signal according to threshold voltage that changes depending on the number of carriers accumulated in the accumulation region, and a clear transistor that discharges carriers accumulated in the accumulation region. One of semiconductor regions that form the photo diode and the accumulation region function as a source region of the clear transistor. In the accumulation period, if generated carriers spill from the source region of the clear transistor in the accumulation period, the clear transistor discharges the spilled carriers through a channel of the clear transistor in order to prevent the spilled carriers from entering the accumulation region of adjacent pixels.

Abstract: In a solid-state image-sensing device, an electric signal output from a photoelectric conversion circuit 100 is accumulated in a capacitor C1, and then a MOS transistor T5 is turned on so that the voltage integrated by the capacitor C1 is sampled in a MOS transistor T10. Thereafter, the electric charge obtained through amplification performed by the MOS transistor T10 flows into a capacitor C2, which performs integration so that a voltage commensurate with the integral of the amount of incident light appears at the capacitor C2.

Abstract: A MOS or CMOS based photoconductor on active pixel image sensor. Thin layers of semi-conductor material, doped to PIN or NIP photoconducting layers, located above MOS and/or CMOS pixel circuits produce an array of layered photodiodes. Positive and negative charges produced in the layered photodiodes are collected and stored as electrical charges in the MOS and/or CMOS pixel circuits. The present invention also provides additional MOS or CMOS circuits for reading out the charges and for converting the charges into images. With the layered photodiode of each pixel fabricated as continuous layers of charge generating material on top of the MOS and/or CMOS pixel circuits, extremely small pixels are possible with almost 100 percent packing factors. MOS and CMOS fabrication techniques permit sensor fabrication at very low costs. In preferred embodiments all of the sensor circuits are incorporated on or in a single crystalline substrate along with the sensor pixel circuits.

Abstract: In a solid-state imaging device in which a N-type photoelectric conversion region is formed in a P−-type well region, a light-blocking film and a transparent conductive film are formed on the N-type photoelectric conversion region with a second interlayer insulation film interposed therebetween. By applying a negative voltage to the light-blocking film and the transparent conductive film, a P++-type inversion region is formed in a topmost part of the N-type photoelectric conversion region.

Abstract: A new method and structure for the combined creation of CMOS devices and LED devices. The process starts with a substrate over the surface of which are designated a first surface region for the creation of CMOS devices there-over and a second surface region for the creation of LED devices there-over. A relatively thick layer of gate oxide is created over the surface of the substrate. The first surface region is blocked by a mask of photoresist after which the second surface region is exposed to a plasma etch, thereby providing roughness to the surface of the relatively thick layer of gate oxide and reducing the thickness thereof. The blocking mask is removed, additional oxidation of the exposed surface creates a relatively thick layer of gate oxide over the first surface area and a relatively thin layer of gate oxide over the second surface area.

Abstract: A photovoltaic solid state relay has a light-emitting diode for emitting light in response to an electrical control signal. First and second photovoltaic devices are optically coupled to the light-emitting diode for converting the light to first and second voltages, respectively. First and second unipolar transistors are provided having first and second gate electrodes for respectively receiving the first and second voltages and jointly establishing a first current conducting path between output terminals to which a load circuit will be connected. A bipolar transistor is provided having a base connected to a junction between the first and second unipolar transistors for establishing a second current conducting path in parallel to the first current conducting path in one of opposite directions depending on voltages applied to the output terminals.

Abstract: A solid-state imaging device includes at least one pixel section; and a control section for controlling an operation of the at least one pixel section. The at least one pixel section includes a light receiving section for outputting charges by performing photo-electric conversion of light incident thereon, and a transistor section having a charge accumulation region for accumulating the charges output by the light receiving section. The transistor section outputs an output signal representing a voltage value corresponding to an amount of charges accumulated in the charge accumulation region. The control section, for resetting the charges accumulated in the charge accumulation region after the output signal is output from the transistor section, injects the charges into the charge accumulation region before discharging the accumulated charges from the charge accumulation region.

Abstract: The invention provides a method of manufacturing an optical-gate transistor. A BP buffer layer is formed on a silicone substrate first, and a first AIN layer is then formed for offsetting strain in the layers deposited on the first AIN layer. Subsequently, a GaN layer and an n-type AIN layer are successively deposited to form a hetero-junction at the interface. A selective epitaxy or anisotropic etching of a GaN-group material is conducted to form a prism-shaped, light-receiving layer with a cubic lattice. The prism-shaped, light-receiving layer focuses incident light to induce electrons in the n-type AIN layer, which then form a high-speed 2DEG in the GaN layer, thereby increasing the power and sensitivity of the transistor being controlled by illumination.

Abstract: In a solid-state image pick-up device 10 in which a microlens layer 16 is provided on a surface of a semiconductor substrate 11 having photoelectric converting units 12H and 12L for storing an electric charge corresponding to an amount of incident light arranged vertically and horizontally, a microlens 16H to be provided on the microlens layer 16 is disposed on only the photoelectric converting unit 12H to be used as a pixel having a high sensitivity and the microlens layer 16 in a position facing the photoelectric converting unit 12L to be used as a residual pixel having a low sensitivity has a planar structure 16L or a perforated structure 16L.

Abstract: In a thin film transistor (TFT), a mask is formed on a gate electrode, and a porous anodic oxide is formed in both sides of the gate electrode using a relatively low voltage. A barrier anodic oxide is formed between the gate electrode and the porous anodic oxide and on the gate electrode using a relatively high voltage. A gate insulating film is etched using the barrier anodic oxide as a mask. The porous anodic oxide is selectively etched after etching barrier anodic oxide, to obtain a region of an active layer on which the gate insulating film is formed and the other region of the active layer on which the gate insulating film is not formed. An element including at least one of oxygen, nitrogen and carbon is introduced into the region of the active layer at high concentration in comparison with a concentration of the other region of the active layer. Further, N- or P-type impurity is introduced into the active layer.

Abstract: Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).

Abstract: An image sensor with improved productivity and sensitivity is provided. The image sensor includes a plurality of unit pixels, each unit pixel including an oxide film formed upon a semiconductor substrate; a gate electrode formed on the oxide film; a photodiode N-type region formed within the semiconductor substrate and interfacing with the oxide film, which is space apart from the gate electrode by a predetermined distance and disposed on one side of the gate electrode; and a floating diffusion region formed within the semiconductor substrate and interfacing with the oxide film, which is spaced apart from the gate electrode by a predetermined distance and is disposed on the other side of the gate electrode.

Abstract: The invention provides a method of manufacturing an optical-gate transistor. A BP buffer layer is formed on a silicone substrate first, and a first AIN layer is then formed for offsetting strain in the layers deposited on the first AIN layer. Subsequently, a GaN layer and an n-type AIN layer are successively deposited to form a hetero-junction at the interface. A selective epitaxy or anisotropic etching of a GaN-group material is conducted to form a prism-shaped, light-receiving layer with a cubic lattice. The prism-shaped, light-receiving layer focuses incident light to induce electrons in the n-type AIN layer, which then form a high-speed 2DEG in the GaN layer, thereby increasing the power and sensitivity of the transistor being controlled by illumination.

Abstract: A pinned photodiode is operated without a transfer gate. This is done by forming a pinned photodiode which has a selective connection to the substrate. When the connection is turned on, the photodiode is pinned to the substrate, and kept at a specified potential. When the connection is off, the photodiode is disconnected from the substrate and hence floats. In this way, the area above the photoreceptor can be used both for a reception area and for a charge transfer area.

Abstract: An aspect of the present invention is directed to an avalanche photodiode (APD) device for use in oil well drilling applications in harsh, down-hole environments where shock levels are near 250 gravitational acceleration (G) and/or temperatures approach or exceed 150° C. Another aspect of the present invention is directed to an APD device fabricated using SiC materials. Another aspect of the present invention is directed to an APD device fabricated using GaN materials.

Abstract: The present invention relates to a complementary metal-oxide semiconductor (CMOS) image sensor. Particularly, the present invention provides effects of suppressing electrical and optical interferences and improving light sensitivity in a unit pixel of a highly integrated and low power consuming CMOS image sensor. In order to achieve these effects, a red pixel is two-dimensionally encompassed by a green pixel and a blue pixel formed with an additional p-type ion implantation region for suppressing the interference between the pixels. Also, in addition to the above-described structure, a photodiode optimized to the blue pixel is formed further to enhance the light sensitivity.

Abstract: An image sensor is disclosed that has a concave micro-lens structure. The image sensor includes a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. Further, a base material having a first index of refraction is formed over the pixels. Micro-lens cavities are formed in the base material over the light sensitive elements, the micro-lens cavity having a concave shape. Finally, color filters are formed into the micro-lens cavities, the color filters having a second index of refraction that is higher than the first index of refraction.

Abstract: A semiconductor device includes TFTs designed in accordance with characteristics of circuits. In a first structure of the invention, the TFT is formed by using a crystalline silicon film made of a unique crystal structure body. The crystal structure body has a structure in which rod-like or flattened rod-like crystals grow in a direction parallel to each other. In a second structure of the invention, growth distances of lateral growth regions are made different from each other in accordance with channel lengths of the TFTs. By this, characteristics of TFTs formed in one lateral growth region can be made as uniform as possible.

Abstract: A method for forming an electronic device having a semiconducting active layer comprising a polymer, the method comprising aligning the chains of the polymer parallel to each other by bringing the polymer into a liquid-crystalline phase.

Abstract: A sensor formed in a substrate of a first conductivity type in a first concentration to express a first intrinsic potential includes CMOS circuitry to control the sensor, a first well of the first conductivity type in a second concentration (greater than the first concentration) formed in the substrate to express a second intrinsic potential, and a photodiode region of a second conductivity type formed in the first well. The first and second intrinsic potentials induce a field between the substrate and the first well that repels photo generated charge from drifting from the substrate into the first well. Alternatively, a sensor formed in a substrate of a first conductivity type includes CMOS circuitry to control the sensor, a first well of a second conductivity type formed in the substrate, a second well of the first conductivity type formed in the first well, and a photodiode region of the second conductivity type formed in the second well.