Abstract: An image sensor is provided. The image sensor includes a plurality of photodiode doped regions in a substrate, a passivation layer above the substrate, a dielectric layer between the passivation layer and the substrate, and a plurality of color filters in the dielectric layer being corresponding to the photodiode doped regions.

Abstract: In a solid-state imaging device in which a N-type photoelectric conversion region is formed in a P?-type well region, a light-blocking film and a transparent conductive film are formed on the N-type photoelectric conversion region with a second interlayer insulation film interposed therebetween. By applying a negative voltage to the light-blocking film and the transparent conductive film, a P++-type inversion region is formed in a topmost part of the N-type photoelectric conversion region.

Abstract: A manufacturing method of a CMOS image sensor including at least one of the following steps. Forming an under-structure including a photodiode, a metal wire, and an interlayer insulation film for insulation between a metal pad and the metal wire. Forming a passivation layer on and/or over the under-structure. Selectively etching the passivation layer and the interlayer insulation film below the passivation layer to form a color filter region and a metal pad exposure region. Simultaneously etching the color filter region and the metal pad exposure region. Sequentially forming a plurality of color filters and a plurality of micro lenses on the interlayer insulation film etched to form the color filters.

Abstract: An image sensor for an image processing apparatus having a color filter array with open window cells alternating with single color filter cells includes a lens array containing a plurality of microlenses, a color filter array having a plurality of open window cells and color filter cells, each corresponding to one microlens. The image sensor also includes a protection layer, and a pixel sensor array having a first photosensor sensing a first light passed through each color filter cell, a second photosensor formed under the first photosensor, sensing a second light passed through each color filter cell, a third photosensor sensing a third light passed through each open window cell, and a fourth photosensor formed under the third photosensor, sensing a fourth light passed through each open window cell.

Abstract: An object is to provide a solid state image pickup device and a camera which do not worsen a sensor performance in terms of an optical property, a saturated charge amount and the like. A solid state image sensor including a pixel region having a plurality of pixels includes at least a photodiode and an amplifying portion amplifying photocharges outputted from the photodiode in the pixel region, and further includes a well electrode for taking well potential of a well region in which the amplifying portion is arranged. Between the well electrode and the photodiode, no element isolation regions by an insulation film are arranged. Moreover, on the surface of a first semiconductor region in which the photodiode stores the charges, a second semiconductor layer of a conductivity type reverse to that of the first semiconductor region is arranged.

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.

Abstract: Dark current caused by a crystalline defect in an interfacial surface of a device isolating layer is prevented according to an image sensor and a method of manufacturing the same. A first device isolating layer adjacent to a photodiode disposed on an upper surface of a semiconductor substrate protrudes from the semiconductor substrate. A side surface of the first device isolating layer is covered by a first spacer with a refractivity greater than that of the first device isolating layer. The photodiode is insulated by the device isolating layer protruding from the semiconductor substrate to prevent the dark current. By forming the spacer on the sidewall of the device isolating layer to attain total reflection, efficiency of light incident to the photodiode is improved.

Abstract: An image sensor is provided. The image sensor includes a transistor region over a substrate, an interlayer insulating layer having a via hole over the transistor region, a silicon layer over the interlayer insulating layer, and a photodiode over the silicon layer.

Abstract: A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating layer. The apertures form hollow regions in the at least one first insulating layer over the sensor, allowing more light or energy to pass through the at least one first insulating layer to the sensor, and increasing the sensitivity of the sensor.

Abstract: A CMOS image sensor and a fabricating method thereof are provided. The method includes forming a nitride layer over a boundary region between a device isolation region and a pixel region, forming a silicide barrier layer in the pixel region and performing a silicide process. A boundary portion of the silicide barrier layer formed in the pixel region can be prevented from being wet-etched while the silicide barrier layer is removed by the wet etching process.

Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

Abstract: The invention provides a display device in which occurrence of a display defect called a ghost is prevented, and a driving method thereof, and a television set. According to the invention, a gate control signal (GWE) which has been one signal is divided into a first gate control signal (GWE1) and a second gate control signal (GWE2), or a pulse-width control signal (PWC) is used in addition to one gate control signal (GWE) which has been used, thereby preventing a period for outputting a video signal to a pixel by a source driver and a period for selecting a gate line by an erasing gate driver from overlapping each other. Then, video signal writing to a pixel where an erasing operation is performed is prevented, so that occurrence of the display defect called a ghost is prevented.

Abstract: A method of fabricating a high-sensitivity image sensor and the same are disclosed. The disclosed method comprises: etching predetermined regions of active silicon and a buried oxide layer of a SOI substrate by using a mask to expose an N-type silicon substrate; implanting P-type ions into the exposed N-type silicon substrate to form P-type regions; forming a gate oxide layer and a gate electrode on the middle part of the active silicon not etched while the active silicon is etched to expose the N-type silicon substrate; forming a P-type gate electrode, and P-type source and drain regions by implanting P-type ions into the active silicon and the gate electrode above the buried oxide layer; and constructing a connection part to connect the P-type regions to the gate electrode.

Abstract: A method of fabricating microlenses in a CMOS image sensor including at least one of the following steps: Forming a color filter array including a plurality of color filters on a semiconductor substrater. Forming on and/or over the color filter array a flattening layer to compensate for height differences between color filters. Forming a silicon oxide layer on and/or over the flattening layer. Forming on and/or over the silicon oxide layer, a plurality of photoresist patterns which correspond to the color filters, wherein the photoresist patterns may be separated from each other. Forming a plurality of CxFy-based polymer bumps surrounding the plurality of photoresist patterns using at least one process gas (e.g. C5F8, CH2F2, Ar, and/or O2).

Abstract: The invention relates to a semiconductor device comprising at least two electrodes and at least one nanotube or nanowire, in particular a carbon nanotube or nanowire, the device including at least one semiconductive nanotube or nanowire having at least one region that is covered at least in part by at least one layer of molecules or nanocrystals of at least one photosensitive material, an electrical connection between said two electrodes being made by at least one nanotube, namely said semiconductive nanotube or nanowire and optionally by at least one other nanotube or nanowire.

Abstract: A complementary metal oxide semiconductor (CMOS) sensor may include a substrate and a device isolation layer formed above the substrate. A nitride layer is formed between the device isolation layer and the substrate. An n type impurity region is formed in a photodiode region of the substrate. A p type impurity region is formed in the photodiode region on the n type impurity region. A gate oxide layer and a gate electrode are formed on the substrate to form a gate stack.

Abstract: A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.

Abstract: A semiconductor device includes: a semiconductor element provided on a semiconductor layer; a light-blocking wall provided around the semiconductor element; and a wiring layer electrically coupled to the semiconductor element and extended from an aperture not having the light-blocking wall to an outside of the light-blocking wall; wherein the wiring layer has a pattern containing a first section positioned in the aperture and a second section which has a width not narrower than a width of the aperture by providing a branched portion intersecting with an extension direction of the wiring layer; and wherein a surface of the branched portion facing outside of the light-blocking wall includes thereon a convex part.

Abstract: The invention provides a display device and an electronic device, each of which has one of a structure in which a substrate provided with a light emitting element which performs bottom light emission and a substrate provided with a light emitting element which performs top light emission are attached, and a structure in which two substrates, each of which is provided with a light emitting element which performs bottom light emission are attached. By attaching two substrates, each of which is provided with a light emitting element, displays are provided on the front and back of the display device, thus a high added value can be realized. One of the two substrates, each of which is provided with a light emitting element also functions as a sealing substrate for another substrate, thus a compact, thin, and lightweight display device can be obtained.

Abstract: In one aspect, a semiconductor laser device may include a supporting member, a semiconductor laser element provided over the supporting member, and configured to emit a laser from a front surface and monitoring laser from a rear surface, and a photo receiving element provided over the supporting member, and configured to receive the monitoring laser from the semiconductor laser element at a photo receiving region, the photo receiving region provided on a side surface of the photo receiving element, wherein the side surface of the photo receiving element has a smaller area than an area of a bottom surface of the photo receiving element.

Abstract: The invention is a side-emitting illumination system that incorporates a light emitting diode. The side-emitting illumination system recycles a portion of the light internally generated by a light emitting diode back to the light emitting diode as externally incident light. The light emitting diode reflects the recycled light, thereby increasing the effective brightness of the light emitting diode. The light reflected by the light emitting diode is directed though the output aperture of the side-emitting illumination system, thereby increasing the output brightness and efficiency of the side-emitting illumination system. The light emitting diode reflects externally incident light with a reflectivity greater than 40 percent.

Abstract: The present invention discloses the semiconductor device having the substrate that reflects the laser beam on a surface; that absorbs the laser beam therein; or that partially reflects the laser beam on the surface and partially absorbs the laser beam in the laser annealing. Moreover, the substrate has a poly-crystalline semiconductor film having a large grain size. The present invention suppresses the effect due to the reflected light from a rear surface of the substrate and therefore the uniform laser annealing can be performed.

Abstract: A solid-state image sensing apparatus has a signal storage portion of a second conductivity type provided within a semiconductor substrate or a well each of a first conductivity type to store a signal charge obtained through a photoelectric conversion, a surface shield layer of the first conductivity type provided in a surface portion of the semiconductor substrate or the well which is located above the signal storage portion, a gate electrode provided over the semiconductor substrate or the well in adjacent relation to at least one end of the signal storage portion, and a drain region of the second conductivity type provided in a surface portion of the semiconductor substrate or the well which is on the side opposite to the surface shield layer when viewed from the gate electrode.

Abstract: An image sensor includes a plurality of micro-lenses and a plurality of light receiving elements. Each micro-lens has a neighboring micro-lens at a respective distance that decreases with an incident angle of light converged by the micro-lens. Each light receiving element has a neighboring light receiving element at a respective distance that increases with an incident angle of light received by the light receiving element. Such position adjustment of the micro-lenses and light receiving elements enhances photo sensitivity of the image sensor.

Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.

Abstract: Fast silicon diodes and arrays with high quantum efficiency built on dielectrically isolated wafers. A waveguide is formed in the top surface of the silicon that utilizes total internal reflection from the Si—Si Oxide interface to form an internal mirror. This mirror reflects incoming light into the waveguide cavity, with the light being trapped there by surrounding reflective interfaces. A masking layer may be used to define an input window. Individual diodes or linear arrays may be formed as desired. Some alternate embodiments are described.

Abstract: A microcrystalline germanium image sensor array. The array includes a number of pixel circuits fabricated in or on a substrate. Each pixel circuit comprises a charge collecting electrode for collecting electrical charges and a readout means for reading out the charges collected by the charge collecting electrode. A photodiode layer of charge generating material located above the pixel circuits convert electromagnetic radiation into electrical charges. This photodiode layer includes microcrystalline germanium and defines at least an n-layer, and i-layer and a p-layer. The sensor array also includes and a surface electrode in the form of a grid or thin transparent layer located above the layer of charge generating material. The sensor is especially useful for imaging in visible and near infrared spectral regions of the electromagnetic spectrum and provides imaging with starlight illumination.

Abstract: CMOS and CCD imaging devices comprising different in-pixel capacitors and peripheral capacitors and methods of formation are disclosed. The capacitors used in periphery circuits have different requirements from the capacitors used in the pixel itself. Dual stack capacitors comprising two dielectric layers may be provided to achieve low leakage and high capacitance. A single masking step may be provided such that one region has a dual dielectric capacitor and a second region has a single dielectric capacitor. A different dielectric may also be provided in one region compared to another region wherein the inter-electrode insulator comprises a single dielectric in both regions.

Abstract: In a solid-state image-sensing device, when image sensing is performed, in each pixel, MOS transistors T1 and T5 are turned on and a MOS transistor T6 is turned off so that a MOS transistor T2 operates in a subthreshold region. When resetting is preformed, in each pixel, the MOS transistors T1 and T5 are turned off and the MOS transistor T6 is turned on so that the gate voltage of the MOS transistor T2 is kept constant. In this state, the MOS transistor T2 is brought first into a conducting state and then, by turning a signal ?VPS to a high level, into a cut-off state. This permits a signal proportional to the threshold value of the MOS transistor T2 to be output as compensation data.

Abstract: An image sensor includes a first type semiconductor layer, a second type semiconductor layer and a first type well. The first type semiconductor layer is formed on a semiconductor substrate and includes a plurality of pixels which receive external light and convert optical charges into an electrical signal. The second type semiconductor layer is supplied with a drain voltage to have a potential different from that of the first semiconductor layer, and the first type well controls a power source voltage (VDD) using the drain voltage.

Abstract: A novel NPBL and ANPL light emitting semiconductor device and a method for fabricating the same are provided. In the present invention, plural nano-particles are applied in the active layer of the light emitting semiconductor device, so that the leakage current thereof is reduced. In addition, the provided light emitting semiconductor device fabricated via a planar technology process is microscopically planar, but not planar at micro- and nano-scale. Hence the parasitic wave guiding effect, which suppresses the light extraction efficiency of the light emitting semiconductor device, is destroyed thereby.

Abstract: In a thin-film field-effect transistor having a MIS structure, the insulator layer is formed of cyanoethylated dihydroxypropyl pullulan. The TFT is prepared by applying a cyanoethylated dihydroxypropyl pullulan solution onto a gate electrode in the form of a metal layer, drying the applied solution to form an insulator layer, and thereafter, forming a semiconductor layer thereon.

Abstract: A pixel image sensor has an isolation barrier and diffusion well connected to a biasing voltage to prevent substrate charge leakage caused by photoelectrons generated in the substrate beneath a photon sensing area of the pixel image sensor from drifting to a storage node. An opaque metallic silicide layer is deposited on and a metal shield is fabricated above the storage node and storage node control transistor switches to prevent light from impinging on the storage node and storage node control transistor switches and thus preventing generation of photoelectrons at the storage node and storage node control transistor switches. A guard ring surrounds the photo sensing area, the storage node, and the storage node control transistor switches and is in contact with the biasing voltage and reduces cross-talk from photoelectrons drifting from adjacent image sensors.

Abstract: Disclosed is a method of fabricating a CMOS (Complementary Metal Oxide Silicon) image sensor. The method includes the steps of: forming a device protective layer and a metal interconnection on a substrate formed with a light receiving device; forming an inner micro-lens on the metal interconnection; coating an interlayer dielectric layer on the inner micro-lens and then forming a color filter; and forming an outer micro-lens including a planarization layer and photoresist on the color filter. The inner micro-lens is formed by depositing the outer layer on dome-shaped photoresist. The curvature radius of the inner micro-lens is precisely and uniformly maintained and the inner micro-lens is easily formed while improving the light efficiency. Since the fabrication process for the CMOS image sensor is simplified, the product yield is improved and the manufacturing cost is reduced.

Abstract: A pixel circuit with a dual gate PMOS is formed by forming two P+ regions in an N? well. The N? well is in a P? type substrate. The two P+ regions form the source and drain of a PMOS transistor. The PMOS transistors formed within the N? well will not affect the collection of the photo-generated charge as long as the source and drain potentials of the PMOS transistors are set at a lower potential than the N? well potential so that they remain reverse biased with respect to the N? well. One of the P+ regions used to form the source and drain regions can be used to reset the pixel after it has been read in preparation for the next cycle of accumulating photo-generated charge. The N? well forms a second gate for the dual gate PMOS transistor since the potential of the N? well 12 affects the conductivity of the channel of the PMOS transistor. The addition of two NMOS transistors enables the readout signal to be stored at the gate of one of the NMOS transistors thereby making a snapshot imager possible.

Abstract: In order to reduce the capacitance of a light-receiving element, the present invention provides a light-receiving element which includes a first semiconductor region of the first conductivity type, a second semiconductor region of the second conductivity type, provided on the first semiconductor region, a third semiconductor region of the first conductivity type, provided between the second semiconductor region and an insulating film and an electrode region of the second conductivity type, provided in the second semiconductor region where the third semiconductor region is absent on and above the second semiconductor region, and connected to an anode or cathode electrode consisting of a conductor.

Abstract: An optical sensor that can receive light ranging from visible light to infrared light is provided. A thin beta-iron disilicide semiconductor film is formed on a silicon substrate. Light in the visible region is received by silicon, and light in the infrared region is received by beta-iron disilicide.

Abstract: A double-junction complimentary metal-oxide-semiconductor (CMOS) filterless color imager cell is provided. The imager cell is fabricated from a silicon-on-insulator (SOI) substrate including a silicon (Si) substrate, a silicon dioxide insulator overlying the substrate, and a Si top layer overlying the insulator. A photodiode set is formed in the SOI substrate, including a first and second photodiode formed as a double-junction structure in the Si substrate. A third photodiode is formed in the Si top layer. A (imager sensing) transistor set is formed in the top Si layer. The transistor set is connected to the photodiode set and detects an independent output signal for each photodiode. The transistor set may be an eight-transistor (8T), a nine-transistor (9T), or an eleven-transistor (11T) cell.

Abstract: A method is disclosed for forming at least one image sensor with improved sensitivity along with at least one transistor device. The method comprises forming at least a portion of the transistor device on a substrate, forming the image sensor by doping a predetermined area separated from the transistor device by a minimum predetermined distance, forming an etch stop layer for covering a contact area of the transistor device, removing at least a portion of the etch stop layer in the predetermined area for exposing the image sensor, and covering the image sensor and the transistor device by at least one transparent protection layer.

Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of the light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.

Abstract: A thin film transistor (TFT) liquid crystal display (LCD) panel, its array substrate, and its manufacturing method. Color filters are integrated on the TFT array, and color filter stacks are formed on the thin film transistors to replace a black matrix, thereby reducing manufacturing time and costs. The color filter stacks can be placed at the border of the display area of the panel to reduce light leakage. The border of the display area has a liquid crystal injection hole. To allow the size of the liquid crystal injection hole to be increased, and to reduce the light leakage at the hole, color filter blocks and overlapping metal layers can be used at the border of the display area. The color filter stacks and other dielectric layers need to be away from the welding points of repair structures to prevent dielectric layer bursts during a repair process. Storage capacitors can use the feature described above so that the color filters are positioned away from the overlapping portions.

Abstract: A pixel array formed on a substrate mainly including scan lines and data lines is provided. The scan lines and the data lines are essentially consisted of conductive patterns disposed at different layers and contact windows electrically connected with the conductive patterns disposed at the different layers. The scan lines and the data lines are respectively consisted of conductive patterns to prevent the scan lines and the data lines from cracking when the substrate is warped. Besides, the pixel array further includes dielectric layers having trenches therein, to divide the dielectric layers into independent dielectric patterns. Thus, the dielectric layers would not crack easily when the substrate is warped.

Abstract: A novel image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate, a gate comprising a dielectric layer and gate conductor formed on the dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. Part of the gate conductor bottom is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region.

Abstract: A CMOS image sensor and a method for fabricating the same is disclosed, to improve reliability of a driving part transistor and to improve an output voltage of a photodiode, which includes a semiconductor substrate defined as a photodiode transistor region and a driving part transistor region; a first gate insulating layer on the photodiode transistor region of the semiconductor substrate; a second gate insulating layer on the driving part transistor region of the semiconductor substrate, wherein the second gate insulating layer is thicker than the first gate insulating layer; and gate electrodes on the respective first and second gate insulating layers.

Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.

Abstract: A semiconductor photodetector device includes: a first semiconductor layer of a first conductivity type; and a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and having a light-receiving region. The first semiconductor layer includes a first region containing an impurity of the first conductivity type at a high concentration and a second region formed on the first region and containing an impurity of the first conductivity type at a concentration lower than that of the first region. The second semiconductor layer includes a third region containing an impurity of the second conductivity type at a concentration higher than that of the second region and a fourth region formed on the third region and containing an impurity of the second conductivity type at a concentration higher than that of the third region.

Abstract: The invention includes a semiconductor processing method. A first material comprising silicon and nitrogen is formed. A second material is formed over the first material, and the second material comprises silicon and less nitrogen, by atom percent, than the first material. An imagable material is formed on the second material, and patterned. A pattern is then transferred from the patterned imagable material to the first and second materials. The invention also includes a structure comprising a first layer of silicon nitride over a substrate, and a second layer on the first layer. The second layer comprises silicon and is free of nitrogen. The structure further comprises a third layer consisting essentially of imagable material on the second layer.

Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.

Abstract: A thin film transistor array panel is provided, which includes: a gate line formed on an insulating substrate; a gate insulating layer on the gate line; a semiconductor layer on the gate insulating layer; a data line formed on the gate insulating layer; a drain electrode formed at least in part on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode; a color filter formed on the data line and the drain electrode; a second passivation layer formed on the color filter; and a pixel electrode formed on the color filter, connected to the drain electrode, overlapping the second passivation layer, and enclosed by the second passivation layer.

Abstract: A photodiode and a method of manufacturing the photodiode are provided. The method includes forming a diode junction structure including a light receiving unit and an electrode unit on a semiconductor substrate, forming a buffer oxide layer and an etching blocking layer on the junction structure, forming an interlayer insulating layer and an intermetal insulating layer and an interconnecting structure, exposing the etching blocking layer by etching the intermetal insulating layer and the interlayer insulating layer, removing a portion of the etching blocking layer and the buffer oxide layer of the light-receiving unit by dry etching, and exposing a semiconductor surface of the light-receiving unit by wet etching.