Abstract: A magnetic memory element includes: a first magnetization free layer formed of a ferromagnetic material having perpendicular magnetic anisotropy; a second magnetization free layer provided near the first magnetization free layer and formed of a ferromagnetic material having in-plane magnetic anisotropy; a reference layer formed of a ferromagnetic material having in-plane magnetic anisotropy; and a non-magnetic layer provided between the second magnetization free layer and the reference layer. The first magnetization free layer includes: a first magnetization fixed region of which magnetization is fixed, a second magnetization fixed region of which magnetization is fixed, and a magnetization free region which is connected to the first magnetization fixed region and the second magnetization fixed region, and of which magnetization can be switched. The second magnetization free layer is included in the first magnetization free layer in a plane parallel to a substrate.

Abstract: The present invention is directed to a memory device having a via landing pad in the peripheral circuit that minimizes the memory cell size. A device having features of the present invention comprises a peripheral circuit region and a magnetic memory cell region including at least a magnetic tunnel junction (MTJ) element. The peripheral circuit region comprises a substrate and a bottom contact formed therein; a landing pad including a first magnetic layer structure formed on top of the bottom contact and a second magnetic layer structure separated from the first magnetic layer structure by an insulating tunnel junction layer, wherein each of the insulating tunnel junction layer and the second magnetic layer structure has an opening aligned to each other; and a via partly embedded in the landing pad and directly coupled to the first magnetic layer structure through the openings.

Abstract: According to one embodiment, a magnetoresistive element includes first and second magnetic layers and a first nonmagnetic layer. The first magnetic layer has an axis of easy magnetization perpendicular to a film plane, and a variable magnetization. The second magnetic layer has an axis of easy magnetization perpendicular to a film plane, and an invariable magnetization. The first nonmagnetic layer is provided between the first and second magnetic layers. The second magnetic layer includes third and fourth magnetic layers, and a second nonmagnetic layer formed between the third and fourth magnetic layers. The third magnetic layer is in contact with the first nonmagnetic layer and includes Co and at least one of Zr, Nb, Mo, Hf, Ta, and W.

Abstract: According to one embodiment, a semiconductor device includes a MRAM chip including a semiconductor substrate and a memory cell array area includes magnetoresistive elements which are provided on the semiconductor substrate, and a magnetic shield layer surrounding the memory cell array area in a circumferential direction of the MRAM chip, and having a closed magnetic path.

Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof with a thickness from 10 to 100 Angstroms. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract: A magnetic junction usable in a magnetic memory and a method for providing the magnetic memory are described. The method includes providing a pinned layer, providing an engineered nonmagnetic tunneling barrier layer, and providing a free layer. The pinned layer and the free layer each include at least one ferromagnetic layer. The engineered nonmagnetic tunneling barrier layer has a tuned resistance area product. In some aspects, the step of providing the engineered nonmagnetic tunneling barrier layer further includes radio-frequency depositing a first oxide layer, depositing a metal layer, and oxidizing the metal layer to provide a second oxide.

Abstract: A MTJ for a spintronic device that is a domain wall motion device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof with a thickness from 10 to 100 Angstroms. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract: Provided are magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of controlling a magnetization direction of a magnetic pattern. In a magnetic memory device, atomic-magnetic moments non-parallel to one surface of a free pattern increase in the free pattern. Therefore, critical current density of the magnetic memory device may be reduced, such that power consumption of the magnetic memory device is reduced or minimized and/or the magnetic memory device is improved or optimized for a higher degree of integration.

Abstract: High speed precessionally switched magnetic logic devices and architectures are described. In a first example, a magnetic logic device includes an input electrode having a first nanomagnet and an output electrode having a second nanomagnet. The spins of the second nanomagnet are non-collinear with the spins of the first nanomagnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. In a second example, a magnetic logic device includes an input electrode having an in-plane nanomagnet and an output electrode having a perpendicular magnetic anisotropy (PMA) magnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes.

Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate, and a contact plug provided on the substrate. The contact plug includes a first contact plug, and a second contact plug provided on the first contact plug and having a smaller diameter than that of the first contact plug. The magnetic memory further includes a magnetoresistive element provided on the second contact plug. The diameter of the second contact plug is smaller than that of the magnetoresistive element.

Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.

Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n? composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof with a thickness from 10 to 100 Angstroms. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract: A magnetic cell includes an attracter material proximate to a magnetic region (e.g., a free region). The attracter material is formulated to have a higher chemical affinity for a diffusible species of a magnetic material, from which the magnetic region is formed, compared to a chemical affinity between the diffusible species and at least another species of the magnetic material. Thus, the diffusible species is removed from the magnetic material to the attracter material. The removal accommodates crystallization of the depleted magnetic material. The crystallized, depleted magnetic material enables a high tunnel magneto resistance, high energy barrier, and high energy barrier ratio. The magnetic region may be formed as a continuous magnetic material, thus enabling a high exchange stiffness, and positioning the magnetic region between two magnetic anisotropy-inducing oxide regions enables a high magnetic anisotropy strength. Methods of fabrication and semiconductor devices are also disclosed.

Abstract: A magnetic cell includes a free region between an intermediate oxide region (e.g., a tunnel barrier) and a secondary oxide region. Both oxide regions may be configured to induce magnetic anisotropy (“MA”) with the free region, enhancing the MA strength of the free region. A getter material proximate to the secondary oxide region is formulated and configured to remove oxygen from the secondary oxide region to reduce an oxygen concentration and, thus, an electrical resistance of the secondary oxide region. Thus, the secondary oxide region contributes only minimally to the electrical resistance of the cell core. Embodiments of the present disclosure therefore enable a high effective magnetoresistance, low resistance area product, and low programming voltage along with the enhanced MA strength. Methods of fabrication, memory arrays, memory systems, and electronic systems are also disclosed.

Abstract: A magnetoresistive element according to an embodiment includes: a base layer; a first magnetic layer formed on the base layer, and including a first magnetic film having an axis of easy magnetization in a direction perpendicular to a film plane, the first magnetic film including MnxGa100-x (45?x<64 atomic %); a first nonmagnetic layer formed on the first magnetic layer; and a second magnetic layer formed on the first nonmagnetic layer, and including a second magnetic film having an axis of easy magnetization in a direction perpendicular to a film plane, the second magnetic film including MnyGa100-y (45?y<64 atomic %). The first and second magnetic layers include different Mn composition rates from each other, a magnetization direction of the first magnetic layer is changeable by a current flowing between the first magnetic layer and the second magnetic layer via the first nonmagnetic layer.

Abstract: A magnetic device includes a substrate, a sensing block and a repair layer. The substrate has a bottom electrode, a registration layer and a barrier layer disposed on the registration layer. The sensing block is patterned to distribute on the barrier layer. The repair layer is disposed substantially on the barrier layer, wherein the barrier layer is configured to have a tunneling effect when a bias voltage exists between the sensing block and the registration layer.

Abstract: Magnetic tunnel junctions (MTJ) suitable for spin transfer torque memory (STTM) devices, include perpendicular magnetic layers and one or more anisotropy enhancing layer(s) separated from a free magnetic layer by a crystallization barrier layer. In embodiments, an anisotropy enhancing layer improves perpendicular orientation of the free magnetic layer while the crystallization barrier improves tunnel magnetoresistance (TMR) ratio with better alignment of crystalline texture of the free magnetic layer with that of a tunneling layer.

Abstract: A magnetic field sensor having a support with a top side and a bottom side, whereby a Hall plate is provided on the top side of the support and the Hall plate comprises a carbon-containing layer.

Abstract: A MTJ is disclosed with a discontinuous Mg or Mg alloy layer having a thickness from 1 to 3 Angstroms between a free layer and a capping layer in a bottom spin valve configuration. It is believed the discontinuous Mg layer serves to block conductive material in the capping layer from diffusing through the free layer and into the tunnel barrier layer thereby preventing the formation of conductive channels that function as electrical shunts within the insulation matrix of the tunnel barrier. As a result, the “low tail” percentage in a plot of magnetoresistive ratio vs Rp is minimized which means the number of high performance MTJ elements in a MTJ array is significantly increased, especially when a high temperature anneal is included in the MTJ fabrication process. The discontinuous layer is formed by a low power physical vapor deposition process.

Abstract: According to one embodiment, a magnetoresistive effect element includes a first ferromagnetic layer, a tunnel barrier provided on the first ferromagnetic layer, and a second ferromagnetic layer provided on the tunnel barrier. The tunnel barrier includes a nonmagnetic mixture containing MgO and a metal oxide with a composition which forms, in a solid phase, a single phase with MgO.

Abstract: A perpendicular spin-transfer torque magnetic random access memory (STTMRAM) element is configured to store a state when electrical current is applied thereto. The perpendicular STTMRAM element includes a magnetization layer having a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL). The direction of magnetization of the first and second free layers each is in-plane prior to the application of electrical current and after the application of electrical current, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.

Abstract: A stacked structure according to an embodiment includes: a semiconductor layer; a first layer formed on the semiconductor layer, the first layer containing at least one element selected from Zr, Ti, and Hf, the first layer being not thinner than a monoatomic layer and not thicker than a pentatomic layer; a tunnel barrier layer formed on the first layer; and a magnetic layer formed on the tunnel barrier layer.

Abstract: Methods for forming a magnetic tunnel junction (MTJ) storage element and MTJ storage elements formed are disclosed. The MTJ storage element includes a MTJ stack having a pinned layer stack, a barrier layer and a free layer. An adjusting layer is formed on the free layer, such that the free layer is protected from process related damages. A top electrode is formed on the adjusting layer and the adjusting layer and the free layer are etched utilizing the top electrode as a mask. A spacer layer is then formed, encapsulating the top electrode, the adjusting layer and the free layer. The spacer layer and the remaining portions of the MTJ stack are etched. A protective covering layer is deposited over the spacer layer and the MTJ stack.

Abstract: A vertical Hall sensor includes first and second vertical Hall effect regions in a semiconductor substrate, with first and second pluralities of contacts arranged at one side of the first or second vertical Hall effect regions, respectively. The second vertical Hall effect region is connected in series with the first vertical Hall effect region regarding a power supply. The vertical Hall sensor further includes first and second layers adjacent to the first and second vertical Hall effect regions at a side other than a side of the first or second pluralities of contacts. The first and second layers have different doping properties than the first and second vertical Hall effect regions and insulate the first and second vertical Hall effect regions from a bulk of the semiconductor substrate by at least one reverse-biased p-n junction per vertical Hall effect region during an operation of the vertical Hall sensor.

Abstract: An STT MTJ cell is formed with a magnetic anisotropy of its free and reference layers that is perpendicular to their planes of formation. The reference layer of the cell is an SAF multilayered structure with a single magnetic domain to enhance the bi-stability of the magnetoresistive states of the cell. The free layer of the cell is etched back laterally from the reference layer, so that the fringing stray field of the reference layer is no more than 15% of the coercivity of the free layer and has minimal effect on the free layer.

Abstract: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.

Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistance effect element having a structure in which a first magnetic layer, a nonmagnetic layer, a second magnetic layer, and a third magnetic layer are stacked, wherein the third magnetic layer comprises a first region and a plurality of second regions, and each of the second regions is surrounded by the first region, has conductivity, and has a greater magnetic property than the first region.

Abstract: According to one embodiment, a magnetic memory includes a magnetoresistive effect element provided in a memory cell, the magnetoresistive effect element including a multilayer structure including a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, a first electrode provided on an upper portion of the multilayer structure and including a first material, and a first film provided on a side surface of the first electrode and including a second material which is different from the first material of the first electrode.

Abstract: According to one embodiment, a magnetic memory is disclosed. The memory includes a conductive layer containing a first metallic material, a stacked body formed above the conductive layer and including a first magnetic layer containing a second metallic material, a second magnetic layer, and a tunnel barrier layer formed between the first magnetic layer and the second magnetic layer, and an insulating layer formed on a side face of the stacked body and containing an oxide of the first metallic material. A standard electrode potential of the first metallic material is lower than the standard electrode potential of the second metallic material.

Abstract: A spin valve includes two layers, a reference layer and a free layer, magnetised perpendicularly to a layer plane and an intermediate layer disposed between the magnetic layers. The reference layer predetermines a preferred orientation of a direction of the magnetisation, is formed from a ferrimagnetic material, and has a higher coercive field strength than the free layer. The free layer is formed from a ferromagnetic or ferrimagnetic material. The intermediate layer is electrically conductive or non-conductive. The reference layer and the free layer have a single-domain magnetisation. The reference layer is formed from an alloy comprising a rare earth element and a transition metal. The coercive field strength of the reference layer is set via its composition and is more than 0.8 kA/m. An anisotropy and layer thickness of the reference layer and a coupling constant define an exchange bias field between 0.8 and 80 kA/m.

Abstract: According to one embodiment, a magnetoresistive element includes a storage layer having a variable magnetization direction, a reference layer having an invariable magnetization direction, a tunnel barrier layer formed between the storage layer and the reference layer, and a heater layer formed on an opposite side to the tunnel barrier layer of the storage layer. The storage layer includes a first layer formed on a side of the heater layer, and a second layer formed on the side of the tunnel barrier layer and having a Curie temperature higher than that of the first layer.

Abstract: A magnetic memory device includes a magnetic thin wire including magnetic domains along a direction in which the magnetic thin wire extends. Magnetization directions of the magnetic domains are variable. A magnetic tunnel junction (MTJ) structure includes a pinned layer with a fixed magnetization direction and an insulator, and makes an MTJ including the pinned layer and insulator and a magnetic domain in the magnetic thin wire in a first position to sandwich the insulator with pinned layer. First and second electrodes are at both ends of the magnetic thin wire. At least one third electrode is coupled to the magnetic thin wire between the first and second electrodes.

Abstract: According to one embodiment, a magnetoresistive element is disclosed. The element includes a lower electrode, a stacked body provided on the lower electrode and including a first magnetic layer, a tunnel barrier layer and a second magnetic layer. The first magnetic layer is under the tunnel barrier layer, the second magnetic layer is on the tunnel barrier layer. The first magnetic layer includes a first region and a second region outside the first region to surround the first region. The second region includes an element in the first region and other element being different from the element.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a magnetoresistive element formed on a semiconductor substrate, a first contact plug which extends through an interlayer dielectric film formed on the semiconductor substrate and immediately below the magnetoresistive element, has a bottom surface in contact with an upper surface of the semiconductor substrate, and is adjacent to the magnetoresistive element, and an insulating film formed between the magnetoresistive element and the first contact plug and on the interlayer dielectric film, wherein the insulating film includes a first region positioned on a side of the interlayer dielectric film, and a second region positioned in the insulating film and on an upper surface of the first region, the insulating film is made of SiN, and the first region is a nitrogen rich film compared to the second region.

Abstract: According to one embodiment, a magnetic memory includes first and second magnetoresistive effect elements neighboring in a first direction in a cell array of a substrate, each of the first and second magnetoresistive effect elements including a first magnetic layer with an invariable direction of magnetization, a second magnetic layer with a variable direction of magnetization, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer. Directions of magnetization of the first magnetic layers of the first and second magnetoresistive effect elements are different from each other.

Abstract: A device and a method of forming a device are presented. A substrate is provided. Front end of line processing is performed to form circuit component on the substrate and back end of line processing is performed to include the uppermost inter level dielectric (ILD) layer. The uppermost ILD layer includes first and second interconnects. A pad level is formed over the uppermost ILD layer. A storage unit of a memory cell is provided in the pad level. The storage unit is coupled to the first interconnect of the uppermost ILD layer. A cell interconnect and a pad interconnect are formed in the pad level. The cell interconnect is formed on top of and coupled to the storage unit and the pad interconnect is coupled to the second interconnect in the uppermost ILD layer.

Abstract: According to one embodiment, a semiconductor device includes a MRAM chip including a semiconductor substrate and a memory cell array area includes magnetoresistive elements which are provided on the semiconductor substrate, and a magnetic shield layer separated from the MRAM chip, surrounding the memory cell array area in a circumferential direction of the MRAM chip, and having a closed magnetic path.

Abstract: According to one embodiment, a magnetic memory device includes a bit line, a source line, a magnetoresistance effect element between the bit line and the source line, and a nonlinear element provided between the bit line and the source line and connected in series to the magnetoresistance effect element. The nonlinear element has a voltage-current characteristic in which current increases until a voltage to be applied becomes a predetermined applied voltage, when current flowing through the nonlinear element is within a range not exceeding a predetermined current, and current increases within an applied voltage range lower than the predetermined applied voltage, when current flowing through the nonlinear element is within a range exceeding the predetermined current.

Abstract: Magnetic memory devices and methods of manufacturing the same are disclosed. A method may include forming a magnetic tunnel junction layer on a substrate, forming mask patterns on the magnetic tunnel junction layer, and sequentially performing a plurality of ion implantation processes using the mask patterns as ion implantation masks to form an isolation region in the magnetic tunnel junction layer. The isolation region may thereby define magnetic tunnel junction parts that are disposed under corresponding ones of the mask patterns. A magnetic memory device may include a plurality of magnetic tunnel junction parts electrically and magnetically isolated from each other through the isolation region.

Abstract: According to one embodiment, a first magnetic layer, a first nonmagnetic layer on the first magnetic layer, a second magnetic layer on the first nonmagnetic layer, a second nonmagnetic layer on the second magnetic layer, and a third magnetic layer on the second nonmagnetic layer, the third magnetic layer having a sidewall includes a material which is included in the second nonmagnetic layer.

Abstract: Some embodiments of the present disclosure relate to a method that achieves a substantially uniform pattern of magnetic random access memory (MRAM) cells with a minimum dimension below the lower resolution limit of some optical lithography techniques. A copolymer solution comprising first and second polymer species is spin-coated over a heterostructure which resides over a surface of a substrate. The heterostructure comprises first and second ferromagnetic layers which are separated by an insulating layer. The copolymer solution is subjected to self-assembly into a phase-separated material comprising a pattern of micro-domains of the second polymer species within a polymer matrix comprising the first polymer species. The first polymer species is then removed, leaving a pattern of micro-domains of the second polymer species. A pattern of magnetic memory cells within the heterostructure is formed by etching through the heterostructure while utilizing the pattern of micro-domains as a hardmask.

Abstract: According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer. The reference layer includes a first region, and a second region provided outside the first region to surround the same. The second region contains an element contained in the first region and another element being different from the element. The magnetoresistive element further includes a storage layer, and a tunnel barrier layer provided between the reference layer and the storage layer. The storage layer is free from the another element.

Abstract: According to one embodiment, a magnetoresistive element is disclosed. The magnetoresistive element includes a reference layer, a tunnel barrier layer, a storage layer. The storage layer includes a first region and a second region provided outside the first region to surround the first region, the second region including element included in the first region and another element being different from the element. The magnetoresistive element further includes a cap layer including a third region and a fourth region provided outside the third region to surround the third region, the fourth region including an element included in the third region and the another element.

Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a memory cell array area on the semiconductor substrate, the memory cell array area including magnetoresistive elements, each of the magnetoresistive elements having a reference layer with an invariable magnetization, a storage layer with a variable magnetization, and a tunnel barrier layer therebetween, a magnetic field generating area which generates a first magnetic field cancelling a second magnetic field applying from the reference layer to the storage layer, and which is separated from the magnetoresistive elements, and a closed magnetic path area functioning as a closed magnetic path of the first magnetic field, and surrounding the memory cell array area and the magnetic field generating area.

Abstract: According to one embodiment, a method of manufacturing a magneto-resistive element, includes forming a first ferromagnetic layer on a substrate, forming a tunnel barrier layer on the first ferromagnetic layer, forming a second ferromagnetic layer containing B on the tunnel barrier layer, exposing a laminate of the first ferromagnetic layer, the tunnel barrier layer, and the second ferromagnetic layer under a pressurized atmosphere, and annealing the laminate while being exposed to the pressurized atmosphere, thereby promoting the orientation of the second magnetic layer.

Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate, a first magnetoresistive element provided on the substrate. A second magnetoresistive element which is provided on the substrate and is arranged next to the first magnetoresistive element. Each of the first and second magnetoresistive elements includes a first magnetic layer, a tunnel barrier layer and a second magnetic layer. The tunnel barrier layer is provided on the first magnetic layer, the second magnetic layer is provided on the tunnel barrier layer. A first stress member having a tensile stress as an internal stress is provided on an area including a side face of the stacked body.

Abstract: According to one embodiment, a magnetic memory is disclosed. The memory includes a conductive layer containing a first metal material, a stacked body above the conductive layer, and including a first magnetization film containing a second metal material, a second magnetization film, and a tunnel barrier layer between the first magnetization film and the second magnetization film, and an insulating layer on a side face of the stacked body, and containing an oxide of the first metal material. The first magnetization film and/or the second magnetization film includes a first region positioned in a central portion, and a second region positioned in an edge portion and containing As, P, Ge, Ga, Sb, In, N, Ar, He, F, Cl, Br, I, Si, B, C, O, Zr, Tb, S, Se, or Ti.

Abstract: According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate, and a magnetoresistive element provided on the substrate. The magnetoresistive element includes a first magnetic layer, a tunnel barrier layer on the first magnetic layer, and a second magnetic layer on the tunnel barrier layer. The first magnetic layer or the second magnetic layer includes a first region, second region, and third region whose ratios of crystalline portion are higher in order closer to the tunneling barrier.

Abstract: According to one embodiment, magneto-resistive element, includes a first ferromagnetic layer formed on an underlying substrate, a tunnel barrier layer formed on the first ferromagnetic layer, a second ferromagnetic formed on the tunnel barrier layer and a cap layer formed on the second ferromagnetic layer, and a surface tension of the cap layer is equal to or less than that of the second ferromagnetic layer.