Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.

Abstract: Embodiments disclosed herein include methods in which a pair of openings are formed into semiconductor material, with the openings being spaced from one another by a segment of the semiconductor material. Liners are formed along sidewalls of the openings, and then semiconductor material is isotropically etched from bottoms of the openings to merge the openings and thereby completely undercut the segment of semiconductor material. Embodiments disclosed herein may be utilized in forming SOI constructions, and in forming field effect transistors having transistor gates entirely surrounding channel regions. Embodiments disclosed herein also include semiconductor constructions having transistor gates surrounding channel regions, as well as constructions in which insulative material entirely separates an upper semiconductor material from a lower semiconductor material.

Abstract: A plurality of pixel portions (12) are formed on a silicon substrate (11). A photoelectric converter portion (10) constituting each of the pixel portions (12) is electrically isolated by an element isolation portion (13) comprising an insulating film formed on the silicon substrate (11). The photoelectric converter portion (10) partitioned by the element isolation portion (13) is so formed that a crystal orientation of the sides in contact with the element isolation portion (13) corresponds to a <00-1> direction. This makes it possible to reduce dark current caused by stress in the vicinity of the interface of the element isolation portion (13) and maintain high sensitivity even if the pixel portions (12) are made smaller in size.

Abstract: A photoelectric conversion apparatus (100) comprises: multiple photoelectric converting units (PD) disposed in a semiconductor substrate; (SB) and isolation portions (103,104,105,106) disposed in the semiconductor substrate.

Abstract: A solid-state imaging device comprises an imaging region, a peripheral circuit region formed in an outer peripheral portion of the imaging region, a first conductivity type semiconductor substrate having the imaging region and the peripheral circuit region on a main surface thereof, a second conductivity type first semiconductor layer formed in the semiconductor substrate, a first conductivity type second semiconductor layer formed in first semiconductor layer, a through electrode formed in a through hole penetrating through the semiconductor substrate in a thickness direction of the semiconductor substrate, and a pad portion formed on the semiconductor substrate and connected to the through electrode. The through hole penetrates through a first conductivity type region of the semiconductor substrate.

Abstract: A source/drain region of a transistor or amplifier is formed in a substrate layer and is connected to a voltage source. A glow blocking structure is formed at least partially around the source/drain region and is disposed between the source/drain region and an imaging array of an image sensor. A trench is formed in the substrate layer adjacent to and at least partially around the source/drain region. The glow blocking structure includes an opaque material formed in the trench and one or more layers of light absorbing material overlying the source/drain region and the opaque material.

Abstract: A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A first insulating layer is located over the photo-conversion device and the at least one contact area. The pixel cell further includes at least one conductor in contact with the at least one contact area. The conductor includes a polysilicon material extending through the first insulating layer and in contact with the at least one contact area. Further, a conductive material, which includes at least one of a silicide and a refractory metal, can be over and in contact with the polysilicon material.

Abstract: The photoelectric conversion device includes: a photoelectric conversion element in which a first electrode, a photoelectric conversion layer, and a second electrode are stacked in this order; and a thin film transistor (TFT) connected to the first electrode of the photoelectric conversion element via a contact hole, wherein the photoelectric conversion layer including a first photoelectric conversion layer disposed at a location which does not overlap with the contact hole and a second photoelectric conversion layer disposed at a location which overlaps with the contact hole, the first photoelectric conversion layer and the second photoelectric conversion layer are separated from each other by a separation groove, and the second electrode is selectively formed on the first photoelectric conversion layer, and the photoelectric conversion element is formed by the first electrode, the first photoelectric conversion layer, and the second electrode.

Abstract: A solid-state imaging device includes: an effective pixel region where photoelectric converting portions for obtaining an imaging signal corresponding to light from an object are disposed; an OB pixel region having an element region for obtaining a reference signal of an optical black level; a first light blocking layer which is disposed on the effective pixel region, and in which openings are provided above the photoelectric converting portions; and a second light blocking layer which is disposed on the OB pixel region, the first light blocking layer and the second light blocking layer are electrically isolated from each other by an isolating region, and the imaging device further includes a light blocking section for blocking light from entering the isolating region is provided.

Abstract: An image sensor according to an example embodiment may include a plurality of photoelectric transformation active regions, a plurality of read active regions, and/or at least one read gate. The plurality of photoelectric transformation active regions may be formed on a substrate. Each read active region may be formed adjacent to one of the plurality of photoelectric transformation active regions. Each read gate may be formed on one of the read active regions and partially overlap at least one of the adjacent photoelectric transformation active regions. Each read gate may be electrically isolated from the overlapping portion of the photoelectric transformation active region.

Abstract: A broadband radiation detector includes a first layer having a first type of electrical conductivity type. A second layer has a second type of electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region. A third layer has the second type of electrical conductivity type and an energy bandgap responsive to radiation in a second spectral region comprising longer wavelengths than the wavelengths of the first spectral region. The broadband radiation detector further includes a plurality of internal regions. Each internal region may be disposed at least partially within the third layer and each internal region may include a refractive index that is different from a refractive index of the third layer. The plurality of internal regions may be arranged according to a regularly repeating pattern.

Abstract: A sub-mount, a light emitting diode package, and a method of manufacturing thereof are disclosed. A sub-mount, on which multiple light emitting diodes are mounted, can include a multiple number of metal bodies on which the light emitting diodes are respectively mounted, and an oxide wall interposed between the metal bodies such that the adjacent metal bodies are supported by each other but electrically disconnected from each other. By utilizing certain embodiments of the invention, a high heat releasing effect may be obtained, and manufacturing costs may be reduced.

Abstract: A solid state imaging device including a semiconductor layer, an insulating material in an opening penetrating a surface of the semiconductor layer, and a protective film that is resistant to etching covering one end of the insulating material on an interior side of the semiconductor layer.

Abstract: CMOS image sensors and methods of fabricating the same. The CMOS image sensors include a pixel array region having an active pixel portion and an optical block pixel portion which encloses the active pixel portion. The optical block pixel portion includes an optical block metal pattern for blocking light. The optical block metal pattern may be connected to a ground portion.

Abstract: A solid-state image sensor includes: a trench isolation region; a photodiode region for converting incident light to signal charges and accumulating the signal charges therein; a floating diffusion region for accumulating the signal charges of the photodiode region; a gate electrode formed over the element formation region located between the photodiode region and the floating diffusion region, and formed so that both ends of the gate electrode respectively overlap a part of the photodiode region and a part of the floating diffusion region; and an inactive layer formed in a region located in a bottom portion and sidewall portions of the trench isolation region. An impurity concentration in a region located under the gate electrode in the inactive layer is lower than that in a region other than the region located under the gate electrode in the inactive layer.

Abstract: A solar cell includes a p-type semiconductor substance, and an n-type semiconductor substance. The p-type semiconductor substance and the n-type semiconductor substance form a pn junction or a pin junction, and the p-type semiconductor substance or the n-type semiconductor substance includes a structure film having a plurality of carbon nanotubes electrically connected to each other.

Abstract: Provided is a method of fabricating an image sensor device. The method includes providing a semiconductor substrate having a front side and a back side, forming a first isolation structure at the front side of the semiconductor substrate, thinning the semiconductor substrate from the back side, and forming a second isolation structure at the back side of the semiconductor substrate. The first and second isolation structures are shifted with respect to each other.

Abstract: A trench isolation having a sidewall and bottom implanted region located within a substrate of a first conductivity type is disclosed. The sidewall and bottom implanted region is formed by an angled implant, a 90 degree implant, or a combination of an angled implant and a 90 degree implant, of dopants of the first conductivity type. The sidewall and bottom implanted region located adjacent the trench isolation reduces surface leakage and dark current.

Abstract: A substrate for forming a semiconductor layer includes a plurality of linear convexes or grooves on a surface of the substrate by crystal growth. The plurality of linear convexes or grooves are formed along a direction of a cleavage plane of the semiconductor layer.

Abstract: The present disclosure provides a method of manufacturing a microelectronic device. The method includes forming recessed shallow trench isolation (STI) features in a semiconductor substrate, defining a semiconductor region between adjacent two of the recessed STI features; forming a tunnel dielectric feature within the semiconductor region; forming a nitride layer on the recessed STI features and the tunnel dielectric feature; etching the nitride layer to form nitride openings within the recessed STI features; partially removing the recessed STI features through the nitride openings, resulting in gaps between the nitride layer and the recessed STI features; and forming a first dielectric material on surfaces of the nitride layer, sealing the nitride openings.

Abstract: Embodiments of the invention provide an image sensor that includes a barrier region for isolating devices. The image sensor comprises a substrate and an array of pixel cells formed on the substrate. Each pixel cell comprises a photo-conversion device. The array comprises a first pixel cell having a first configuration, a second pixel cell having a second configuration, and at least one barrier region formed between the first and second pixel cells for capturing and removing charge. The barrier region comprises a charge accumulation region of a particular conductivity type in a substrate electrically connected to a voltage source terminal. The charge accumulation region accumulates charge and prevents charge transference from a pixel cell or peripheral circuitry on one side of the barrier region to a pixel cell on another side of the barrier region.

Abstract: A structure of photodiode array includes a first electrode on which a plurality of second electrodes is arranged in a spaced manner forming an array and a plurality of isolation sections, which is each formed between adjacent ones of the spaced and arrayed second electrodes, whereby in carrying out tests of light currents, correct detection of the light currents can be realized to improve cross-talking between adjacent dodoes so as to effectively suppress interference of noise and alleviate the problem of low S/N ratio.

Abstract: A component comprising a semiconductor junction (HU) is proposed which is formed from crystalline doped semiconductor layers. A semiconductor circuit (IC) is formed on the surface of the component, and a diode is formed internally and directly below the circuit. Integrated circuit and diode are connected to one another and formed and integrated diode component, in particular a photodiode array.

Abstract: A Silicon photodetector contains an insulating substrate having a top surface and a bottom surface. A Silicon layer is located on the top surface of the insulating substrate, where the Silicon layer contains a center region, the center region being larger in thickness than the rest of the Silicon layer. A top Silicon dioxide layer is located on a top surface of the center region. A left wing of the center region and a right wing of the center region are doped. The Silicon photodetector also has an active region located within the center region, where the active region contains a tailored crystal defect-impurity combination and Oxygen atoms.

Abstract: Disclosed is a silicon photoelectric multiplier having a cell structure, which includes a first type silicon substrate; a plurality of cells including a first type epitaxial layer formed on the substrate, a high concentration first type conductive layer formed on the epitaxial layer, and a high concentration second type conductive layer doped with a second type opposite the first type and formed on the high concentration first type conductive layer; a trench formed to optically separate the plurality of cells; and a guard ring formed on an outer wall of the trench so as to reach a bottom surface of the first type epitaxial layer, thus further increasing the degree of optical separation to thereby increase light detection efficiency.

Abstract: A device isolation film in a semiconductor device and a method for forming the same are provided. The method includes etching a middle portion of a device isolation film having a deposition structure including a Spin-On-Dielectric (SOD) oxide film and a High Density Plasma (HDP) oxide film to form a hole and filling an upper portion of the hole with an oxide film having poor step coverage characteristics to form a second hole extending along the middle portion of the device isolation film. The second hole serves as a buffer for stress generated at the interface between an oxide film, which can be a device isolation film, and a silicon layer, which can be a semiconductor substrate, thereby increasing the operating current of a transistor and improving the electrical characteristics of the resulting device.

Abstract: An image sensor for minimizing a dark level defect is disclosed. The image sensor includes an isolation layer formed on a substrate. A field region and an active region are defined on the substrate by the isolation layer. A photodiode is formed in the image sensor in such a structure that a first region is formed below a surface of the substrate in the active region and a second region is formed under the first region. A first conductive type impurity is implanted into the first region and a second conductive type impurity is implanted into the second region. A dark current suppressor is formed on side and bottom surfaces of the isolation layer adjacent to the first region, and the dark current suppressor is doped with the second conductive type impurity. The dark current suppressor suppresses the dark current to minimize the dark level defect caused by the dark current.

Abstract: Embodiments relate to a Complementary Metal Oxide Semiconductor (CMOS) image sensor, and to a method for manufacturing the same, that improves the low-light level characteristics of the CMOS image sensor. The CMOS image sensor has a photosensor unit and a signal processing unit, and may include a semiconductor substrate having a device isolating implant area provided with a first ion implant area and a complementary second ion implant area within the first ion implant area; a device isolating layer in the signal processing unit; a photodiode in the photosensor unit; and transistors in the signal processing unit. A crystal defect zone neighboring the photodiode may be minimized using the device isolating implant area between adjacent photodiodes so that a source of dark current can be reduced and the occurrence of interface traps can be prevented, making it possible to improve the low-light level characteristics of the image sensor.

Abstract: A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.

Abstract: A solid state imaging device includes a plurality of imaging pixels that are arranged two-dimensionally along a main face of a semiconductor substrate. Each imaging pixel in the solid state imaging device includes a photodiode that performs photoelectric conversion and a color filter that is disposed higher in the Z axis direction than the photodiode. Also, light blocking portions have been formed between pairs of adjacent imaging pixels, on the main face of the semiconductor substrate to a height in a thickness direction (Z axis direction) of the semiconductor substrate that is substantially equal to or higher than top edges of the optical filters. Each light blocking portion is constituted from a combination of a light blocking film and a light blocking wall.

Abstract: The present disclosure is directed to a CMOS active pixel sensor that compensates for variations in a threshold voltage of a source follower contained therein. A structure in accordance with an embodiment includes: a replica source follower transistor; a system for creating a current in said replica source follower transistor such that a gate-source voltage of said replica source follower is substantially equal to a threshold voltage of said replica source follower; and a current mirror for biasing the isolation source follower transistor at a same current density as the replica source follower transistor.

Abstract: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.

Abstract: In a solid state imaging device which includes a photodiode in the upper part of a silicon substrate and a MOSFET active region separated from the photodiode by a device isolation region, the width of the device isolation region is smaller in its lower part than in its upper part.

Abstract: A method and apparatus for reducing cross-talk between pixels in a semiconductor based image sensor. The apparatus includes neighboring pixels separated by a homojunction barrier to reduce cross-talk, or the diffusion of electrons from one pixel to another. The homojunction barrier being deep enough in relation to the other pixel structures to ensure that cross-pixel electron diffusion is minimized.

Abstract: A method of manufacturing an optical device includes: a first step of forming an optical-device forming body that includes a plurality of columnar structures arranged in an arrangement direction on a substrate surface via a trench and an outline structure connected to and containing therein the plurality of columnar structures; a second step of oxidizing the optical-device forming body from a state where the optical-device forming body starts to be oxidized to a state where the columnar structure is oxidized; and a third step in which an unoxidized residual part of the outline structure in the second step is oxidized after the second step so as to form an oxidized body. Furthermore, the third step includes restraining the outline structure from being deformed with respect to at least the arrangement direction of the columnar structures in the third step.

Abstract: A pixel cell array architecture having ion implant regions as isolation regions between adjacent active areas of pixels in the array. In one exemplary embodiment, the invention provides an ion-doped p-well region separating n-type photosensitive areas of neighboring pixel cells. The pixel cells have increased fill factor without encountering the disadvantages associated with conventional shallow trench isolation regions.

Abstract: A solid-state imaging device comprises an imaging region, a peripheral circuit region formed in an outer peripheral portion of the imaging region, a first conductivity type semiconductor substrate having the imaging region and the peripheral circuit region on a main surface thereof, a second conductivity type first semiconductor layer formed in the semiconductor substrate, a first conductivity type second semiconductor layer formed in first semiconductor layer, a through electrode formed in a through hole penetrating through the semiconductor substrate in a thickness direction of the semiconductor substrate, and a pad portion formed on the semiconductor substrate and connected to the through electrode. The through hole penetrates through a first conductivity type region of the semiconductor substrate.

Abstract: Provided is a method for fabricating an image sensor device that includes providing a substrate having a front side and a back side; patterning a photoresist on the front side of the substrate to define an opening having a first width, the photoresist having a first thickness correlated to the first width; performing an implantation process through the opening using an implantation energy correlated to the first thickness thereby forming a first doped isolation feature; forming a light sensing feature adjacent to the first doped isolation feature, the light sensing feature having a second width; and thinning the substrate from the back side so that the substrate has a second thickness that does not exceed twice a depth of the first doped isolation feature. A pixel size is substantially equal to the first and second widths.

Abstract: An integrated circuit includes at least one photodiode of the floating substrate type which is associated with a read transistor. The photodiode is formed from a buried layer lying beneath the floating substrate and an upper layer lying on the floating substrate. The upper layer incorporates the source and drain regions of the read transistor. The source and drain regions are produced on either side of the gate of the read transistor. An isolating trench is located alongside the source region and extends from the upper surface of the upper layer down to below the buried layer, so as to isolate the source region from said buried layer.

Abstract: On a semiconductor substrate, a well is formed. In the well, one MOS transistor including a gate electrode, a source region, a source field limiting layer and a source/drain region, and another MOS transistor including a gate electrode, a drain electrode, a drain field limiting layer and a source/drain region are formed. The one and another MOS transistors are connected in series through the source/drain region common to the two transistors. Accordingly, a semiconductor device can be provided in which increase in pattern layout area is suppressed when elements including a high-breakdown voltage MOS transistor are to be connected in series.

Abstract: Embodiments of the invention provide a barrier region for isolating devices of an image sensor. The barrier region comprises a charge accumulation region of a particular conductivity type in a substrate electrically connected to a voltage source terminal. The charge accumulation region is adjacent to at least one pixel cell of a pixel array. The charge accumulation region accumulates charge and prevents charge transference from a pixel cell or peripheral circuitry on one side of the barrier region to a pixel cell on another side of the barrier region.

Abstract: A semiconductor photodetector device includes a light receiving operation section converting incident light to an electric signal and a current amplifying operation section amplifying the electric signal. The light receiving operation section includes: a first conductivity type semiconductor layer a formed on a first conductivity type semiconductor substrate; a second conductivity type first semiconductor region formed on the semiconductor layer; and a first conductivity type second semiconductor region formed on the semiconductor layer and separated from the first semiconductor region. The current amplifying operation section includes: the second semiconductor region; a second conductivity type third semiconductor region formed in the semiconductor substrate; a second conductivity type fourth semiconductor region formed on the third semiconductor region and separated from the second semiconductor region.

Abstract: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.

Abstract: A photovoltaic device and method of manufacture provides a P-N junction formed between doped semiconductor materials and adapted to produce photovoltaic current in response to radiant energy reaching the P-N junction, and a silicon dioxide protective window layer located in proximity to doped semiconductor material and adapted to allow radiant energy to pass therethrough en route to the P-N junction, the protective layer including a high optical transparency layer of amorphous silica, having a silicon dioxide chemistry greater than 75 molar percent (75 mol %).

Abstract: A method for fabricating a solid-state imaging device comprises: a step of forming a photodiode protection insulation film 6a; a step of forming a dummy protection insulation film 6c corresponding to the photodiode protection insulation film 6a both in the peripheral circuit region 1b and the scribe lane region 1c; and a step of forming an interlayer insulation film 9 for covering all three regions of a pixel region 1a in which pixels and the photodiode protection insulation film 6a are formed, a peripheral circuit region 1b in which a driving circuit and the dummy protection insulation film 6c are formed, and a scribe lane region 1c in which the dummy protection insulation film 6c is formed, wherein the dummy protection insulation film 6c causes an average height of a surface of the interlayer insulation film 9 included in each of the peripheral circuit region 1b and the scribe lane region 1c to be close to an average height of a surface of the interlayer insulation film 9 included in the pixel region 1a, be

Abstract: An N-type epitaxial layer 115, which is formed above an N-type semiconductor substrate 114 in each of a pixel region and a peripheral circuit region; a first P-type well 1 formed above the N-type epitaxial layer 115 in the pixel region; and light receiving regions 117, which are formed within the first P-type well 1 and each of which is a component of a photodiode, are included. The peripheral circuit region includes: second P-type wells 2, which are formed from a surface 200 of the peripheral circuit region to a desired depth and each of which is a component of an N-Channel MOS transistor; an N-type well 3 which is formed from the surface 200 of the peripheral circuit region to a desired depth and which is a component of a P-Channel MOS transistor; and a third P-type well 4 which is formed so as to have such a shape as to isolate the N-type well 3 from the N-type epitaxial layer 115 and which has a higher impurity concentration than that of the first P-type well 1.

Abstract: Embodiments relate to an image sensor and a method of manufacturing the image sensor. An image sensor according to the embodiment includes: silicon patterns that are formed on a flexible substrate; a device isolation pattern that is formed between the silicon patterns; a circuit layer that is formed on the silicon patterns and has a first isolation pattern directly connected with the device isolation pattern; and a wiring layer that is formed on the circuit layer and includes a second isolation pattern corresponding to the first isolation pattern, and a wiring electrically connected with the circuit layer. The embodiments provide a flexible image sensor that can be applied to a variety of products and a method of manufacturing the flexible image sensor.

Abstract: An image sensor and a method for manufacturing the same are provided. The image sensor can include a semiconductor substrate, an interlayer dielectric, a second doped layer, a first doped layer, an ohmic contact layer, and metal contacts. The semiconductor substrate can have a pixel region and a peripheral region defined therein. The second doped layer, the first doped layer, and the ohmic contact layer can be stacked on the interlayer dielectric of the semiconductor substrate to form an image sensing device in the pixel region.

Abstract: An embodiment of a Geiger-mode avalanche photodiode includes a body of semiconductor material having a first conductivity type, a first surface and a second surface; a trench extending through the body from the first surface and surrounding an active region; a lateral-isolation region within the trench, formed by a conductive region and an insulating region of dielectric material, the insulating region surrounding the conductive region; an anode region having a second conductivity type, extending within the active region and facing the first surface. The active region forms a cathode region extending between the anode region and the second surface, and defines a quenching resistor. The photodiode has a contact region of conductive material, overlying the first surface and in contact with the conductive region for connection thereof to a circuit biasing the conductive region, thereby a depletion region is formed in the active region around the insulating region.

Abstract: A MOS image pick-up device including a semiconductor substrate, an imaging region formed on the semiconductor substrate by arraying plural unit pixels, and a peripheral circuit region including a driving circuit for operating the imaging region formed on the semiconductor substrate; the unit pixels include a photodiode, MOS (metal-oxide-semiconductor) transistors and a first device-isolation portion, the peripheral circuit region includes a second device-isolation portion for isolating devices in the driving circuit; wherein each of the first device-isolation portion and the second device-isolation portion is at least one portion selected from an electrically insulating film formed on the substrate in order not to erode the substrate, a electrically insulating film formed on the substrate so as to erode the substrate to a depth ranging from 1 nm to 50 nm, and an impurity diffusion region formed within the substrate. The MOS image pick-up device is incorporated in a camera.