With Specific Isolation Means In Integrated Circuit Patents (Class 257/446)
  • Patent number: 5962909
    Abstract: The microbridge structure comprises a substrate layer provided with two first electrical contacts, a microstructure provided with two second electrical contacts, and a micro support for suspending the microstructure over and at a predetermined distance from the substrate layer. The micro support extends along a vertical axis. The micro support has a central upper cavity extending along the vertical axis within the micro support. The micro support has a lower end connected to the substrate layer and an upper end connected to the microstructure for supporting the microstructure with respect to the substrate layer. The micro support is a multilayer micro support comprising two conductive paths and a layer made of dielectric material. The conductive paths and the layer of the micro support extend from the upper end to the lower end thereof. The two conductive paths connect respectively the two first contacts to the two second contacts.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: October 5, 1999
    Assignee: Institut National D'Optique
    Inventors: Hubert Jerominek, Martin Renaud, Nicholas R. Swart
  • Patent number: 5942774
    Abstract: A photoelectric conversion element includes a photoelectric conversion portion for generating and storing a charge according to incident light, an amplifying portion having a control region for generating a signal output according to the charge received in the control region from the photoelectric conversion portion, a transfer control portion for transferring the charge generated and stored in the photoelectric conversion portion to the control region of the amplifying portion, a reset-purpose charge draining region for draining the charge transferred to the control region of the amplifying portion, and a reset-purpose control region for controlling the reset-purpose charge draining region. A reset operation can be performed without operating the amplifying portion. Also, a photoelectric conversion apparatus having high sensitivity and low dissipation power can be obtained.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: August 24, 1999
    Assignee: Nikon Corporation
    Inventors: Tadao Isogai, Atsushi Kamashita, Satoshi Suzuki
  • Patent number: 5929499
    Abstract: In a photodiode array suitable for use in an x-ray detector for computed tomography, the influences of direct conversion of x-rays into contributions to the electrical output signal and optical cross-talk between channels in the photodiode array are significantly reduced by integrating a number of extraction diodes into the photodiode array, with one extraction diode disposed between each two neighboring photodiodes. The anodes of all of the extraction diodes are connected together at a common anode contact, the common anode contact being connected to a voltage source which applies a voltage across all of the extraction diodes for operating the extraction diodes reverse biased, i.e. so as to block current flow.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: July 27, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Werner Kuhlmann, Martin Schmidt, Rolf Lindner, Roland Ziegler
  • Patent number: 5923071
    Abstract: A semiconductor substrate having a silicon-on-insulator structure may achieve superior performance by utilizing a low oxygen content monocrystalline silicon thin film layer for device formation. A supporting substrate, which may comprise a transparent material, such as quartz, or which may be silicon, has an insulating film disposed thereover. The insulating film preferably has a lower diffusion coefficient with respect to impurities than the monocrystalline silicon thin film, which is provided thereover. In accordance with this structure, oxygen particles are not introduced into the monocrystalline thin film and the thin film has a low oxygen concentration to maximize the minority carrier lifetime, enhance device performance characteristics, and prevent the occurrence of latch up.
    Type: Grant
    Filed: September 27, 1993
    Date of Patent: July 13, 1999
    Assignee: Seiko Instruments Inc.
    Inventor: Yutaka Saito
  • Patent number: 5898209
    Abstract: A semiconductor photosensitive element comprises first and second photosensitive regions. The first photosensitive region is different from the second photosensitive region in its structure and thereby the first photosensitive region has photoelectric conversion characteristic and frequency characteristic which are different from those of the second photosensitive region.
    Type: Grant
    Filed: June 13, 1995
    Date of Patent: April 27, 1999
    Assignee: Sony Corporation
    Inventor: Shinji Takakura
  • Patent number: 5861655
    Abstract: A photoelectric conversion apparatus has an element separation structure that is adequate as to crosstalk between pixels and excellent in FPN characteristics. The photoelectric conversion apparatus comprises a semiconductor substrate of a first conduction type, a plurality of first semiconductor regions formed in a surface of the semiconductor substrate and having the opposite conduction type to that of the substrate, a second semiconductor region having the same conduction type as the first semiconductor regions and disposed between the plurality of first semiconductor regions thus formed, and a third semiconductor region disposed between the first and second semiconductor regions having the first conduction type, and having an impurity concentration higher than that of the semiconductor substrate.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: January 19, 1999
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Shigetoshi Sugawa
  • Patent number: 5859450
    Abstract: A photodiode is provided. The photodiode includes an insulative region (IR) that permits passage of light therethrough. The photodiode also includes a substrate region of a first conductivity type and a well region of a second conductivity type. The well is formed within the substrate, beneath the IR. The well is demarcated from the substrate by a first surface. The photodiode further includes a heavily doped region (HDR) of the second conductivity type. The HDR is formed within the IR at a first position. The first surface meets the HDR at substantially the first position.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: January 12, 1999
    Assignee: Intel Corporation
    Inventors: Lawrence T. Clark, Mark A. Beiley
  • Patent number: 5852321
    Abstract: A thermal type infrared radiation solid state image pick-up device includes a temperature-electrical signal converting function element and a heat isolation structural body supporting the temperature-electrical signal converting function element. The heat isolation structural body is formed of a silicon oxide or a silicon nitride in porous structure. Since the heat isolation structural body has porous structure, heat flowing out from the heat isolation structural body depends on an actual area derived by subtracting the area of the holes from the area of the cross-section of the leg (nominal cross section). On the other hand, the mechanical strength of the heat isolation structural body relies on the area of the cross section of the leg. Therefore, for obtaining the photo sensitivity equivalent to that of the conventional heat isolation structural body, the cross sectional area of the leg can be made greater to improve mechanical strength thereof.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: December 22, 1998
    Assignee: NEC Corporation
    Inventor: Shigeru Tohyama
  • Patent number: 5841176
    Abstract: Isolation between the heavily-doped active regions of an active pixel sensor cell is provided by utilizing a series of isolation regions which have a doping concentration that is approximately equal to the doping concentration of a low-density drain (LDD) region. A first isolation region of the series, which has the same conductivity type as the active regions, is formed to adjoin a first active region. A second isolation region of the series, which has the opposite conductivity type as the active regions, is formed to adjoin the first isolation region. A third isolation region, which has the same conductivity type as the active regions, is formed to adjoin the second isolation region and a second active region.
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: November 24, 1998
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5825071
    Abstract: A semiconductor photosensitive element comprises first and second photosensitive regions. The first photosensitive region is different from the second photosensitive region in its structure and thereby the first photosensitive region has photoelectric conversion characteristic and frequency characteristic which are different from those of the second photosensitive region.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: October 20, 1998
    Assignee: Sony Corporation
    Inventor: Shinji Takakura
  • Patent number: 5796153
    Abstract: Variable-response photodetectors adapted to compensate for nonuniformity along an axis of a scintillating crystal by means of multi-element photodiodes and systems for selectively activating different photodiode sub-elements are disclosed, together with arrays of such photodetectors and X-ray detection systems utilizing such photodetectors.
    Type: Grant
    Filed: September 12, 1995
    Date of Patent: August 18, 1998
    Assignee: Analogic Corporation
    Inventor: Sorin Marcovici
  • Patent number: 5793060
    Abstract: There is provided an optical semiconductor device, including a first semiconductor layer, a first insulating layer formed on the first semiconductor layer, the first insulating layer having a different index of refraction from that of the first semiconductor layer, a highly doped, second semiconductor layer formed on the first insulating layer, a third semiconductor layer formed on the second semiconductor layer, a device isolation region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the first insulating layer, the device isolation region defining a device formation region therein, the device formation region being formed with a recess starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the second semiconductor layer, a second insulating layer covering an inner sidewall of the recess therewith, a multi-layered structure formed within the recess, the multi-layered structure having at least a q
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: August 11, 1998
    Assignee: NEC Corporation
    Inventor: Takenori Morikawa
  • Patent number: 5789774
    Abstract: The leakage current at the silicon-to-silicon dioxide interfaces of an active pixel sensor cell is substantially reduced by eliminating field oxide from the cell, and by insuring that, during integration, every surface region of the cell that is not heavily doped is either biased into accumulation or biased into inversion. Each of these states, in turn, substantially limits the number of electrons from thermally-generated electron-hole pairs at the surface that can contribute to the leakage current.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: August 4, 1998
    Assignee: Foveonics, Inc.
    Inventor: Richard Billings Merrill
  • Patent number: 5777355
    Abstract: A radiation imager having a plurality of photosensitive elements has a two-tier passivation layer disposed between the top patterned common electrode contact layer and respective photosensor islands. The top passivation layer is a polymer bridge member disposed between adjacent photodiodes so as to isolate defects such as moisture-induced leakage in any bridge island layer to the two adjacent photodiodes spanned by the bridge island.
    Type: Grant
    Filed: December 23, 1996
    Date of Patent: July 7, 1998
    Assignee: General Electric Company
    Inventors: George Edward Possin, Robert Forrest Kwasnick, Jianqiang Liu
  • Patent number: 5770871
    Abstract: A sensor array has cells, each with a sensing element and a switching element. The sensing element includes a charge collection electrode. An anticoupling layer between the charge collection electrodes and the data lines is structured to reduce capacitive coupling between the electrodes and the data lines below a threshold level at which crosstalk is unacceptable. If charge collection electrodes overlap data lines, the anticoupling layer can reduce capacitive coupling so that crosstalk is no greater than 2%. The anticoupling layer can be a dielectric layer with dielectric constant less than 6 and with thickness greater than 1.5 .mu.m, with the dielectric constant being sufficiently low and the thickness sufficiently great that the anticoupling layer reduces capacitive coupling below the threshold level.
    Type: Grant
    Filed: June 20, 1996
    Date of Patent: June 23, 1998
    Assignee: Xerox Corporation
    Inventor: Richard L. Weisfield
  • Patent number: 5767538
    Abstract: An integrated circuit photodetector includes a transimpedance amplifier including a differential amplifier stage with PNP emitter-coupled transistors and a PNP input transistor which are biased only by base currents of the emitter-coupled transistors, to achieve low input bias current. Low noise operation is achieved by bypass capacitors coupled between the bases and emitters of the input transistors, respectively. A constant current source supplies a current which develops a small pedestal voltage across a resistor to bias the non-inverting input of the transimpedance amplifier so as to avoid nonlinear amplification of low level light signals. A positively biased N-type guard tub surrounds the photodetector, which is formed in a junction-isolated N region on a P substrate, to collect electrons generated in the substrate by deep-penetrating IR light to prevent them from causing amplification errors.
    Type: Grant
    Filed: October 9, 1996
    Date of Patent: June 16, 1998
    Assignee: Burr-Brown Corporation
    Inventors: Edward Mullins, Rodney T. Burt, Walter B. Meinel, R. Mark Stitt, II
  • Patent number: 5763909
    Abstract: A bipolar phototransistor comprises both an Integrating photosensor and a switching element. The base terminal of the bipolar phototransistor is utilized as the switch-control node for the pixel and its emitter is the output node of the integrating photosensor. A plurality of integrating photosensors may be placed in an array of rows and columns, wherein the bases of all bipolar phototransistors in a row are capacitively coupled together to a common row-select line, and the emitters of all bipolar phototransistors in a column are connected together to a column sense line. The input of a sense amplifier is connected to the sense line of each column of integrating photosensors. An integrating sense amplifier according to the present invention includes an amplifying element having an inverting input connected to the sense line. A capacitor, preferably a varactor, is also connected between the inverting input and output of the amplifying element.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: June 9, 1998
    Assignee: Synaptics, Incorporated
    Inventors: Carver A. Mead, Federico Faggin
  • Patent number: 5731600
    Abstract: An image sensor device comprising a gate electrode provided on an insulating surface, a gate insulating film provided on the gate electrode, an active region, provided on the gate insulating film, for generating a carrier upon light irradiation, and doped regions provided with the active region between the doped regions. The optical carrier generated in the active region by light irradiation to the active region flows between the doped regions as current. The light irradiation can be deleted from this current with a high sensitivity.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: March 24, 1998
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsufumi Codama, Michio Arai
  • Patent number: 5721447
    Abstract: This invention provides an improved photodetector with the availability of various amplifiers and with a small circuit scale. A first light-receiving element PD.sub.1 is composed of a first impurity region of the n-type formed on a p-type semiconductor substrate and a second impurity region of the p-type formed at a surface zone of the first impurity region. A second light-receiving element PD.sub.2 is composed of the semiconductor substrate and a third impurity region of the n-type. PD.sub.1 and PD.sub.2 are connected together in series. Such arrangement makes it possible to reduce the circuit scale of photodetectors if a bipolar transistor or the like is used as an amplifier means. The photosensitivity becomes higher since reverse-bias voltages are applied to PD.sub.1 and PD.sub.2. Additionally, it is possible to set a wavelength band for light to be detected, according to the area ratio of PD.sub.1 and PD.sub.2.
    Type: Grant
    Filed: April 5, 1996
    Date of Patent: February 24, 1998
    Assignee: Matsushita Electronics Corporation
    Inventors: Katuichi Oosawa, Katuhiko Oimura, Hideaki Usukubo
  • Patent number: 5714773
    Abstract: The specification describes lightwave systems with remotely powered photoelectric generators. Optical power transmitted through the fiber is incident on a remotely located photodiode array. High power conversion efficiency coupled with a specially designed diode array generates sufficient power to operate electromechanical or electrooptic apparatus in the remote station. Long wavelength photodiodes are serially connected to increase the voltage to practical operating levels. In a communication system, with an optical signal transmitted with the optical power, multiplexers are used for separating the optical power from the optical signal. Also disclosed are optimally designed photodetector arrays in which the photodetector elements are segments of a circular or polygonal circularly symmetric array to increase the fill factor of the array.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: February 3, 1998
    Assignee: Lucent Technologies Inc.
    Inventors: Ellsworth C. Burrows, Andrew Gomperz Dentai, Clinton Randy Giles
  • Patent number: 5672902
    Abstract: An image sensor includes a substrate on which are formed a light-receiving element and a thin-film transistor for transferring an output from the light-receiving element, and a silicon integrated circuit chip for driving the thin-film transistor and processing signals. All externally connected input/output signal lines are extracted through or electrically connected to the silicon integrated circuit chip.
    Type: Grant
    Filed: February 22, 1995
    Date of Patent: September 30, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsunori Hatanaka, Toshihiro Saika, Takayuki Ishii, Katsuhiko Yamada
  • Patent number: 5672903
    Abstract: A thermal detector includes a transducer layer of semiconducting yttrium barium copper oxide which is sensitive at room temperature to radiation and provides detection of infrared radiation. In a gate-insulated transistor embodiment, a layer of ferroelectric semiconducting yttrium barium copper oxide forms a gate insulator layer and increases capacitance of the transistor or latches the transistor according to the polarization direction of the ferroelectric layer.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: September 30, 1997
    Assignee: Southern Methodist University
    Inventors: Donald P. Butler, Zeynep Celik-Butler, Pao-Chuan Shan
  • Patent number: 5671914
    Abstract: A multi-band spectroscopic photodetector array including a substrate having a buried insulator layer in the substrate for electrically isolating a lower section of the substrate located below the insulator layer form an upper section of the substrate located above the insulator layer; and a plurality of photodetection elements each formed on a different portion of the upper layer and each including elements for detecting photons in a selected wavelength range; wherein each of the different portions of the upper section has a different thickness and wherein the thickness at least in part determines the selected wavelength of the photons detected by each of the detection elements.
    Type: Grant
    Filed: November 6, 1995
    Date of Patent: September 30, 1997
    Assignee: Spire Corporation
    Inventors: Nader M. Kalkhoran, Fereydoon Namavar
  • Patent number: 5670817
    Abstract: Methods are disclosed for fabricating a monolithic array of radiation detectors and associated readout circuits, as are monolithic arrays fabricated by the methods.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: September 23, 1997
    Assignee: Santa Barbara Research Center
    Inventor: David A. Robinson
  • Patent number: 5665998
    Abstract: A substantial portion of the material at the pn junction (27) of the photodiode (37, 41) having an implanted region extending to a surface thereof is selectively removed (39), leaving a very small junction region (35, 43) with the remainder of the p-type (23) and n-type (25) material of each photodiode being spaced apart or electrically isolated at what was originally the junction. In the ion implanted n-type on p-type approach, the majority of the signal is created in the implanted n-type region while the majority of the noise is generated in the p-type region. By selectively removing p-type material, n-type material or both from the pn junction of the diode or otherwise electrically isolating most of the p-type and n-type regions from each other at the pn junction and thereby minimizing the pn junction area, noise is greatly reduced without affecting the signal response of the photodiode.
    Type: Grant
    Filed: February 14, 1996
    Date of Patent: September 9, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Peter D. Dreiske, Arthur M. Turner, David I. Forehand
  • Patent number: 5663577
    Abstract: A solid state imager is provided that has a robust, high integrity upper barrier layer disposed over photosensor pixels and data address line topography in the imager. Data address line spacers disposed between the sidewalls of the data address lines and the upper barrier layer provide an inclined foundation for the upper barrier layer in the vicinity of the data address line sidewalls, thereby providing barrier layer high integrity step segments in the region of the steps around relatively thick data address lines. The address line spacers are formed from residual photosensor semiconductive material, typically amorphous silicon, which remains following the etching steps to form deposited photosensitive semiconductive material into the pixel photosensor bodies.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: September 2, 1997
    Assignee: General Electric Company
    Inventors: Robert Forrest Kwasnick, Jianqiang Liu
  • Patent number: 5663576
    Abstract: A photoelectric conversion element having an improved 8 characteristic is constructed of an insulation film and a photoelectric conversion film formed as islands. These films are stacked successively on a shield film formed on a transparent insulating substrate. Electrodes that connect the islands of the photoelectric conversion film together are formed at prescribed intervals and in prescribed widths so that each of the electrodes covers the upper surface of a different end portion of the photoelectric conversion film. A low resistance film is provided between the photoelectric conversion film and each of the electrodes.
    Type: Grant
    Filed: September 1, 1995
    Date of Patent: September 2, 1997
    Assignee: NEC Corporation
    Inventor: Kousaku Shimizu
  • Patent number: 5656848
    Abstract: A porous film 64 is used to thermally insulate sensing integrated circuitry 44 from pixels 34 of an uncooled IR detector hybrid system 30. The porous film 64 is preferably a silicon-dioxide xerogel. A protective film 65 may be deposited on the porous film 64.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 12, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, Chih-Chen Cho
  • Patent number: 5631473
    Abstract: A solid state array device includes a plurality of pixels with associated respective TFT switching transistors; a plurality of first address lines disposed in a first layer of the array device; a plurality of second conductive address lines disposed in a second layer of the array device, respective ones of said first and second address lines being disposed substantially perpendicular to one another in a matrix arrangement such that respective ones of the second address lines overlie respective ones of the first address lines at respective crossover regions; a TFT gate dielectric layer disposed in a channel region of each of the pixel TFTs and further being disposed over the first address lines; and a crossover region supplemental dielectric layer disposed in respective ones of the crossover regions between the first and second address lines, but disposed so as to not extend over the TFT channel regions.
    Type: Grant
    Filed: June 21, 1995
    Date of Patent: May 20, 1997
    Assignee: General Electric Company
    Inventors: George E. Possin, Robert F. Kwasnick, Roger S. Salisbury
  • Patent number: 5629550
    Abstract: A photodiode built-in semiconductor device is provided that can prevent internal peripheral circuits from erroneously operating due to incident light entering slantingly, or not perpendicular to a top surface of the semiconductor chip. A semiconductor chip 20 includes a photodiode and its peripheral circuits. The region except for the photodiode is covered with a light shielding film 22 of aluminum metallization. An isolation region (P.sup.+) 23 is arranged at an outermost portion of the chip. A dummy island 24 is formed so as to surround the entire portion of the chip 20. An N.sup.+ -type low resistance region 25 is formed in the surface of the dummy island 24. The dummy photodiode is formed by applying a reverse bias potential across the PN junction defined between the isolation region 23 and the dummy island 24.
    Type: Grant
    Filed: August 29, 1995
    Date of Patent: May 13, 1997
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Keiji Mita, Osamu Shiroma
  • Patent number: 5623158
    Abstract: This is a system and method of forming an electrical contact to the optical coating of an infrared detector. The method may comprise: forming thermal isolation trenches 22 in a substrate 20; depositing a trench filler 24 in the thermal isolation trenches 22; depositing a common electrode layer 31 over the thermal isolation trenches 22; depositing an optical coating 26 above the common electrode layer 31; mechanically thinning the substrate to expose the trench filler 24; etching to remove the trench filler 24 in the bias contact area; depositing a contact metal 34 on the backside of the substrate 20, wherein the contact metal 34 connects to the common electrode layer 31 at bias contact areas 34 around a periphery of the thermal isolation trenches; and etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20. Bias contact vias 23 may be formed in the bias contact areas and then filled with bias contact metal 49.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 22, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Steven N. Frank, James F. Belcher, Charles E. Stanford, Robert A. Owen, Robert J. S. Kyle
  • Patent number: 5614744
    Abstract: An active pixel image sensor in accordance with the present invention utilizes guard rings, protective diffusions, and/or a combination of these two techniques to prevent electrons generated at the periphery of the active area from impacting upon the image sensor array. For example, an n+ guard ring connected to V.sub.cc can be imposed in the p-epi layer between the active area edge and the array, making it difficult for edge-generated electrons to penetrate the p+ epi in the array; this approach requires the use of annular MOS devices in the array. Alternatively, the gates of the n-channel devices in the array can be built to overlap heavily doped p+ bands, forcing current flow between the source/drain regions. As stated above, combinations of these two techniques are also contemplated. Elimination of the active area edge leakage component from the array can increase the dynamic range of the image sensor by 6 bits.
    Type: Grant
    Filed: August 4, 1995
    Date of Patent: March 25, 1997
    Assignee: National Semiconductor Corporation
    Inventor: Richard B. Merrill
  • Patent number: 5608255
    Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: March 4, 1997
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, William Waters, Joseph P. Lorenzo, Stephen Spaziani
  • Patent number: 5602415
    Abstract: A light receiving device including a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type which is formed on the semiconductor substrate of the first conductivity type; and a semiconductor layer of the first conductivity type which elongates from a surface of the first semiconductor substrate of the second conductivity type to reach a surface of the semiconductor substrate of the first conductivity type, the semiconductor layer splitting the first semiconductor layer of the second conductivity type into a plurality of semiconductor regions of the second conductivity type. The portion of the semiconductor layer of the first conductivity type which overlaps with the semiconductor substrate of the first conductivity type is formed as a semiconductor region of the first conductivity type and has a high-impurity density.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: February 11, 1997
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaru Kubo, Naoki Fukunaga, Motohiko Yamamoto
  • Patent number: 5600173
    Abstract: A semiconductor position sensitive detector has an epitaxial layer of a second conductivity type formed on a semiconductor substrate of a first conductivity type. A first diffusion layer of the first conductivity type is formed in said epitaxial layer so as to isolate a rectangular portion of this epitaxial layer from the rest. A second diffusion layer of the first conductivity type is further formed in said rectangular portion of the epitaxial layer, in order to increase the resistance value of the epitaxial layer. In addition, due to the formation of the second diffusion layer, two p-n junctions having photoelectric transfer ability are formed in this device. So, a semiconductor position sensitive detector having excellent photoelectric characteristics can be obtained.
    Type: Grant
    Filed: February 8, 1995
    Date of Patent: February 4, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Suzunaga
  • Patent number: 5598022
    Abstract: The plurality of functioning circuits are formed in a plurality of P-type well regions formed on a remaining part of said low concentration N-type layer, by isolating from each other. According to the present invention, the photoelectric current from the PIN photodiode can be processed in the functioning circuits formed in the P-type well regions by isolating from each other, so that the interference between the functioning circuits can be prevented and also the shift of the current flowing in each functioning circuit due to the impossibility of the high concentration N-type semiconductor layer to be grounded can be prevented. Therefore, the malfunction of the integrated PIN photodiode sensor can be prevented, and the PIN photodiode sensor can operate with high speed because the distributed resistance between the functioning circuits is decreased.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: January 28, 1997
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Mikio Kyomasu
  • Patent number: 5593902
    Abstract: A substantial portion of the material at the pn junction (27) of the photodiode (37, 41) having an implanted region extending to a surface thereof is selectively removed (39), leaving a very small junction region (35, 43) with the remainder of the p-type (23) and n-type (25) material of each photodiode being spaced apart or electrically isolated at what was originally the junction. In the ion implanted n-type on p-type approach, the majority of the signal is created in the implanted n-type region while the majority of the noise is generated in the p-type region. By selectively removing p-type material, n-type material or both from the pn junction of the diode or otherwise electrically isolating most of the p-type and n-type regions from each other at the pn junction and thereby minimizing the pn junction area, noise is greatly reduced without affecting the signal response of the photodiode.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: January 14, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Peter D. Dreiske, Arthur M. Turner, David I. Forehand
  • Patent number: 5587611
    Abstract: A coplanar photodiode construction is disclosed having particular utility in X-ray detection applications in which alternating P-doped and N-doped regions, separated by undoped material, are located in relatively shallow depth under and along the surface between the photodiode and an associated X-ray scintillating crystal.
    Type: Grant
    Filed: May 8, 1995
    Date of Patent: December 24, 1996
    Assignee: Analogic Corporation
    Inventors: Alexander T. Botka, Ben Tuval, Sorin Marcovici
  • Patent number: 5572059
    Abstract: A thermal isolation structure (10) is disposed between a focal plane array and an integrated circuit substrate (12). The thermal isolation structure (10) includes a mesa-type formation (16) and a mesa strip conductor (18, 26) extending from the top of the mesa-type formation (16) to an associated contact pad (14) on the integrated circuit substrate (12). After formation of the mesa-type formation (16) and the mesa strip conductor (18, 26), an anisotropic etch using the mesa strip conductor (18, 26) as an etch mask removes excess mesa material to form trimmed mesa-type formation (24) for improved thermal isolation. Bump bonding material (20) may be deposited on mesa strip conductor (18, 26) and can also be used as an etch mask during the anisotropic etch. Thermal isolation structure (100) can include mesa-type formations (102), each with a centrally located via (110) extending vertically to an associated contact pad (104) of integrated circuit substrate (106).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 5, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: William K. Walker, Steven N. Frank, Charles M. Hanson, Robert J. S. Kyle, Edward G. Meissner, Robert A. Owen, Gail D. Shelton
  • Patent number: 5567974
    Abstract: A photo IC having a plurality of photodiodes is disclosed. A semiconductor region to absorb stray carriers is provided between the photodiodes. Stray carriers generated by incidence of light are absorbed by the semiconductor region. As a result, crosstalk between the photodiodes is reduced.
    Type: Grant
    Filed: December 5, 1994
    Date of Patent: October 22, 1996
    Assignee: Sony Corporation
    Inventors: Nobuyuki Yoshitake, Shinji Takakura
  • Patent number: 5563431
    Abstract: A photoelectric converter is adapted for an accumulation operation, readout operation and refresh operation. The photoelectric converter includes a transistor including a control electrode region having a semiconductor of a first conductivity type, a first main electrode region comprising a semiconductor of a second conductivity type different from the first conductivity type and disposed electrically connectable to an output circuit including a capacitive load, and a second main electrode region of the second conductivity type, the control electrode region being adapted for accumulating carriers in response to light energy received. Refresh is provided for extinguishing the accumulated carriers while holding the first main electrode region at a reference potential during the refresh operation after the readout operation for reading out a signal based on the accumulated carriers.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: October 8, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadahiro Ohmi, Nobuyoshi Tanaka
  • Patent number: 5541438
    Abstract: An improved Metal Semiconductor Metal (MSM) photodiode device and a fabrication process for realizing this device. The improved photodiode device employs frontside electrodes and backside illumination to avoid active area shadowing in the device. This configuration is achieved through a device fabrication sequence which involves substrate removal--and replacement at the device's opposed frontside surface using such media as an epoxy adhesive. The disclosed device uses gallium arsenide semiconductor materials that are lattice determined by an indium phosphide sacrificial initial substrate, in order to select a desired input energy spectral range.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: July 30, 1996
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Eric A. Martin, Kenneth Vaccaro, Joseph P. Lorenzo
  • Patent number: 5536965
    Abstract: Thermal isolation mesas 36 comprising a porous material 64 are used to thermally insulate sensing integrated circuitry 44 from pixels 34 of an uncooled IR detector hybrid system 30. The porous material 64 is preferably a silicon-dioxide xerogel. The mesas 36 may also comprise a protective film 66.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 16, 1996
    Assignee: Texas Instruments Incorporated
    Inventors: Howard R. Beratan, Chih-Chen Cho, Scott R. Summerfelt
  • Patent number: 5534720
    Abstract: A solid state image sensing element including a substrate, photodiode areas each having a plurality of photodiodes in matrix array formed on the substrate, a flat area formed over the substrate including the photodiode areas, color filter layers formed in predetermined areas on the flat area, a top coating layer formed in predetermined areas on the flat area, a top coating layer formed over the substrate including the color filter areas, stripe microlenses each having a flat upper surface arranged to correspond to the photodiodes arranged in one direction in the photodiode areas and formed on the top coating layer, and mosaic microlenses formed on the flat upper surface of the stripe microlens each arranged corresponding to each of the photodiodes in the photodiode area.
    Type: Grant
    Filed: September 7, 1995
    Date of Patent: July 9, 1996
    Assignee: LG Semicon Co., Ltd.
    Inventors: Kwang B. Song, Sung K. Kim, Jin S. Shim
  • Patent number: 5504365
    Abstract: A spatial light modulation device, in which at least a photoconductor structure and a light modulator have a multilayer structure. In this spatial light modulation device, the photoconductor structure has a plurality of pixel portions and avalanche multiplication of charges generated by light incident on each of the pixel portions is performed therein and charges obtained as a result of the avalanche multiplication are stored in the pixel portions. Thus, this spatial light modulation device has high sensibility.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: April 2, 1996
    Assignee: Victor Company of Japan, Ltd.
    Inventors: Tetsuhiro Yamazaki, Atushi Nakano, Yuuichi Kuromizu
  • Patent number: 5481124
    Abstract: Compatibility of high sensitivity with low remaining images, and low crosstalk can be achieved by a laminated solid-state image pickup device, which includes accumulating portions for accumulating electric signals, reading units for reading the electric signals, connecting members formed in contact with the accumulating portions, and a photoconductive film, and by a method for manufacturing the device. The photoconductive film is made of a non-crystalline semiconductor, and is configured by laminating a carrier multiplication layer, a light absorbing layer, a charge injection inhibiting layer of a second conduction type. Each of the connecting members is made of a semiconductor layer of a first conduction type, intrinsic or having a low impurity density, surrounded by a semiconductor layer of the second conduction type or a conductive material.
    Type: Grant
    Filed: August 10, 1994
    Date of Patent: January 2, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Shigetoshi Sugawa, Hisae Shimizu
  • Patent number: 5466962
    Abstract: A light-receiving semiconductor device with improved light sensitivity. On a semiconductor substrate of a first conductivity type is formed a plurality of buried layers of a second conductivity type divided by a narrow dividing region. A surface semiconductor layer of the first conductivity type covers the buried layers and the substrate. A connecting semiconductor region of the second conductivity type extends from each of the plurality of the buried layers to the surface of the surface semiconductor layer. An anti-light-reflecting film formed on the surface of the surface semiconductor layer covers a region above the dividing region as well as above the plurality of buried layers. Each of the plurality of buried layers forms a light responsive element with the substrate.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: November 14, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Motohiko Yamamoto, Masaru Kubo
  • Patent number: 5459333
    Abstract: A semiconductor photodetector has a channel of conductive material which connects two terminal poles and is defined by potential barrier regions and by space-charge regions that can be reduced by means of incident light. The channel is comprised of a conductive layer parallel to the surface and having laterally narrowing barrier regions extending through the layer.
    Type: Grant
    Filed: August 11, 1994
    Date of Patent: October 17, 1995
    Assignee: Daimler-Benz Aktiengesellschaft
    Inventors: Hans Brugger, Diplom-Physiker U. Meiners, Ewald Schlosser
  • Patent number: 5449944
    Abstract: A semiconductor image pickup device comprises a photo-sensing substrate and a signal processing substrate, wherein the photo-sensing substrate further comprises a plurality of detector elements, and the signal processing substrate comprises a plurality of input diodes, each detector element being operatively connected to the respective input diode. The detector elements are isolated and light shielded from each other and further from the signal processing substrate by a light shield layer, and each detector element has an input port for incident rays on an input side of the photo-sensing substrate and has a surface region on the opposite side for outputting a signal to the input diode. The light shield layer of the invention comprises an insulation multilayer and a metal layer laminated in this order from the input side of the incident rays. The embodiments utilize a silicon nitride layer and zinc sulphide layer as the insulation multilayer.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: September 12, 1995
    Assignee: Fujitsu Limited
    Inventors: Gen Sudo, Soichiro Hikida
  • Patent number: 5446308
    Abstract: A method of forming a planar semiconductor device, such as an array of APDs, includes the steps of doping a substantially planar block of n type semiconductor material with a p type dopant in accordance with a selected pattern to form a plurality of n type wells in the block surrounded by a foundation of p type semiconductor material. Each n type well is disposed so as to respectively adjoin a first surface of the block and such that a respective p-n junction is formed between the n type material in the well and the p type material foundation. The n type semiconductor material in each well has a substantially constant concentration of n type dopant throughout the n type material; the concentration of p type dopant in the foundation has a positive gradient extending from the p-n junction towards the second surface such that the peak surface electric field of the p-n junction in each well is less than the bulk electric field of the same p-n junction.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: August 29, 1995
    Assignee: General Electric Company
    Inventors: Dante E. Piccone, Ahmad N. Ishaque, Donald E. Castleberry, Henri M. Rougeot, Peter Menditto