Abstract: A solid state array has a plurality of radiation detector unit cells, wherein each unit cell includes a bias-selectable two color photodetector in combination with either a second bias-selectable two color detector (10, 11) or a single photodetector (10', 11'). Each unit cell is thus capable of simultaneously outputting charge carriers resulting from the absorption of electromagnetic radiation within two spectral bands that are selected from one of four spectral bands and three spectral bands.

Abstract: This invention provides an improved photodetector with the availability of various amplifiers and with a small circuit scale. A first light-receiving element PD.sub.1 is composed of a first impurity region of the n-type formed on a p-type semiconductor substrate and a second impurity region of the p-type formed at a surface zone of the first impurity region. A second light-receiving element PD.sub.2 is composed of the semiconductor substrate and a third impurity region of the n-type. PD.sub.1 and PD.sub.2 are connected together in series. Such arrangement makes it possible to reduce the circuit scale of photodetectors if a bipolar transistor or the like is used as an amplifier means. The photosensitivity becomes higher since reverse-bias voltages are applied to PD.sub.1 and PD.sub.2. Additionally, it is possible to set a wavelength band for light to be detected, according to the area ratio of PD.sub.1 and PD.sub.2.

Abstract: A solid state imaging device includes a light receiving portion having a first photodiode and a second photodiode whose potential well is deeper and whose photosensitivity is lower than that of the first photodiode, and a transmitting portion having a first transmitting gate for transmitting charges accumulated in the first photodiode to a transmission device and a second transmitting gate for transmitting charges accumulated in the second photodiode to the transmission device. Thus, the dynamic range of the solid state imaging device becomes wider.

Abstract: The specification describes lightwave systems with remotely powered photoelectric generators. Optical power transmitted through the fiber is incident on a remotely located photodiode array. High power conversion efficiency coupled with a specially designed diode array generates sufficient power to operate electromechanical or electrooptic apparatus in the remote station. Long wavelength photodiodes are serially connected to increase the voltage to practical operating levels. In a communication system, with an optical signal transmitted with the optical power, multiplexers are used for separating the optical power from the optical signal. Also disclosed are optimally designed photodetector arrays in which the photodetector elements are segments of a circular or polygonal circularly symmetric array to increase the fill factor of the array.

Abstract: An amplifying type photoelectric converting device is disclosed. The device includes: a semiconductor substrate of a first conductive type; a well portion of a second conductive type for accumulating signal charges generated by photoelectric conversion; a semiconductor region of the first conductive type provided in a region in the well portion; a first gate region including a first electrode; and a second gate region being adjacent to the first gate region and including a second electrode. An active element is formed between the semiconductor region and the semiconductor substrate, and a change in an operational characteristic of the active element which is generated by the signal charges is used as an output signal.

Abstract: A photodetector arrangement capable of detecting high-power-light flux and including a set of elementary photodetectors each one of which is individually tested to determine that it has no defects. Each of the photodetectors which is found to be free of objectionable defects is connected in parallel to a common conducting line to thus produce a combined output when radiation impinges on the detector surface. The connection can be hard wired or provided through a set of transistors acting as connection control intermediaries between the good photodetectors and the common conducting line. The active areas of only good photodetectors are thus combined to form a large photodetector area of any desired shape or size without the usual reliability problems. The selective control of the transistors can further be provided by auxiliary control photodetectors to additionally automatically control the size of the active area in response to the area of light being detected or a control light beam.

Abstract: A photodetector array for sensing radiant energy is described incorporating photodetectors, a respective semiconductor region for holding charge and two transistors coupled in series at each pixel, and a column load transistor. An amplifier at the load transistor may provide gain while providing dynamic range compression and a reduction in signal noise due to resetting of the voltage at the semiconductor regions. The invention overcomes the problem of CMOS manufacturing of photodetector arrays and for a simplified circuit per pixel to enable denser arrays and reduced noise.

Abstract: A flat panel display comprising thin-film-transistor-electroluminescent (TFT-EL) pixels is described. An addressing scheme incorporating two TFTs and a storage capacitor is used to enable the EL pixels on the panel to operate at a duty factor close to 100%. This TFT-EL device eliminates the need to pattern the EL cathode, thus greatly simplifying the procedure to delineate the EL pixels as well as ensuring high resolution. The TFT-EL panel consumes less power than conventional TFT-LCD panels, especially when the usage factor of the screen is less than unity.

Abstract: A thermal detector includes a transducer layer of semiconducting yttrium barium copper oxide which is sensitive at room temperature to radiation and provides detection of infrared radiation. In a gate-insulated transistor embodiment, a layer of ferroelectric semiconducting yttrium barium copper oxide forms a gate insulator layer and increases capacitance of the transistor or latches the transistor according to the polarization direction of the ferroelectric layer.

Abstract: A photoelectric conversion element having an improved 8 characteristic is constructed of an insulation film and a photoelectric conversion film formed as islands. These films are stacked successively on a shield film formed on a transparent insulating substrate. Electrodes that connect the islands of the photoelectric conversion film together are formed at prescribed intervals and in prescribed widths so that each of the electrodes covers the upper surface of a different end portion of the photoelectric conversion film. A low resistance film is provided between the photoelectric conversion film and each of the electrodes.

Abstract: An alignment mark and pattern is disclosed for use on semiconductor substrates which are to be patterned in an electron lithography machine. The detector includes two interleaved N-well portions mounted on a P-substrate. The interleaved "fingers" of the N-well portions are spaced to provide narrow gaps which are approximately the width of a projected electron beam. When the beam is located within the gap (or gaps) the projection is in alignment.

Abstract: A product such as an x-ray sensor array includes, for each unit of cell circuitry, a capacitor with upper and lower electrodes. A conductive layer that includes highly conductive metal such as aluminum is patterned to include the upper electrode of the capacitor, the contact leads of a switching element, and the data lines of the array. The upper electrode has an exposed area due to an opening in an insulating layer over it. A conductive element, such as an ITO island, is formed over the insulating layer, contacting the exposed area of the upper electrode so that the conductive element is electrically connected to one of the contact leads of the switching element through the upper electrode. The conductive elements of adjacent units can be separated by the minimum spacing necessary to ensure isolation. Or each unit's conductive element can be offset slightly from the data and scan lines and can also be pulled back from the channel of the switching element, which can be a TFT.

Abstract: A charge coupled device, together with a method for manufacturing the device, is provided which can eliminate a conventional problem, that is, the remaining of a light-receiving film at a great step area and a consequent lowering of a sensitivity resulting from the shutting-off of a portion of incident light. In the charge coupled device, insulating areas are formed in substantially strip-like array on a silicon substrate. Respective transfer electrodes are formed on a gate insulating film on a semiconductor substrate with an insulating areas interposed. The respective phase transfer electrodes are electrically separated by the insulating area. By doing so, the respective phase transfer electrodes can be formed on the same plane without leaving a greater step. This can achieve a thinned light shielding film.

Abstract: A solid state array device includes a plurality of pixels with associated respective TFT switching transistors; a plurality of first address lines disposed in a first layer of the array device; a plurality of second conductive address lines disposed in a second layer of the array device, respective ones of said first and second address lines being disposed substantially perpendicular to one another in a matrix arrangement such that respective ones of the second address lines overlie respective ones of the first address lines at respective crossover regions; a TFT gate dielectric layer disposed in a channel region of each of the pixel TFTs and further being disposed over the first address lines; and a crossover region supplemental dielectric layer disposed in respective ones of the crossover regions between the first and second address lines, but disposed so as to not extend over the TFT channel regions.

Abstract: A photodiode built-in semiconductor device is provided that can prevent internal peripheral circuits from erroneously operating due to incident light entering slantingly, or not perpendicular to a top surface of the semiconductor chip. A semiconductor chip 20 includes a photodiode and its peripheral circuits. The region except for the photodiode is covered with a light shielding film 22 of aluminum metallization. An isolation region (P.sup.+) 23 is arranged at an outermost portion of the chip. A dummy island 24 is formed so as to surround the entire portion of the chip 20. An N.sup.+ -type low resistance region 25 is formed in the surface of the dummy island 24. The dummy photodiode is formed by applying a reverse bias potential across the PN junction defined between the isolation region 23 and the dummy island 24.

Abstract: An image sensor array has overlapping responsive zones for detecting incident radiation. The sensor array includes a plurality of collection electrodes for sensing charge and a charge distribution layer in contact with the collection electrodes. The charge distribution layer is configured to distribute charge generated from incident radiation to more than one collection electrode, effectively providing overlapping responsive zones that reduce adverse aliasing effects.

Abstract: This is a system and method of forming an electrical contact to the optical coating of an infrared detector. The method may comprise: forming thermal isolation trenches 22 in a substrate 20; depositing a trench filler 24 in the thermal isolation trenches 22; depositing a common electrode layer 31 over the thermal isolation trenches 22; depositing an optical coating 26 above the common electrode layer 31; mechanically thinning the substrate to expose the trench filler 24; etching to remove the trench filler 24 in the bias contact area; depositing a contact metal 34 on the backside of the substrate 20, wherein the contact metal 34 connects to the common electrode layer 31 at bias contact areas 34 around a periphery of the thermal isolation trenches; and etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20. Bias contact vias 23 may be formed in the bias contact areas and then filled with bias contact metal 49.

Abstract: A photo FET device having a large area backside optical energy reception surface is disclosed. The photo FET device is fabricated in the source gate and drain upward configuration using a lattice determining surrogate substrate and a mesa-forming deep etch processing sequence and then inverted onto a new permanent substrate member and the surrogate substrate member removed in order to expose the active area backside optical energy reception surface. Fabrication of the device from two possible indium-inclusive semiconductor materials and a particular gate metal alloy is also disclosed.

Abstract: A method for producing a photodiode with a simplified planar device architecture based on a single layer of HgCdTe using a mature, established growth technology for the sensing material, combined with an implanted homojunction which is at least partially activated during MOCVD CdTe passivation. The device architecture is based on a planar structure, a p-on-n homojunction for sensing the infrared radiation, and a CdTe or CdZnTe/HgCdTe heterostructure for passivation. The MOCVD CdTe passivation can be applied ex-situ, irrespective of the growth technology of the sensing material, and the homojunction is at least partially activated while applying the CdTe passivation. Thus, a major simplification in device architecture is achieved, based on a single layer in contrast to known, double layer heterostructures.

Abstract: This is a system and method of forming an electrical contact to the optical coating of an infrared detector using conductive epoxy. The method may comprise: forming thermal isolation trenches 22 and bias contact vias 23 in a substrate 20; depositing a trench filler 24 in the thermal isolation trenches 22; depositing conductive epoxy 50 into the bias contact vias 23; replanarizing; depositing a common electrode layer 31 over the thermal isolation trenches 22 and vias 23; depositing an optical coating 26 above the common electrode layer 31; mechanically polishing a backside of the substrate 20 to expose the trench filler 24 and conductive epoxy 50; depositing a contact metal 34 on the backside of the substrate 20; etching the contact metal 34 and the trench filler 24 to form pixel mesas of the contact metal 34 and the substrate 20.

Abstract: Disclosed is an image-recorder chip having a multiplicity of image cells provided with field-effect transistors disposed in the form of a two dimensional array and having a readout logic. This present invention is directed to the object of projection of high input signal dynamics onto reduced output signal dynamics, and is distinguished by the arrangement of the light-sensitive element of each image cell being connected between one electrode of a first MOS transistor and gate of a second MOS transistor, and by the other electrode of the first MOS transistor being connected to the one pole of a voltage supply source.

Abstract: A CCD structure including high resolution pixels. The gate electrodes of the CCD are separated by gaps in the order of 0.6 .mu.m which are made to look smaller than their physical size by the use of dielectric filler material in the gaps. The dielectric filler material has a relatively high dielectric constant which is relatively large for the clock frequencies utilized but may be relatively low for optical frequencies. The dielectric constant of the dielectric filler material is typically greater than 20 and is selected from materials such as tantalum oxide, zirconium oxide, barium titanate and barium strontium titanate.

Abstract: A photoelectric converter comprising a photosensor element, a typical example of the photosensor element comprising: a transistor including an n or n.sup.+ collector region an n.sup.- region disposed contiguous to the collector region, a p base region disposed contiguous to the n.sup.- region, an n.sup.+ emitter region disposed contiguous to the base region, and a first electrode connected to the emitter region; and a storage capacitor constituted by the base region, an electrically insulating region disposed contiguous to the base region, and a second electroce connected to the electrically insulating region; whereby the base region is held in a floating state. A photogenerated is stored in the base region by controlling the potential of the base region and an electric signal corresponding to the charge stored in the base region is subsequently output from the first electrode.

Abstract: A light receiving device including a semiconductor substrate of a first conductivity type; a first semiconductor layer of a second conductivity type which is formed on the semiconductor substrate of the first conductivity type; and a semiconductor layer of the first conductivity type which elongates from a surface of the first semiconductor substrate of the second conductivity type to reach a surface of the semiconductor substrate of the first conductivity type, the semiconductor layer splitting the first semiconductor layer of the second conductivity type into a plurality of semiconductor regions of the second conductivity type. The portion of the semiconductor layer of the first conductivity type which overlaps with the semiconductor substrate of the first conductivity type is formed as a semiconductor region of the first conductivity type and has a high-impurity density.

Abstract: An imaging device which includes an optical unit passing light from a subject and having an exit pupil position. An image pickup element receives the light from the subject passing through the optical unit, and produces an image signal from the received light. The image signal has corresponding color excitation values. A color compensation mechanism adjusts a ratio of the color excitation values of the image signal produced by the image pickup element by adjusting at least one of the color excitation values in correspondence with the exit pupil position of the optical unit. Further, the imaging device can include an aperture positioned between the optical unit and the image pickup element to limit the amount of light received by the image pickup element from the optical unit. The size of the aperture is adjustable.

Abstract: A semiconductor position sensitive detector has an epitaxial layer of a second conductivity type formed on a semiconductor substrate of a first conductivity type. A first diffusion layer of the first conductivity type is formed in said epitaxial layer so as to isolate a rectangular portion of this epitaxial layer from the rest. A second diffusion layer of the first conductivity type is further formed in said rectangular portion of the epitaxial layer, in order to increase the resistance value of the epitaxial layer. In addition, due to the formation of the second diffusion layer, two p-n junctions having photoelectric transfer ability are formed in this device. So, a semiconductor position sensitive detector having excellent photoelectric characteristics can be obtained.

Abstract: Disclosed is a photoelectric conversion device in which a photodiode capacitance is increased. A transparent electrode is formed between a reflecting plate and a photodiode constituting a unitary picture element of a CCD image sensor. It is so formed that light is incident from the rear surface and the loop of the standing wave of the light comes on a platinum silicide film, thereby achieving the effective absorption of the incident light. The transparent electrode is formed between the reflecting plate and the photodiode in opposition to the platinum silicide film. The capacitance between the transparent electrode and the platinum silicide film can be utilized as photodiode capacitance.

Abstract: A number of electrode sets each respectively consisting of a number of gate electrodes disposed at each of matrix-addressed charge-coupled device ("CCD") registers are separately arranged in a column direction of the registers, the gate electrodes in each of the electrode sets being separately arranged in a different direction from the column direction, and a combination of interconnections is provided among conductors for selectively applying a number of pulse voltages different in phase to the gate electrodes in each of the electrode sets. The pulse voltages are applied with a combination of different phases to the gate electrodes in each of the electrode sets, and the combination of the different phases are changed, thereby controlling the position of a sensitivity barycenter of each of the electrode sets to raise the resolution of an image sensor.

Abstract: Semiconductor radial rays detector is provided that improves a breakdown voltage yield of a gate insulating film of a semiconductor radial rays detector and prevents an increase in resistance of a gate electrode caused by the improvement in the breakdown voltage yield. In the inventive semiconductor radial rays detector, material used as a gate electrode 1 of a reading condenser is not an Al film (aluminum film) but a POLY Si film (a polycrystalline silicon film), or silicide or metal including silicide with a high melting point such as WSi (tungsten silicide) (strictly its composition is indefinite as expressed as W.sub.x Si.sub.y) or TiSi (titan silicide) (expressed as Ti.sub.x Si, in the same manner). Further, a contact hole 2 is provided on the gate electrode 1 through an inter-insulating film 4 as the inter-insulating film for wiring, and an Al electrode 3 coupled to an output terminal is provided over the contact hole.

Abstract: A low noise fluoroscopic radiation imager includes a large area photosensor array having a plurality of photosensors arranged in a pattern so as to have a predetermined pitch, and a low noise addressable thin film transistor (TFT) array electrically coupled to the photosensors. The TFT array includes a plurality of low charge retention TFTs, each of which have a switched silicon region that has an area in microns not greater than the value of the pitch of the imager array expressed in microns. The portion of the switched silicon region underlying the source and drain electrodes of the TFT is not greater than about 150% of the portion of the switched silicon region in the channel area of the TFT. The ratio of the TFT channel width to channel length (the distance between the source and drain electrodes across the channel) is less than 20:1, and commonly less than 10:1, with the channel length in the range of between about 1 .mu.m and 4 .mu.m.

Abstract: Sensor elements which are capable of sensing illumination edges with subpixel accuracy are described. The sensor elements include a plurality of conductive storage nodes and a plurality of collection electrodes which are in a low resistance, touching relationship with a first semiconductive material layer. A second semiconductive material layer is placed over the first such that the first and second semiconductive material layers and the storage nodes form light sensors. Near the first semiconductive layer is a gate electrode. When a first voltage is applied to the gate electrode the resistance of the first semiconductive material layer between the storage nodes and the conductive collection electrodes is high. Illumination which strikes the sensor element creates electron hole pairs which induce charges on the storage nodes.

Abstract: The invention relates to an infrared radiation absorption device, which can be unrestrictedly produced from CMOS technology methods and materials. The absorber structure according to the invention comprises a lower layer (1) with a low transmission coefficient, a central layer (2) with a high absorption coefficient and an upper, absorbing component (3) with a low reflection coefficient for the radiation to be absorbed and which is applied from above. The upper component can e.g. comprise depressions in the central layer, whose walls are coated with metal. The absorber structure is used in the inexpensive manufacture of integrated, thermal infrared detectors.

Abstract: A solid-state image sensing apparatus comprises a charge coupled device, a plurality of photosensors, and a voltage generator. Each of the photosensors receives incident light, generates a voltage logarithmically proportional to an intensity of the incident light, and is connected to a first electrode of the charge coupled device. The voltage generator generates a reference voltage logarithmically proportional to an average intensity of the incident light on the photosensors and is connected to a second electrode of the charge coupled device. Signal charges are injected into the charge coupled device, depending on the voltage impressed on the first and second electrodes, so that a direct current component of an output of the charge coupled device is controlled.

Abstract: A thermal isolation structure (10) is disposed between a focal plane array and an integrated circuit substrate (12). The thermal isolation structure (10) includes a mesa-type formation (16) and a mesa strip conductor (18, 26) extending from the top of the mesa-type formation (16) to an associated contact pad (14) on the integrated circuit substrate (12). After formation of the mesa-type formation (16) and the mesa strip conductor (18, 26), an anisotropic etch using the mesa strip conductor (18, 26) as an etch mask removes excess mesa material to form trimmed mesa-type formation (24) for improved thermal isolation. Bump bonding material (20) may be deposited on mesa strip conductor (18, 26) and can also be used as an etch mask during the anisotropic etch. Thermal isolation structure (100) can include mesa-type formations (102), each with a centrally located via (110) extending vertically to an associated contact pad (104) of integrated circuit substrate (106).

Abstract: photosensor device (41) having tapered photodiodes (53, 55) that are interdigitated and which is compatible with typical ASIC, CMOS and BiCMOS processes. A left side photodiode array of tapered regions (53) of a first conductivity type is disposed into an epitaxial layer of a second conductivity type. This array of photodiodes is coupled together and further coupled to a first output terminal (43). A fight side photodiode array of tapered regions (55) of said first conductivity type is disposed into the epitaxial layer of the second conductivity type, spaced apart from the left side photodiode by a minimum distance. A second output terminal is coupled to the array of fight side photodiodes (51). An incident light spot (39) is focused onto the sensor. The amount of current generated at the first and second output terminals (43, 51) will be proportional to the area of the left photodiode array and the area of the fight photodiode array which is receiving light.

Abstract: Disclosed is a photoelectric conversion device in which a photodiode capacitance is increased. A transparent electrode is formed between a reflecting plate and a photodiode constituting a unitary picture element of a CCD image sensor. It is so formed that light is incident from the rear surface and the loop of the standing wave of the light comes on a platinum silicide film, thereby achieving the effective absorption of the incident light. The transparent electrode is formed between the reflecting plate and the photodiode in opposition to the platinum silicide film. The capacitance between the transparent electrode and the platinum silicide film can be utilized as photodiode capacitance.

Abstract: A photoelectric converter is adapted for an accumulation operation, readout operation and refresh operation. The photoelectric converter includes a transistor including a control electrode region having a semiconductor of a first conductivity type, a first main electrode region comprising a semiconductor of a second conductivity type different from the first conductivity type and disposed electrically connectable to an output circuit including a capacitive load, and a second main electrode region of the second conductivity type, the control electrode region being adapted for accumulating carriers in response to light energy received. Refresh is provided for extinguishing the accumulated carriers while holding the first main electrode region at a reference potential during the refresh operation after the readout operation for reading out a signal based on the accumulated carriers.

Abstract: A capacitor coupled contactless imager structure and a method of manufacturing the structure results is a phototransistor that structure includes an N-type collector region formed in P-type semiconductor material. A P-type base region is formed in the collector region. An n-doped polysilicon emitter contact is formed in contact with the surface to the P-type base region such that an n+ epitaxial region is formed in the base region as the emitter of the phototransistor. Silicon dioxide separates the poly1 emitter contact and exposed surfaces at the base region from a layer of poly2 about 3000-4000 .ANG. thick that partially covers the base region; the gates of the CMOS peripheral devices are also poly2. The poly2 over the base region serves as a base coupling capacitor and a row conductor for the imager structure. The thickness of the poly2 capacitor plate allows it to be doped utilizing conventional techniques and silicided to improve the RC constant.

Abstract: An imager array data line repair structure for use in high performance imager arrays includes a first and a second plurality of address lines that are disposed in respective layers with an intermediate layer having at least one insulative material disposed therebetween. The imager device further includes at least one integral address line repair segment that is disposed in the same layer as the first address lines and that is electrically isolated from the first address lines; the integral address line repair segment is disposed so as to underlie a repair portion of the second address line, with the intermediate layer disposed therebetween, and has a width substantially the same as the overlying second address line.

Abstract: A light-emitting device formed by applying a crystal formation process to a substrate with a free surface on which provided, in mutually adjacent manner, are a non-nucleation surface and a nucleation surface with a nucleation density larger than that of the non-nucleation surface, wherein the nucleation surface is provided in an oblong form.

Abstract: An assembly facilitates mounting a set of abutted semiconductor chips, such as chips aligned to form a single full-page-width linear array of photosensors in a digital scanner or copier. An elongated bead of electrically conductive adhesive extends along a surface of a support substrate. A plurality of semiconductor chips is disposed along the elongated bead, each semiconductor chip including a linear array of photosensors on a front surface thereof, and a back surface attached to the support substrate by the electrically conductive adhesive. A connection block is disposed along another portion of the elongated bead, the block including a first surface contacting the bead, a second surface, and a conductor extending from the first surface to the second surface.

Abstract: An improved Metal Semiconductor Metal (MSM) photodiode device and a fabrication process for realizing this device. The improved photodiode device employs frontside electrodes and backside illumination to avoid active area shadowing in the device. This configuration is achieved through a device fabrication sequence which involves substrate removal--and replacement at the device's opposed frontside surface using such media as an epoxy adhesive. The disclosed device uses gallium arsenide semiconductor materials that are lattice determined by an indium phosphide sacrificial initial substrate, in order to select a desired input energy spectral range.

Abstract: Thermal isolation mesas 36 comprising a porous material 64 are used to thermally insulate sensing integrated circuitry 44 from pixels 34 of an uncooled IR detector hybrid system 30. The porous material 64 is preferably a silicon-dioxide xerogel. The mesas 36 may also comprise a protective film 66.

Abstract: A thin-film semiconductor pinhole component with monolithically integrated position-sensing photodetectors is herein referred to as a Position Sensitive Pinhole (PSP). Another embodiment is also discussed where a PSP is integrated onto a platform with controllable motion and is herein referred to as a Movable Position Sensitive Pinhole (MPSP). A third embodiment describes the MPSP with capacitive, electrostatic actuation incorporated into the device to achieve controlled motion, herein referred to as a Capacitively Actuated Movable Position Sensitive Pinhole (CAMPSP). Each of those embodiments of the present invention are discussed, as are their method of manufacture and use in a laser environment as a spatial filter.

Abstract: An image sensor is reduced in size by combining a photoelectric conversion element with a transfer element thin film transistor (TFT). The photoelectric conversion element comprises a lamination including a metal electrode, a photoconductive layer and a transparent electrode. The TFT transfer element comprises a gate electrode, a drain electrode and a source electrode. In the image sensor, the metal electrode of the photoelectric conversion element also serves as the drain electrode of the TFT. In addition, the gate electrode is formed around the photoelectric conversion element, and the source electrode is formed around the gate electrode.

Abstract: A photodiode array is provided which includes a cell comprised of at least a substrate, an insulating film formed on the substrate, a semiconductor layer containing an impurity of first conductivity type and provided on the insulating film, an impurity-diffusion layer of second conductivity type formed in the semiconductor layer and reaching the insulating film, and at least one impurity-diffusion layer of the first conductivity type formed within the impurity-diffusion layer of the second conductivity type and reaching the insulating film, wherein pn junctions are defined between the layers of opposite conductivity types and arranged laterally, and of the pn junctions, any pn junction of a predetermined order are connected to each other in series. By virtue of this arrangement, the area of pn junctions per unit area of a substrate is increased thereby contributing to a reduction in chip size and in production cost.

Abstract: An N-InP buffer layer is deposited on an N.sup.+ -InP substrate, an InGaAs light-absorbing layer is deposited on the buffer layer, an N.sup.- -InP cap layer is deposited on the light-absorbing layer, and a P-type impurity region is formed in the light-absorbing layer and the cap layer. Next, a masking film is formed on the cap layer, and with this masking film serving as a mask, the cap layer, the light-absorbing layer, the buffer layer are etched, thus forming a P-type electrode forming region and an N-type electrode forming region. Next, an insulating film is provided for the periphery portion of the P-type impurity region of the cap layer. Electrode pads having a laminated structure is formed respectively on the P-type and N-type electrode forming regions, and a non-metal member is formed on the insulating film and on the surface, the periphery and the side surface of the electrode pad of the P-type electrode.

Abstract: Metal wires for applying the clock voltage in a CCD solid state image sensor are angled with respect to the photodiodes that are arranged in a matrix. Also, a photo-blocking layer is formed over the metal wires. Accordingly, light incident on portions of the sensor other than the photodiodes is effectively prevented and noise caused due to coupling with the semiconductor substrate is minimized, thereby improving the picture quality of the solid state image sensor. Furthermore, since the metal wires directly apply the clock voltage to the CCD gates, there is no need for a polysilicon gate conductor. Thus, clock skew is prevented and phase differences between the signal image from the central part and the peripheral part of the solid stage image sensor is greatly reduced.

Abstract: A miniaturized electronic imaging chip has stratified layers wherein a base silicon layer has a peripheral edge defining an area and a thickness which allows passage therethrough of most UV, visible and IR light. A pixel layer is formed on the back side of this first silicon layer. At least one interconnect layer is bonded to the pixel layer. Electric leads are bump bonded to the bonding pads on the outermost interconnect layer and extend away from it within the area for attachment to means for sensing electrical signals generated by an image projected onto the pixel layer through the silicon layer. Preferably, the leads are perpendicular to the chip.

Abstract: A solid state image sensor including (a) a plurality of photodiodes arranged such that the photodiodes in odd number columns and the photodiodes in even number columns straddle each other, for generating image signal charges by converting light signals into electrical signals, (b) vertical charge coupled devices each formed between the photodiode columns for vertically transmitting the image signal charges generated in each of the photodiodes, and (c) a plurality of microlenses each arranged matched with each of the plurality of photodiodes over each of the photodiodes. Each of the photodiodes is shaped like a peanut shell having a narrower middle part. The photodiodes shape is thereby matched to the focusing shape of each matching microlens, optimizing the cell layout efficiency.