Responsive To Nonelectrical External Signals (e.g., Light) Patents (Class 257/53)
  • Publication number: 20130099236
    Abstract: The invention relates to a process for producing an oxygen-containing surface or interface of a silicon layer, which is arranged on a substrate, especially in the production of photovoltaic units.
    Type: Application
    Filed: June 20, 2011
    Publication date: April 25, 2013
    Applicant: Evonik Degussa GmbH
    Inventors: Bernhard Stuetzel, Wolfgang Fahrner
  • Publication number: 20130092941
    Abstract: An image sensor array includes image sensors having photo TFTs to generate photocurrent in response to received images. The photo TFTs each have their respective gate electrodes and source electrodes independently biased to reduce the effects of dark current. Storage capacitors are coupled to each photo TFT and discharged upon generation of a photocurrent. Each storage capacitor is coupled to a readout TFT that passes a current from the storage capacitor to a data line. The photo TFT may be disposed above the storage capacitor to increase the exposed surface area of the photo TFT.
    Type: Application
    Filed: October 15, 2012
    Publication date: April 18, 2013
    Applicant: APPLE INC.
    Inventor: Apple Inc.
  • Patent number: 8421074
    Abstract: A Semiconductor device including, on at least one surface of a layer made of a crystalline semiconductor material of a certain type of conductivity, a layer made of an amorphous semiconductor material, doped with a type of conductivity opposite to the type of conductivity of the crystalline semiconductor material layer, characterized in that the concentration of the doping elements in the amorphous semiconductor layer varies gradually.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: April 16, 2013
    Assignees: Centre National de la Recherche Scientifique (CNRS), Ecole Polytechnique
    Inventors: Pere Roca I. Cabarrocas, Jerome Damon-Lacoste
  • Publication number: 20130087789
    Abstract: A photoelectric conversion device with improved electric characteristics is provided. The photoelectric conversion device has a structure in which a window layer is formed by a stack of a first silicon semiconductor layer and a second silicon semiconductor layer, and the second silicon semiconductor layer has high carrier concentration than the first silicon semiconductor layer and has an opening. Light irradiation is performed on the first silicon semiconductor layer through the opening without passing through the second silicon semiconductor layer; thus, light absorption loss in the window layer can be reduced.
    Type: Application
    Filed: September 27, 2012
    Publication date: April 11, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
  • Patent number: 8415664
    Abstract: Techniques are provided for obtaining a photoelectric conversion device having a favorable spectral sensitivity characteristic and reduced variation in output current without a contamination substance mixed into a photoelectric conversion layer or a transistor, and for obtaining a highly reliable semiconductor device including a photoelectric conversion device. A semiconductor device may include, over an insulating surface, a first electrode; a second electrode; a color filter between the first electrode and the second electrode; an overcoat layer covering the color filter; and a photoelectric conversion layer over the overcoat layer, where one end portion of the photoelectric conversion layer is in contact with the first electrode, and where an end portion of the color filter lies inside the other end portion of the photoelectric conversion layer.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: April 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara, Hironobu Takahashi
  • Patent number: 8410486
    Abstract: A method for manufacturing a semiconductor device having favorable electric characteristics with high productivity is provided. A first microcrystalline semiconductor film is formed over an oxide insulating film under a first condition that mixed phase grains with high crystallinity are formed at a low particle density. After that, a second microcrystalline semiconductor film is stacked over the first microcrystalline semiconductor film under a second condition that a space between the mixed phase grains are filled by the crystal growth of the mixed phase grains of the first microcrystalline semiconductor film.
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: April 2, 2013
    Assignee: Semiconductor Energy Labortory Co., Ltd.
    Inventors: Sachiaki Tezuka, Yasuhiro Jinbo, Toshinari Sasaki, Hidekazu Miyairi
  • Patent number: 8410354
    Abstract: Higher conversion efficiency and productivity of photoelectric conversion devices. A semiconductor layer including a first and second crystal regions grown in the layer-deposition direction is provided between an impurity semiconductor layer containing an impurity element imparting one conductivity type and an impurity semiconductor layer containing an impurity element imparting a conductivity type opposite to the one conductivity type. The first crystal region is grown from the interface between one of the impurity semiconductor layers and the semiconductor layer. The second crystal region is grown toward the interface between the semiconductor layer and the other of the impurity semiconductor layers from a position which is away from the interface between the one of the impurity semiconductor layers and the semiconductor layer. The semiconductor layer including the first and second crystal regions which exist in an amorphous structure forms the main part of a region for photoelectric conversion.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: April 2, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8405178
    Abstract: In a solid-state image sensor device, the efficiency of light collection to a light-receiving region of a photodiode PD through a microlens is enhanced by arranging a wiring line configuration. Each of the first metal layer and the second metal layer is arranged to have a ring-like portion formed along a profile of the light-receiving region of the photodiode PD in a fashion that an upper position over the photodiode PD is surrounded by the first and second metal layers and a third metal layer.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: March 26, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Sugino, Satoshi Sakai, Yusuke Nonaka, Tomohiro Saito, Tomoyasu Furukawa, Hiroyuki Hayashi
  • Publication number: 20130056733
    Abstract: A sensor includes a substrate, a membrane, first and second spacers arranged on the substrate, a first support structure which is supported, laterally next to the membrane, by the first spacer and contacts a first electrode of a first main side of the membrane which faces the substrate, and a second support structure which is supported, laterally next to the membrane, by the second spacer and contacts a second electrode on a second main side of the membrane which is opposite the first main side, so that the membrane is suspended via the first and second spacers and is electrically connected to contact areas of the substrate.
    Type: Application
    Filed: August 24, 2012
    Publication date: March 7, 2013
    Inventors: Holger Vogt, Dirk Weiler, Piotr Kropelnicki
  • Publication number: 20130056732
    Abstract: A display device includes: a substrate; an infrared sensing transistor on the substrate; a readout transistor connected to the infrared sensing transistor; a power source line; and a light blocking member on the infrared sensing transistor, where the infrared sensing transistor includes a light blocking film on the substrate, a first gate electrode contacting and overlapping the light blocking film and connected to a power source line, a first semiconductor layer on the first gate electrode overlapping the light blocking film, and first source and drain electrodes on the first semiconductor layer, where the readout transistor includes a second gate electrode on the substrate, a second semiconductor layer on the second gate electrode and overlapping the second gate electrode, and second source and drain electrodes the second semiconductor layer, and where the power source line and the first gate electrode are at a same layer.
    Type: Application
    Filed: February 6, 2012
    Publication date: March 7, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Suk Won JUNG, Sung Hoon YANG, Sang-Youn HAN, Seung Mi SEO, Mi-Seon SEO
  • Patent number: 8390083
    Abstract: Backside recesses in a base member host components, such as sensors or circuits, to allow closer proximity and efficient use of the surface space and internal volume of the base member. Recesses may include covers, caps, filters and lenses, and may be in communication with circuits on the frontside of the base member, or with circuits on an active backside cap. An array of recessed components may a form complete, compact sensor system.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: March 5, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Alan J. O'Donnell, Michael J. Cusack, Rigan F. McGeehan, Garrett A. Griffin
  • Patent number: 8390004
    Abstract: A light-emitting structure includes a p-doped region for injecting holes and an n-doped region for injecting electrons. At least one InGaN quantum well of a first type and at least one InGaN quantum well of a second type are arranged between the n-doped region and the p-doped region. The InGaN quantum well of the second type has a higher indium content than the InGaN quantum well of the first type.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: March 5, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Adrian Stefan Avramescu, Hans-Juergen Lugauer, Matthias Peter, Stephan Miller
  • Publication number: 20130048989
    Abstract: A touch substrate includes a base substrate, a sensing element and a switching element. The sensing element is disposed over the base substrate, senses infrared light, and includes a sensing semiconductor pattern. The switching element is electrically connected to the sensing element, includes a material substantially the same as a material of the sensing semiconductor pattern, and includes a switching semiconductor pattern having a thickness different from a thickness of the sensing semiconductor pattern.
    Type: Application
    Filed: March 9, 2012
    Publication date: February 28, 2013
    Inventors: Sang-Youn HAN, Mi-Seon SEO, Sung-Hoon YANG
  • Publication number: 20130043471
    Abstract: Reading margin is improved in a MTJ designed for MRAM applications by employing a pinned layer with an AP2/Ru/AP1 configuration wherein the AP1 layer is a CoFeB/CoFe composite and by forming a MgO tunnel barrier adjacent to the CoFe AP1 layer by a sequence that involves depositing and oxidizing a first Mg layer with a radical oxidation (ROX) process, depositing and oxidizing a second Mg layer with a ROX method, and depositing a third Mg layer on the oxidized second Mg layer. The third Mg layer becomes oxidized during a subsequent anneal. MTJ performance may be further improved by selecting a composite free layer having a Fe/NiFeHf or CoFe/Fe/NiFeHf configuration where the NiFeHf layer adjoins a capping layer in a bottom spin valve configuration. As a result, read margin is optimized simultaneously with improved MR ratio, a reduction in bit line switching current, and a lower number of shorted bits.
    Type: Application
    Filed: August 15, 2011
    Publication date: February 21, 2013
    Inventors: Wei Cao, Witold Kula, Chyu-Jiuh Torng
  • Publication number: 20130020573
    Abstract: A pressure detecting device includes a glass substrate as a substrate, a lower electrode arranged on the glass substrate, an upper electrode spaced apart from the lower electrode and facing the lower electrode, the upper electrode having holes as one or more through-openings, and a source line as a change extracting wiring for detecting a change in electrical state caused by the upper electrode receiving pressure to deflect toward the lower electrode.
    Type: Application
    Filed: March 16, 2010
    Publication date: January 24, 2013
    Inventors: Keiichi Fukuyama, Tomohiro Kimura, Tokuaki Kuniyoshi
  • Publication number: 20130001556
    Abstract: A thin film transistor and a press sensing device using the thin film transistor are disclosed. The thin film transistor, comprises a source electrode; a drain electrode spaced from the source electrode; a semiconductor layer electrically connected with the source electrode and the drain electrode, a channel defined in the semiconductor layer and located between the source electrode and the drain electrode; and a gate electrode electrically insulated from the semiconductor layer; and an insulative layer configured for insulating the source electrode, the drain electrode, and the semiconductor layer from each other, wherein the insulative layer is made of a polymeric material with an elastic modulus ranged from about 0.1 megapascal (MPa) to about 10 MPa.
    Type: Application
    Filed: December 13, 2011
    Publication date: January 3, 2013
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITY
    Inventors: CHUN-HUA HU, CHANG-HONG LIU, SHOU-SHAN FAN
  • Patent number: 8338221
    Abstract: A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiH2 bonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range betwe
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: December 25, 2012
    Assignee: Jusung Engineering Co., Ltd.
    Inventors: Chang Ho Lee, Hyung Dong Kang, Hyun Ho Lee, Yong Hyun Lee, Seon Myung Kim
  • Patent number: 8339492
    Abstract: An image sensor and a method for manufacturing the same are provided. An image sensor comprises a readout circuitry, an interlayer dielectric, an interconnection, an image sensing device, and a contact. The readout circuitry is formed at a first substrate. The interlayer dielectric is formed on the first substrate. The interconnection is formed in the interlayer dielectric. The interconnection is electrically connected to the readout circuitry. The image sensing device is formed on the interconnection. The image sensing device comprises a first conductive type layer and a second conductive type layer. The contact connects the first conductive type layer of the image sensing device and the interconnection electrically. The contact is isolated from the second conductive type layer by a trench formed in the second conductive layer around the contact.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: December 25, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Publication number: 20120319111
    Abstract: A thin-film photoelectric conversion device includes a crystalline germanium photoelectric conversion layer having improved open circuit voltage, fill factor, and photoelectric conversion efficiency for light having a longer wavelength. The photoelectric conversion device comprises a first electrode layer, one or more photoelectric conversion units, and a second electrode layer sequentially stacked on a substrate, wherein each of the photoelectric conversion units comprises a photoelectric conversion layer arranged between a p-type semiconductor layer and an n-type semiconductor layer. At least one of the photoelectric conversion units includes a crystalline germanium photoelectric conversion layer comprising a crystalline germanium semiconductor that is substantially intrinsic or weak n-type and is essentially free of silicon.
    Type: Application
    Filed: January 27, 2011
    Publication date: December 20, 2012
    Applicant: KANEKA CORPORATION
    Inventors: Naoki Kadota, Toshiaki Sasaki
  • Patent number: 8330161
    Abstract: Disclosed is an electrophotographic photoreceptor which comprises a base material and a photoconductive layer. The photoconductive layer is formed on the base material, and comprises a non-single-crystal material mainly composed of silicon. In the photoconductive layer, with regard to a characteristic energy E (eV) which has the relationship with a light absorption coefficient ?(cm?1) represented by the following formula (1), the characteristic energy E1 (eV) for an exposure wavelength in larger than the characteristic energy E2 (eV) for a neutralization wavelength. [Formula (1) a=C exp(h?/E) C: a constant h?: a photon energy h: a rationalized Planck's ?: the number of frequency.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: December 11, 2012
    Assignee: Kyocera Corporation
    Inventor: Yoshinobu Ishii
  • Patent number: 8330036
    Abstract: A method of fabricating a multi-junction solar cell on a separable substrate, and structure formed thereby are provided. The method comprises establishing a substrate having a semiconductive composition and forming a sacrificial layer upon the substrate. A solar cell portion is formed upon the sacrificial layer, such that the solar cell portion includes a plurality of multi junction layers. A stabilizing cell layer of semiconductor material is then formed on the solar cell portion, with the stabilizing cell layer having a predetermined thickness greater than a thickness of any individual one of the III-V multi junction layers. Etching is thereafter carried out to remove the sacrificial layer for releasing the solar cell portion from the substrate.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: December 11, 2012
    Inventor: Seoijin Park
  • Publication number: 20120292619
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Application
    Filed: May 23, 2012
    Publication date: November 22, 2012
    Inventor: Leonard Forbes
  • Patent number: 8309843
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: November 13, 2012
    Assignee: Banpil Photonics, Inc.
    Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
  • Publication number: 20120280232
    Abstract: A photoelectric conversion device includes a first photoelectric conversion unit on a substrate and having a first energy bandgap, a second photoelectric conversion unit having a second energy bandgap that is different from the first energy bandgap, the second photoelectric conversion unit being on the first photoelectric conversion unit, and an intermediate unit between the first and second photoelectric conversion units, the intermediate unit including a stack of a first intermediate layer and a second intermediate layer, each of the first intermediate layer and the second intermediate layer having a refractive index that is smaller than that of the first photoelectric conversion unit, the first intermediate layer having a first refractive index, and the second intermediate layer having a second refractive index that is smaller than the first refractive index.
    Type: Application
    Filed: March 5, 2012
    Publication date: November 8, 2012
    Inventors: Seung-Jae JUNG, Yuk-Hyun NAM, Ki-Won Jeon
  • Publication number: 20120273785
    Abstract: A photosensor element (6a) is provided with a gate electrode (11da) disposed on an insulating substrate (10), a gate insulating film (12) disposed so as to cover the gate electrode (11da), a semiconductor layer (15db) disposed on the gate insulating film (12) so as to overlap the gate electrode (11da), and a source electrode (16da) and a drain electrode (16db) provided on the semiconductor layer (15db) so as to overlap the gate electrode (11da) and so as to face each other. The photosensor element (6a) has the semiconductor layer (15db) provided with an intrinsic semiconductor layer (13db) in which a channel region (C) is defined and an extrinsic semiconductor layer (14db) that is laminated on the intrinsic semiconductor layer (13db) such that the channel region (C) is exposed. The extrinsic semiconductor layer (14db) protrudes from the drain electrode (16db) on the side close to the channel region (C).
    Type: Application
    Filed: November 11, 2010
    Publication date: November 1, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masao Moriguchi, Yohsuke Kanzaki, Tsuyoshi Inoue
  • Patent number: 8299465
    Abstract: An X-ray detector constructed as an exemplary embodiment of the present invention includes a semiconductor layer, a data line including a source electrode covering a first portion of the semiconductor layer, a drain electrode disposed opposite to the source electrode, a first lower electrode formed on the upper portion of a second portion of the semiconductor layer and a gate insulating layer and elongated from the drain electrode, and a passivation layer formed on the upper portion of one part of the lower electrode including the drain electrode. Further, the second lower electrode is formed approaching the gate electrode. The X-ray detector constructed as the exemplary embodiment of the present invention includes a second lower electrode formed on the passivation layer and placed approaching a gate electrode. The area in which a diode is disposed may be maximized, and the amount of leakage current may be reduced.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: October 30, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kwan-Wook Jung, Dong-Hyuk Kim
  • Patent number: 8297837
    Abstract: This invention generally relates to sensors made of granular thin films in the discontinuous phase. More particularly, the invention relates to microbolometers and displacement sensors fabricated from thin films that are close to the metal insulator transition (MIT) or metal semiconductor transition (MST) regime. Sensors of various designs have been fabricated according to the invention and may be used for deflection measurements, nano-indentation, visco-elastic measurements, topographical scanning, explosive detection, low abundance biomolecular detection, electromagnetic radiation detection and other similar detection and measurement systems.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: October 30, 2012
    Inventor: Angelo Gaitas
  • Patent number: 8288648
    Abstract: A solar cell comprises a substrate configured to have a plurality of via holes and a first conductive type, an emitter layer placed in the substrate and configured to have a second conductive type opposite to the first conductive type, a plurality of first electrodes electrically coupled to the emitter layer, a plurality of current collectors electrically coupled to the first electrodes through the plurality of via holes, and a plurality of second electrodes electrically coupled to the substrate. The plurality of via holes comprises at least two via holes having different angles.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: October 16, 2012
    Assignee: LG Electronics Inc.
    Inventors: Daehee Jang, Jihoon Ko, Juwan Kang, Jonghwan Kim
  • Patent number: 8283746
    Abstract: A solid state imaging device having a back-illuminated type structure in which a lens is formed on the back side of a silicon layer with a light-receiving sensor portion being formed thereon. Insulating layers are buried into the silicon layer around an image pickup region, with the insulating layer being buried around a contact layer that connects an electrode layer of a pad portion and an interconnection layer of the surface side. A method of manufacturing such a solid-state imaging device is also provided.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: October 9, 2012
    Assignee: Sony Corporation
    Inventors: Yuichi Yamamoto, Hayato Iwamoto
  • Publication number: 20120241717
    Abstract: A photosensitive optoelectronic device (1) comprises a plurality of organic semiconductor sub-cells (10, 11, 12, 13) arranged in a stack between electrodes (3, 5), each sub-cell comprising donor material (14, 16, 23, 25) and acceptor material (15, 17, 24, 26) providing a heterojunction. There is a recombination layer (19, 22, 28) between adjacent sub-cells. The sub-cells are arranged in two groups (20, 29). The sub-cells (10, 11; 12, 13) within a group (20; 29) are responsive over substantially the same part of the light spectrum. The groups (20, 29) differ substantially from each other in respect of the parts of the light spectrum over which their respective sub-cells are responsive.
    Type: Application
    Filed: September 3, 2010
    Publication date: September 27, 2012
    Applicant: UNIVERSITY OF WARWICK
    Inventors: Timothy Jones, Ross Hatton
  • Patent number: 8263853
    Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: September 11, 2012
    Assignee: Emcore Solar Power, Inc.
    Inventor: Tansen Varghese
  • Publication number: 20120211749
    Abstract: To improve the performance of a protection circuit including a diode formed using a semiconductor film. A protection circuit is inserted between two input/output terminals. The protection circuit includes a diode which is formed over an insulating surface and is formed using a semiconductor film. Contact holes for connecting an n-type impurity region and a p-type impurity region of the diode to a first conductive film in the protection circuit are distributed over the entire impurity regions. Further, contact holes for connecting the first conductive film and a second conductive film in the protection circuit are dispersively formed over the semiconductor film. By forming the contact holes in this manner, wiring resistance between the diode and a terminal can be reduced and the entire semiconductor film of the diode can be effectively serve as a rectifier element.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Osamu FUKUOKA, Masahiko HAYAKAWA, Hideaki SHISHIDO
  • Publication number: 20120205646
    Abstract: A display with a photo sensor is provided, wherein the photo sensor is integrated with an active device array substrate of the display and fabricated through an existing process to reduce the manufacturing cost. A photosensitive silicon-rich dielectric layer or any other photosensitive material layer having similar photosensitive characteristics (for example, a photosensitive semiconductor layer) is adopted to form the photo sensor with a lower electrode and a transparent upper electrode. Thereby, the fill factor of the photo sensor is maximized and noises caused by a backlight source electrode are eliminated.
    Type: Application
    Filed: July 7, 2011
    Publication date: August 16, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: An-Thung Cho, Wei-Ting Lin, Jiun-Jye Chang, Tien-Hao Chang, Po-Lun Chen, Wei-Lung Liao
  • Publication number: 20120205649
    Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.
    Type: Application
    Filed: February 7, 2012
    Publication date: August 16, 2012
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Yasunori HATTORI, Tomotaka MATSUMOTO, Tsukasa EGUCHI
  • Publication number: 20120205655
    Abstract: It is advantageous to create texture at the surface of a photovoltaic cell to reduce reflection and increase travel length of light within the cell. A method is disclosed to create texture at the surface of a silicon body by reacting a silicide-forming metal at the surface, where the silicide-silicon interface is non-planar, then stripping the silicide, leaving behind a textured surface. Depending on the metal and the conditions of silicide formation, the resulting surface may be faceted. The peak-to-valley height of this texturing will generally be between about 300 and about 5000 angstroms, which is well-suited for use in photovoltaic cells comprising a thin silicon lamina.
    Type: Application
    Filed: April 13, 2012
    Publication date: August 16, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventor: S. Brad Herner
  • Patent number: 8242498
    Abstract: A compound semiconductor substrate 10 according to the present invention is comprised of a Group III nitride and has a surface layer 12 containing a chloride of not less than 200×1010 atoms/cm2 and not more than 12000×1010 atoms/cm2 in terms of Cl and an oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, at a surface. The inventors conducted elaborate research and newly discovered that when the surface layer 12 at the surface of the compound semiconductor substrate 10 contained the chloride of not less than 200×1010 atoms/cm2 and not more than 12000×1010 atoms/cm2 in terms of Cl and the oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, Si was reduced at an interface between the compound semiconductor substrate 10 and an epitaxial layer 14 formed thereon and, as a result, the electric resistance at the interface was reduced.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: August 14, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Fumitake Nakanishi
  • Publication number: 20120199833
    Abstract: A radiation detector of this invention has a barrier layer on the upper surface of a high resistance film along the outer edge of a common electrode, which enables prevention of a chemical reaction between an amorphous semiconductor layer and a curable synthetic resin. The barrier layer is adhesive to the curable synthetic resin film, and this can prevent strength being insufficient, such that temperature changes cause separation in interfaces between the barrier layer and curable synthetic resin film, thereby reducing the effect of inhibiting warpage and cracking. The material for the barrier layer is an insulating material not including a substance that would chemically react with the amorphous semiconductor layer. This can prevent components of the material for the barrier layer from chemically reacting with the semiconductor layer. Consequently, creeping discharge at the outer edge of the common electrode where electric fields concentrate can be prevented.
    Type: Application
    Filed: October 5, 2009
    Publication date: August 9, 2012
    Inventors: Kenji Sato, Hisao Tsuji, Osamu Sasaki, Daisuke Murakami, Yoichi Yamaguchi, Takeshi Yamamoto, Hidetoshi Kishimoto
  • Patent number: 8237161
    Abstract: Amorphous semiconductor films with enhanced charged carrier transport are disclosed. Also disclosed is a method for fabricating and treating the film to produce the enhanced transport. Also disclosed are semiconductor p-n junctions fabricated with the films which demonstrate the enhanced transport. The films are amorphous and include boron, carbon, and hydrogen.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: August 7, 2012
    Assignee: North Dakota State University Research Foundation
    Inventors: Anthony N. Caruso, Joseph A. Sandstrom, David A. Bunzow
  • Patent number: 8236603
    Abstract: A semiconductor structure may include a polycrystalline substrate comprising a metal, the polycrystalline substrate having substantially randomly oriented grains, as well as a buffer layer disposed thereover. The buffer layer may comprise a plurality of islands having an average island spacing therebetween. A polycrystalline semiconductor layer is disposed over the buffer layer.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: August 7, 2012
    Assignees: Solexant Corp., Rochester Institute of Technology
    Inventors: Leslie G. Fritzemeier, Ryne P. Raffaelle, Christopher Leitz
  • Publication number: 20120181537
    Abstract: A MTJ in an MRAM array is disclosed with a composite free layer having a lower crystalline layer contacting a tunnel barrier and an upper amorphous NiFeX layer for improved bit switching performance. The crystalline layer is Fe, Ni, or FeB with a thickness of at least 6 Angstroms which affords a high magnetoresistive ratio. The X element in the NiFeX layer is Mg, Hf, Zr, Nb, or Ta with a content of 5 to 30 atomic %. NiFeX thickness is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. In an alternative embodiment, the crystalline layer may be a Fe/NiFe bilayer. Optionally, the amorphous layer may have a NiFeM1/NiFeM2 configuration where M1 and M2 are Mg, Hf, Zr, Nb, or Ta, and M1 is unequal to M2. Annealing at 300° C. to 360° C. provides a high magnetoresistive ratio of about 150%.
    Type: Application
    Filed: January 19, 2011
    Publication date: July 19, 2012
    Inventors: Wei Cao, Cheng T. Horng, Witold Kula, Chyu Jiuh Torng
  • Patent number: 8212250
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: July 3, 2012
    Inventor: Leonard Forbes
  • Publication number: 20120161130
    Abstract: A minute electrode, a photoelectric conversion device including the minute electrode, and manufacturing methods thereof are provided. A plurality of parallel groove portions and a region sandwiched between the groove portions are formed in a substrate, and a conductive resin is supplied to the groove portions and the region and is fixed, whereby the groove portions are filled with the conductive resin and the region is covered with the conductive resin. The supplied conductive resin is not expanded outward, and the electrode with a designed width can be formed. Part of the electrode is formed over the region sandwiched between the groove portions, thus, the area of a cross section in the short axis direction can be large, and a low resistance in the long axis direction can be obtained.
    Type: Application
    Filed: December 14, 2011
    Publication date: June 28, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuji ODA, Takashi Hirose, Koichiro Tanaka, Sho Kato, Emi Koezuka
  • Publication number: 20120154335
    Abstract: A photoelectric element including a transparent bottom electrode, a photosensitive layer, a first electrode, a second electrode and a transparent top electrode is provided. The photosensitive layer is located above the transparent bottom electrode. The first electrode and the second electrode are disposed on the photosensitive layer. The transparent top electrode is located above the photosensitive layer.
    Type: Application
    Filed: December 20, 2010
    Publication date: June 21, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Isaac Wing-Tak Chan
  • Publication number: 20120154704
    Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a silicon layer (171) is provided between the substrate and the first semiconductor layer, facing the first semiconductor layer. Asperities are formed on the side of the silicon layer facing the first semiconductor layer, and asperities are provided on the side of the first semiconductor layer facing the silicon layer and the side thereof opposite the side facing the silicon layer.
    Type: Application
    Filed: July 16, 2010
    Publication date: June 21, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Makoto Nakazawa, Tomohiro Kimura
  • Publication number: 20120146027
    Abstract: An adverse effect of parasitic capacitance on optical data output from a photodetector circuit is suppressed. A photodetector circuit includes a photoelectric conversion element; a first field-effect transistor; a second field-effect transistor; a first conductive layer functioning as a gate of the first field-effect transistor; an insulating layer provided over the first conductive layer; a semiconductor layer overlapping with the first conductive layer with the insulating layer interposed therebetween; a second conductive layer electrically connected to the semiconductor layer; and a third conductive layer electrically connected to the semiconductor layer, whose pair of side surfaces facing each other overlaps with at least one conductive layer including the first conductive layer with the insulating layer interposed therebetween, and which functions as the other of the source and the drain of the first field-effect transistor.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 14, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hikaru TAMURA, Yoshiyuki KUROKAWA, Takayuki IKEDA
  • Publication number: 20120146026
    Abstract: A photoelectric conversion, element including a first gate electrode, a first gate insulating layer, a crystalline semiconductor layer an amorphous semiconductor layer, an impurity semiconductor layer, a source electrode and a drain electrode in contact with the impurity semiconductor layer, a second gate insulating layer covering; a region between the source electrode and the drain electrode, and a second gate electrode over the second gate insulating layer. In the photoelectric conversion element, a Sight-receiving portion is provided in the region between the source electrode and the drain electrode, the first gate electrode includes a light-shielding material and overlaps with the entire surface of the crystalline semiconductor layer and the amorphous semiconductor layer, the second gate electrode includes a light-transmitting material and overlaps with, the light-receiving portion, and the first gate electrode is electrically connected to the source electrode or the drain electrode is provided.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 14, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tsudoi Nagi, Koji Dairiki
  • Publication number: 20120146028
    Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. Further, a short circuit between the electrodes of the thin film diode via the light-blocking layer is prevented. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a light-blocking layer (160) is provided between the substrate and the first semiconductor layer. A metal oxide layer (180) is provided on the side of the light-blocking layer facing the first semiconductor layer. Asperities are provided on the side of the metal oxide layer facing the first semiconductor layer, and the first semiconductor layer has a geometry of asperities conforming with the asperities on the metal oxide layer.
    Type: Application
    Filed: July 26, 2010
    Publication date: June 14, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Akihiro Oda, Seiji Kaneko
  • Publication number: 20120146025
    Abstract: A light energy reuse type light-emitting device with low power consumption is provided by converting light from a light-emitting device into electric power efficiently for reuse. Also, a light energy reuse type light-emitting device with high yield is provided. A light-blocking film of the light-emitting device is replaced to a photoelectric conversion element, so that light is converted into electric power. That is, conventionally, light is not emitted in a portion of a light-blocking film. In the disclosed invention, light which is not emitted can be converted into electric power by a photoelectric conversion element, and can be reused. Therefore, a light-emitting device with low power consumption is realized.
    Type: Application
    Filed: November 29, 2011
    Publication date: June 14, 2012
    Inventors: Satoshi Seo, Kaoru Hatano
  • Patent number: 8198629
    Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: June 12, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Toriumi, Tomokazu Yokoi, Makoto Furuno
  • Publication number: 20120138929
    Abstract: An IR sensing transistor according to an exemplary embodiment of the present invention includes: a light blocking layer formed on a substrate; a gate insulating layer formed on the light blocking layer; a semiconductor formed on the gate insulating layer; a pair of ohmic contact members formed on the semiconductor; a source electrode and a drain electrode formed on respective ones of the ohmic contact members; a passivation layer formed on the source electrode and the drain electrode; and a gate electrode formed on the passivation layer, wherein substantially all of the gate insulating layer lies on the light blocking layer.
    Type: Application
    Filed: July 13, 2011
    Publication date: June 7, 2012
    Inventors: Suk Won JUNG, Byeong Hoon CHO, Sung Hoon YANG, Woong Kwon KIM, Sang Youn HAN, Dae Cheol KIM, Ki-Hun JEONG, Kyung-Sook JEON, Seung Mi SEO, Jung-Suk BANG, Kun-Wook HAN