Using Liquid Deposition (epo) Patents (Class 257/E21.114)
  • Patent number: 10297773
    Abstract: A wiring pattern manufacturing method includes: applying a liquid body including a first formation material on a substrate to form a base film; applying a liquid body including a second formation material on at least part of a surface of the base film to form a protection layer of the base film; forming a resist layer on a surface of the protection layer to expose the resist layer with desired patterning light; causing the exposed resist layer to come into contact with a developer to remove the resist layer and the protection layer until the base film is uncovered corresponding to the patterning light; and after depositing a catalyst on a surface of the uncovered base film, causing an electroless plating solution to come into contact with the surface of the base film to perform electroless plating.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: May 21, 2019
    Assignee: NIKON CORPORATION
    Inventors: Shohei Koizumi, Takashi Sugizaki, Yusuke Kawakami
  • Patent number: 9865461
    Abstract: The present invention relates to a liquid-phase process for producing structured silicon- and/or germanium-containing coatings by the application to a substrate of at least one coating composition, the partial activation of the resulting coating on the coated substrate, and oxidation of non-activated coating on the substrate, to the coats produced by the process and to their use.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: January 9, 2018
    Assignee: Evonik Degussa GmbH
    Inventors: Christoph Mader, Paul Henrich Woebkenberg, Joachim Erz, Stephan Traut, Matthias Patz, Michael Coelle, Stephan Wieber, Patrik Stenner, Janette Klatt, Odo Wunnicke
  • Patent number: 9818807
    Abstract: There is provided an organic light emitting diode display including: a substrate having a pixel area and a surrounding area enclosing the pixel area; an OLED formed in the pixel area; an anti-overflowing groove formed in the surrounding area of the substrate; and a dam positioned between the anti-overflowing groove and an end of the substrate.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: November 14, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventor: Dong-Seop Park
  • Patent number: 9356106
    Abstract: Methods for fabricating dense arrays of electrically conductive nanocrystals that are self-aligned in depressions at target locations on a substrate, and semiconductor devices configured with nanocrystals situated within a gate stack as a charge storage area for a nonvolatile memory (NVM) device, are provided.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: May 31, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Euhngi Lee, Sung-Taeg Kang
  • Patent number: 8963124
    Abstract: At least first and second Si1-xGex (0?x?1) layers are formed on an insulating film. At least first and second material layers are formed correspondingly to the at least first and second Si1-xGex (0?x?1) layers. A lattice constant of the first Si1-xGex (0?x?1) layer is matched with a lattice constant of the first material layer. A lattice constant of the second Si1-xGex (0?x?1) layer is matched with a lattice constant of the second material layer.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Masanobu Miyao, Hiroshi Nakashima, Taizoh Sadoh, Ichiro Mizushima, Masaki Yoshimaru
  • Patent number: 8709858
    Abstract: The present invention relates to a method for decreasing or increasing the band gap shift in the production of photovoltaic devices by means of coating a substrate with a formulation containing a silicon compound, e.g., in the production of a solar cell comprising a step in which a substrate is coated with a liquid-silane formulation, the invention being characterized in that the formulation also contains at least one germanium compound. The invention further relates to the method for producing such a photovoltaic device.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: April 29, 2014
    Assignee: Evonik Degussa GmbH
    Inventors: Bernhard Stuetzel, Wolfgang Fahrner
  • Patent number: 8673401
    Abstract: A method for depositing gallium using a gallium ink, comprising, as initial components: a gallium component comprising gallium; a stabilizing component; an additive; and, a liquid carrier; is provided comprising applying the gallium ink on the substrate; heating the applied gallium ink to eliminate the additive and the liquid carrier, depositing gallium on the substrate; and, optionally, annealing the deposited gallium.
    Type: Grant
    Filed: January 7, 2013
    Date of Patent: March 18, 2014
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: David Mosley, David Thorsen
  • Publication number: 20130312831
    Abstract: Techniques for enhancing energy conversion efficiency in chalcogenide-based photovoltaic devices by improved grain structure and film morphology through addition of urea into a liquid-based precursor are provided. In one aspect, a method of forming a chalcogenide film includes the following steps. Metal chalcogenides are contacted in a liquid medium to form a solution or a dispersion, wherein the metal chalcogenides include a Cu chalcogenide, an M1 and an M2 chalcogenide, and wherein M1 and M2 each include an element selected from the group consisting of: Ag, Mn, Mg, Fe, Co, Cd, Ni, Cr, Zn, Sn, In, Ga, Al, and Ge. At least one organic additive is contacted with the metal chalcogenides in the liquid medium. The solution or the dispersion is deposited onto a substrate to form a layer. The layer is annealed at a temperature, pressure and for a duration sufficient to form the chalcogenide film.
    Type: Application
    Filed: June 1, 2012
    Publication date: November 28, 2013
    Applicant: International Business Machines Corporation
    Inventors: David Brian Mitzi, Xiaofeng Qiu
  • Publication number: 20130307073
    Abstract: A method is provided for controlling the channel length in a thin-film transistor (TFT). The method forms a printed ink first source/drain (S/D) structure overlying a substrate. A fluoropolymer mask is deposited to cover the first S/D structure. A boundary region is formed between the edge of the fluoropolymer mask and the edge of the printed ink first S/D structure, having a width. Then, a primary ink is printed at least partially overlying the boundary region, forming a printed ink second S/D structure, having an edge adjacent to the fluoropolymer mask edge. After removing the fluoropolymer mask, the printed ink first S/D structure edge is left separated from the printed ink second S/D structure edge by a space equal to the boundary region width. A semiconductor channel is formed partially overlying the first and second S/D structures, having a channel length equal to the boundary region width.
    Type: Application
    Filed: May 15, 2012
    Publication date: November 21, 2013
    Inventors: Kurt Ulmer, Kanan Puntambekar
  • Patent number: 8569102
    Abstract: Disclosed are a high density CIS thin film and a method of manufacturing the same, which includes coating CIS nanopowders, CIGS nanopowders or CZTS nanopowders on a substrate by non-vacuum coating, followed by heat treatment with cavities between the nanopowders filled with filling elements such as copper, indium, gallium, zinc, tin, and the like. The high density CIS thin film is applied to a photo-absorption layer of a thin film solar cell, thereby providing a highly efficient thin film solar cell.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: October 29, 2013
    Assignee: Korea Institute of Energy Research
    Inventors: Se-Jin Ahn, Jae-Ho Yun, Ji-Hye Gwak, Ara Cho, Kyung-Hoon Yoon, Kee-Shik Shin, Seoung-Kyu Ahn, Ki-Bong Song
  • Patent number: 8563088
    Abstract: A method for preparing a Group 1a-1b-3a-6a material using a selenium/Group 1b ink comprising, as initial components: a selenium component comprising selenium, an organic chalcogenide component having a formula selected from RZ—Z?R? and R2—SH, a Group 1b component and a liquid carrier; wherein Z and Z? are each independently selected from sulfur, selenium and tellurium; wherein R is selected from H, C1-20 alkyl group, a C6-20 aryl group, a C1-20 alkylhydroxy group, an arylether group and an alkylether group; wherein R? and R2 are selected from a C1-20 alkyl group, a C6-20 aryl group, a C1-20 alkylhydroxy group, an arylether group and an alkylether group; and wherein the selenium/Group 1b ink is a stable dispersion.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: October 22, 2013
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Kevin Calzia, David Mosley, David L. Thorsen, Charles R. Szmanda
  • Patent number: 8535970
    Abstract: The invention relates to a manufacturing process of a photovoltaic solar cell (100) comprising: providing high doped areas (20) on the rear side (18) of the photovoltaic solar cell (100), providing localized metal contacts (30) localized on said high doped areas (20), providing a passivation layer (50) covering a surface (52) between said contacts (30), wherein the contacts (30) remain substantially free of the passivation layer (50), and depositing a metal layer (32) for a back surface field.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: September 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ranier Krauser, Lawrence A. Clevenger, Kevin Prettyman, Brian Christopher Sapp, Kevin S. Petrarca, Harold John Hovel, Gerd Pfeiffer, Zhengwen Li, Carl John Radens
  • Publication number: 20130058827
    Abstract: A method for producing a mono-crystalline sheet includes providing at least two aperture elements forming a gap in between; providing a molten alloy including silicon in the gap; providing a gaseous precursor medium comprising silicon in the vicinity of the molten alloy; providing a silicon nucleation crystal in the vicinity of the molten alloy; and bringing in contact said silicon nucleation crystal and the molten alloy. A device for producing a mono-crystalline sheet includes at least two aperture elements at a predetermined distance from each other, thereby forming a gap, and being adapted to be heated for holding a molten alloy including silicon by surface tension in the gap between the aperture elements; a precursor gas supply supplies a gaseous precursor medium comprising silicon in the vicinity of the molten alloy; and a positioning device for holding and moving a nucleation crystal in the vicinity of the molten alloy.
    Type: Application
    Filed: May 23, 2011
    Publication date: March 7, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mikael T. Bjoerk, Heike E. Riel, Heinz Schmid
  • Publication number: 20130045590
    Abstract: A carbon ribbon (16) has two faces (20, 22) and two longitudinal ends (34, 36), at least one of the faces of the ribbon (16?) having a central portion (20a, 22a) situated between the two longitudinal ends (34, 36), which central portion is to receive a deposit of a layer of a semiconductor material (30, 32). The ribbon further includes, on at least one of its races (20, 22), at least one longitudinal groove (17) situated between one of said ends (34, 36) and the central portion (20a, 22a), and in that the longitudinal groove (17) is shaped in such a manner that when the layer of the semiconductor material is deposited, the semiconductor material (30, 32) filling the groove (17) forms a protuberance (31) adjacent to one of the longitudinal ends (34, 36) of one of the faces (20, 22) of the carbon ribbon.
    Type: Application
    Filed: April 8, 2011
    Publication date: February 21, 2013
    Applicant: SOLARFORCE
    Inventor: Robert Tastevin
  • Patent number: 8372485
    Abstract: A gallium ink is provided, comprising, as initial components: a gallium component comprising gallium; a stabilizing component; an additive; and, a liquid carrier; wherein the gallium ink is a stable dispersion. Also provided are methods of preparing the gallium ink and for using the gallium ink in the preparation of semiconductor films (e.g., in the deposition of a CIGS layer for use in photovoltaic devices).
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: February 12, 2013
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: David Mosley, David Thorsen
  • Patent number: 8354673
    Abstract: A semiconductor component is provided having a substrate and at least one semiconductor layer realized to be polycrystalline on one side of the substrate. The polycrystalline semiconductor layer contains the crystal nuclei.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: January 15, 2013
    Assignee: Dritte Patentportfolio Beteiligungsgesellschaft mbH & Co. KG
    Inventors: Otto Hauser, Hartmut Frey
  • Publication number: 20120319083
    Abstract: Disclosed is a nanorod semiconductor device having a contact structure, and a method for manufacturing the same. The nanorod semiconductor device having a contact structure according to one embodiment of the present disclosure includes: a transparent wafer; a transparent electrode layer formed on the transparent wafer; a nanorod layer including a plurality of semiconductor nanorods doped with dopants having a first polarity and grown on the transparent electrode layer; and a single crystal semiconductor layer doped with dopants having a second polarity and forming a certain physical contact with the ends of the semiconductor nanorods.
    Type: Application
    Filed: December 21, 2010
    Publication date: December 20, 2012
    Applicant: Dongguk University Industry-Academic Cooperation F
    Inventors: Sang Wuk Lee, Tae Won Kang, Gennady Panin, Hak Dong Cho
  • Patent number: 8330142
    Abstract: A quantum dot light emitting device includes; a substrate, a first electrode disposed on the substrate, a second electrode disposed substantially opposite to the first electrode, a first charge transport layer disposed between the first electrode and the second electrode, a quantum dot light emitting layer disposed between the first charge transport layer and one of the first electrode and the second electrode, and at least one quantum dot including layer disposed between the quantum dot light emitting layer and the first charge transport layer, wherein the at least one quantum dot including layer has an energy band level different from an energy band level of the quantum dot light emitting layer.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: December 11, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-sang Cho, Byoung-lyong Choi, Eun-kyung Lee, Tae-ho Kim, Sang-jin Lee
  • Publication number: 20120309179
    Abstract: A substrate treating apparatus including: a first chamber having a coating part which forms a coating film of a liquid material containing an oxidizable metal and a solvent on a substrate; a second chamber having a first heating part which heats the coating film; and a connection part which connects the first chamber and the second chamber, wherein the connection part is provided with a second heating part which heats the coating film coated on the substrate and a pressure control part which controls the pressure around the coating film.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 6, 2012
    Applicant: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Hidenori Miyamoto, Tsutomu Sahoda
  • Patent number: 8309179
    Abstract: A selenium/Group 1b ink comprising, as initial components: a selenium component comprising selenium, an organic chalcogenide component having a formula selected from RZ—Z?R? and R2—SH, a Group 1b component and a liquid carrier; wherein Z and Z? are each independently selected from sulfur, selenium and tellurium; wherein R is selected from H, C1-20 alkyl group, a C6-20 aryl group, a C1-20 alkylhydroxy group, an arylether group and an alkylether group; wherein R? and R2 are selected from a C1-20 alkyl group, a C6-20 aryl group, a C1-20 alkylhydroxy group, an arylether group and an alkylether group; and wherein the selenium/Group 1b ink is a stable dispersion.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: November 13, 2012
    Assignee: Rohm and Haas Electronics Materials LLC
    Inventors: Kevin Calzia, David W. Mosley, Charles R. Szmanda, David L. Thorsen
  • Publication number: 20120256166
    Abstract: The invention relates to a process for deposition of elongated nanoparticles from a liquid carrier onto a substrate, and to electronic devices prepared by this process.
    Type: Application
    Filed: November 16, 2010
    Publication date: October 11, 2012
    Applicant: MERCK PATENT GESELLSCHAFT MIT BESCHRANKTER HAFTUNG
    Inventors: Lichun Chen, Michael Coelle, Mark John Goulding
  • Patent number: 8282995
    Abstract: A selenium/Group Ib/Group 3a ink is provided, comprising, as initial components: (a) a selenium/Group Ib/Group 3a system which comprises a combination of, as initial components: a selenium; an organic chalcogenide component; a Group Ib containing substance; optionally, a bidentate thiol component; a Group 3a containing substance; and, (b) a liquid carrier component; wherein the selenium/Group Ib/Group 3a system is stably dispersed in the liquid carrier component. Also provided are methods of preparing the selenium/Group Ib/Group 3a ink and for using the selenium/Group Ib/Group 3a ink to deposit a selenium/Group Ib/Group 3a material on a substrate for use in the manufacture of a variety of chalcogenide containing semiconductor materials, such as, thin film transistors (TFTs), light emitting diodes (LEDs); and photoresponsive devices (e.g., electrophotography (e.g.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: October 9, 2012
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Kevin Calzia, David Mosley, David L. Thorsen
  • Patent number: 8277894
    Abstract: A selenium ink comprising selenium stably dispersed in a liquid medium is provided, wherein the selenium ink is hydrazine free and hydrazinium free. Also provided are methods of preparing the selenium ink and of using the selenium ink to deposit selenium on a substrate for use in the manufacture of a variety of chalcogenide containing semiconductor materials, such as, thin film transistors (TFTs), light emitting diodes (LEDs); and photo responsive devices (e.g., electrophotography (e.g., laser printers and copiers), rectifiers, photographic exposure meters and photo voltaic cells) and chalcogenide containing phase change memory materials.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: October 2, 2012
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: David Mosley, Kevin Calzia
  • Publication number: 20120238075
    Abstract: A coating apparatus including a coating part which applies a liquid material containing an oxidizable metal and a solvent to a substrate; a chamber having a coating space in which the coating part applies the liquid material to the substrate and a transport space into which the substrate is transported; and a removal part which removes the liquid material from the atmosphere inside the chamber when a concentration of the solvent in the atmosphere inside the chamber exceeds a threshold value.
    Type: Application
    Filed: March 6, 2012
    Publication date: September 20, 2012
    Applicant: TOKYO OHKA KOGYO CO., LTD.
    Inventors: Hidenori Miyamoto, Tsutomu Sahoda
  • Patent number: 8258053
    Abstract: In sophisticated semiconductor devices including transistors having a high-k metal gate electrode structure, disposable spacers may be provided on the encapsulating spacer element with a reduced width so as to not unduly increase a lateral offset of a strain-inducing material to be incorporated into the active region. For this purpose, a multi-layer deposition may be used in combination with a low pressure CVD process.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: September 4, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Stephan Kronholz, Matthias Kessler, Andreas Kurz
  • Publication number: 20120214292
    Abstract: A gallium ink is provided, comprising, as initial components: a gallium component comprising gallium; a stabilizing component, wherein the stabilizing component is selected from 1,3-propanedithiol, beta-mercaptoethanol, analogs thereof and mixtures thereof; an additive, wherein the additive is selected from the group consisting of pyrazine; 2-methylpyrazine; 3-methylpyrazole; methyl 2-pyrazinecarboxylate; pyrazole; praxadine; pyrazine carboxamide; pyrazine carbonitrile; 2,5-dimethylpyrazine; 2,3,5,6-tetramethylpyrazine; 2-aminopyrazine; 2-ethylpyrazine; quinoxaline; quinoxaline substituted with a C1-5 alkyl group; 2-pyrazine carboxylic acid; 2-methylquinoxaline; 2,3-pyrazinedicarboxamide; 2,3-pyrazinedicarbonitrile; pyrrolidino-1-cyclohexene; pyrrolidino-1-cyclopentene; phenazine; phenazine substituted with a C1-5 alkyl group; isoquinoline; isoquinoline substituted with a C1-5 alkyl group; indoles; indoles substituted with a C1-5 alkyl group; imidazole; imidazole substituted with a C1-5 alkyl group; tetrazole
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Inventors: David Mosley, David Thorsen
  • Patent number: 8222074
    Abstract: The present invention relates generally to the field of macro- and microelectronics with the potential for large-scale integration, optics, communications, and computer technology and particularly to the materials for these and other related fields. The present invention provides an anisotropic semiconductor film on a substrate, comprising at least one solid layer of material that comprises predominantly planar graphene-like carbon-based structures and possesses anisotropy of conductivity, and wherein the layer thickness is in a range from approximately 5 nm to 1000 nm.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: July 17, 2012
    Assignee: Carben Semicon Limited
    Inventor: Pavel I. Lazarev
  • Publication number: 20120148949
    Abstract: Disclosed is a polymer having excellent solvent resistance which can be produced by using a polycarbonate diol having a repeating unit represented by the formula (1) and/or (2), having a hydroxyl group at both termini, and having a number average molecular weight of from 300 to 50,000: wherein R1 represents a linear or branched hydrocarbon group having 2 to 50 carbon atoms; and n represents an integer of 2 to 50, wherein R2 represents a linear or branched hydrocarbon group having 10 to 50 carbon atoms.
    Type: Application
    Filed: February 17, 2012
    Publication date: June 14, 2012
    Inventor: Katsuya SHIMIZU
  • Publication number: 20120115313
    Abstract: A sealing member is lifted to cause its edge to be in contact with a contact surface of a support member. In the state where a precision ejection nozzle is isolated, a gas exhaust unit is operated to exhaust the inside of a chamber to reduce the pressure in the chamber to a predetermined level. Then, a purge gas is introduced into the chamber from a purge gas supply source through a gas introduction section to replace the atmosphere in the chamber with the purge gas, and the pressure in the chamber is returned to the atmospheric pressure. After that, the sealing member is lowered to release the isolation of the precision ejection nozzle. Then, liquid droplets of a liquid device material are ejected toward the surface of a substrate while a carriage is reciprocated in the X direction.
    Type: Application
    Filed: January 20, 2012
    Publication date: May 10, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hiroshi SATO
  • Patent number: 8164167
    Abstract: An integrated circuit structure is disclosed. The integrated circuit structure includes a first package substrate including a radiating element, the radiating element having a radiating element connection extending from the radiating element. The integrated circuit structure further includes a first chip positioned adjacent to the radiating element connection, the first chip having a first chip connection on a surface of the first chip, wherein the first chip connection forms a capacitive coupling with the radiating element connection. A method of forming an integrated circuit structure is also disclosed.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: April 24, 2012
    Assignee: Nanyang Technological University
    Inventors: Yue Ping Zhang, Mei Sun
  • Publication number: 20120070937
    Abstract: A method for producing a compound semiconductor layer comprises dissolving a metal feedstock comprising at least one of a group I-B element and a group III-B element, in a metal state, in a mixed solvent comprising an organic compound containing a chalcogen element and a Lewis base organic compound to produce a solution for forming a semiconductor; forming a coat using the solution for forming a semiconductor; and heat-treating the coat.
    Type: Application
    Filed: July 27, 2010
    Publication date: March 22, 2012
    Applicant: KYOCERA CORPORATION
    Inventors: Seiichiro Inai, Yoshihide Okawa, Isamu Tanaka, Koichiro Yamada
  • Patent number: 8097886
    Abstract: An organic electroluminescence device which can prevent the deterioration thereof attributed to moisture by preventing a desiccant from influencing organic electroluminescence elements is provided. The organic electroluminescence device includes: first and second substrates which are arranged to face each other in an opposed manner with a gap therebetween; organic electroluminescence elements which are formed on a first surface of the first substrate which faces the second substrate in an opposed manner; a desiccant which is formed on a second surface of the second substrate which faces the first substrate in an opposed manner; and a resin which is adhered to the first and second surfaces and covers the desiccant and the organic electroluminescence elements.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: January 17, 2012
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Satoru Kase, Yoshinori Ishii, Eiji Matsuzaki
  • Publication number: 20110303912
    Abstract: Example embodiments relate to methods of manufacturing p-type Zn oxide nanowires and electronic devices including the p-type Zn oxide nanowires. The method may include forming Zn oxide nanowires in an aqueous solution by using a hydrothermal synthesis method and annealing the Zn oxide nanowires to form p-type Zn oxide nanowires.
    Type: Application
    Filed: May 13, 2011
    Publication date: December 15, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung-nam Cha, Young-jun Park, Jin-pyo Hong
  • Publication number: 20110287610
    Abstract: A selenium/Group 3a ink, comprising (a) a selenium/Group 3a complex which comprises a combination of, as initial components: a selenium component comprising selenium; a carboxylic acid component having a formula R—COOH, wherein R is selected from a C1-10 alkyl, C1-10 haloalkyl and a C1-10 mercaptoalkyl; a Group 3a complex, comprising at least one Group 3a material selected from aluminum, indium, gallium and thallium complexed with a multidentate ligand; and, (b) a liquid carrier; wherein the selenium/Group 3a complex is stably dispersed in the liquid carrier.
    Type: Application
    Filed: May 18, 2010
    Publication date: November 24, 2011
    Applicant: ROHM AND HAAS ELECTRONIC MATERIALS LLC
    Inventors: Kevin Calzia, David Mosley, David L. Thorsen
  • Publication number: 20110278533
    Abstract: A method of forming a nanoporous film is disclosed. The method comprises forming a coating solution including clusters, surfactant molecules, a solvent, and one of an acid catalyst and a base catalyst. The clusters comprise inorganic groups. The method further comprises aging the coating solution for a time period to select a predetermined phase that will self-assemble and applying the coating solution on a substrate. The method further comprises evaporating the solvent from the coating solution and removing the surfactant molecules to yield the nanoporous film.
    Type: Application
    Filed: November 1, 2007
    Publication date: November 17, 2011
    Applicant: PURDUE RESEARCH FOUNDATION
    Inventors: HUGH W. HILLHOUSE, Vikrant N. Urade, Ta-Chen Wei, Michael P. Tate
  • Publication number: 20110263100
    Abstract: Antimony, germanium and tellurium precursors useful for CVD/ALD of corresponding metal-containing thin films are described, along with compositions including such precursors, methods of making such precursors, and films and microelectronic device products manufactured using such precursors, as well as corresponding manufacturing methods. The precursors of the invention are useful for forming germanium-antimony-tellurium (GST) films and microelectronic device products, such as phase change memory devices, including such films.
    Type: Application
    Filed: June 26, 2011
    Publication date: October 27, 2011
    Applicant: ADVANCED TECHNOLOGY MATERIALS, INC.
    Inventors: William Hunks, Tianniu Chen, Chongying Xu, Jeffrey F. Roeder, Thomas H. Baum, Matthias Stender, Philip S.H. Chen, Gregory T. Stauf, Bryan C. Hendrix
  • Patent number: 8043890
    Abstract: The present invention relates to a device and a method for dividing up substrates (2) in wafer form (e.g. wafers), which is used in the semiconductor industry, MST (microstructure technology) industry and photovoltaic industry, whereby improved reliability of the process and lower reject rates are accomplished. This object is achieved according to the invention by using adhesion forces that act between the substrates in wafer form and the devices (1) thereby used.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: October 25, 2011
    Inventors: Wolfgang Coenen, Nils Hendrik Coenen
  • Publication number: 20110198559
    Abstract: A method is provided for growth of carbon nanotube (CNT) synthesis at a low temperature. The method includes preparing a catalyst by placing the catalyst between two metal layers of high chemical potential on a substrate, depositing such placed catalyst on a surface of a wafer, and reactivating the catalyst in a high vacuum at a room temperature in a catalyst preparation chamber to prevent a deactivation of the catalyst. The method also includes growing carbon nanotubes on the substrate in the high vacuum in a CNT growth chamber after preparing the catalyst.
    Type: Application
    Filed: April 25, 2011
    Publication date: August 18, 2011
    Applicant: STMICROELECTRONICS ASIA PACIFIC PTE LTD
    Inventors: Shanzhong Wang, Mui Hoon Nai, Zhonglin Miao
  • Patent number: 7977219
    Abstract: In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: July 12, 2011
    Assignee: Covalent Materials Corporation
    Inventors: Hiromichi Isogai, Takeshi Senda, Eiji Toyoda, Kumiko Murayama, Koji Izunome, Susumu Maeda, Kazuhiko Kashima
  • Patent number: 7972899
    Abstract: An apparatus for depositing a solid film onto a substrate from a reagent solution includes reservoirs of reagent solutions maintained at a sufficiently low temperature to inhibit homogeneous reactions within the reagent solutions. The chilled solutions are dispensed through showerheads, one at a time, onto a substrate. One of the showerheads includes a nebulizer so that the reagent solution is delivered as a fine mist, whereas the other showerhead delivers reagent as a flowing stream. A heater disposed beneath the substrate maintains the substrate at an elevated temperature at which the deposition of a desired solid phase from the reagent solutions may be initiated. Each reagent solution contains at least one metal and either S or Se, or both. At least one of the reagent solutions contains Cu. The apparatus and its associated method of use are particularly suited to forming films of Cu-containing compound semiconductors.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: July 5, 2011
    Assignee: Sisom Thin Films LLC
    Inventor: Isaiah O. Oladeji
  • Publication number: 20110076797
    Abstract: A method for producing at least one pattern on a top surface of a support made from a material presenting a first thermal conductivity comprises a step of arranging of a mask made from a material presenting a second thermal conductivity and comprising at least one recess having a shape corresponding to that of the pattern, in contact with a bottom surface of the support, the ratio of the first conductivity over the second conductivity being greater than or equal to 2, or smaller than or equal to ½, throughout the duration of the method. The method further comprises a step of depositing on the top surface a solution comprising a material designed to form the pattern, and a step of evaporating the solution.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 31, 2011
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventor: Mohamed BENWADIH
  • Patent number: 7910393
    Abstract: A Group IV based nanoparticle fluid is disclosed. The nanoparticle fluid includes a set of nanoparticles—comprising a set of Group IV atoms, wherein the set of nanoparticles is present in an amount of between about 1 wt % and about 20 wt % of the nanoparticle fluid. The nanoparticle fluid also includes a set of HMW molecules, wherein the set of HMW molecules is present in an amount of between about 0 wt % and about 5 wt % of the nanoparticle fluid. The nanoparticle fluid further includes a set of capping agent molecules, wherein at least some capping agent molecules of the set of capping agent molecules are attached to the set of nanoparticles.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: March 22, 2011
    Assignee: Innovalight, Inc.
    Inventors: Hyungrak Kim, Malcolm Abbott, Andreas Meisel, Elizabeth Tai, Augustus Jones, Dmitry Poplavskyy, Karel Vanheusden
  • Patent number: 7851803
    Abstract: A semiconductor device includes a substrate and a channel region which is formed above the substrate by printing, wherein a relationship L?2a is satisfied where L is a channel length of the channel region and a is a minimum dimension among pattern dimensions and inter-pattern dimensions in the same layer as patterns that define the channel length L; and a relationship W?2b is satisfied where W is a channel width of the channel region and b is a minimum dimension among pattern dimensions and inter-pattern dimensions in the same layer as a pattern that defines the channel width W.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: December 14, 2010
    Assignee: FUJIFILM Corporation
    Inventors: Atsushi Tanaka, Ken-Ichi Umeda, Kohei Higashi, Maki Nangu
  • Publication number: 20100291758
    Abstract: Methods and devices are provided for forming thin-films from solid group IIIA-based particles. In one embodiment of the present invention, a method is described comprising of providing a first material comprising an alloy of a) a group IIIA-based material and b) at least one other material. The material may be included in an amount sufficient so that no liquid phase of the alloy is present within the first material in a temperature range between room temperature and a deposition or pre-deposition temperature higher than room temperature, wherein the group IIIA-based material is otherwise liquid in that temperature range. The other material may be a group IA material. A precursor material may be formulated comprising a) particles of the first material and b) particles containing at least one element from the group consisting of: group IB, IIIA, VIA element, alloys containing any of the foregoing elements, or combinations thereof. The temperature range described above may be between about 20° C.
    Type: Application
    Filed: June 12, 2007
    Publication date: November 18, 2010
    Inventors: Matthew R. Robinson, Chris Eberspacher, Jeroen K.J. Van Duren
  • Patent number: 7829935
    Abstract: A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film are deposited on the quantum dots, and quantum dots composed of Si and coated with a high-dielectric insulating film are further deposited. Each of the quantum dots includes a core layer and a clad layer which covers the core layer. The electron occupied level in the core layer is lower than that in the clad layer.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: November 9, 2010
    Assignee: Hiroshima University
    Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
  • Patent number: 7799618
    Abstract: A method of manufacturing a semiconductor device includes: forming a plurality of regions extending in a predetermined direction on a substrate; and ejecting a liquid material on the plurality of regions to form an electrically conductive film, wherein the electrically conductive film extends in the same direction as the plurality of regions so as to overlap the plurality of regions.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: September 21, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Takeo Kawase, Shinri Sakai
  • Publication number: 20100213465
    Abstract: A semiconductor component is provided having a substrate and at least one semiconductor layer realized to be polycrystalline on one side of the substrate. The polycrystalline semiconductor layer contains the crystal nuclei.
    Type: Application
    Filed: July 29, 2008
    Publication date: August 26, 2010
    Applicant: Dritte Patentportifolio Beteiligungsgesellschaft mbH & Co. KG
    Inventors: Otto Hauser, Hartmut Frey
  • Publication number: 20100190322
    Abstract: A substrate for epitaxial growth, which is capable of improving a surface state of an epitaxial layer at microroughness level. In a substrate for epitaxial growth, when haze is defined as a value calculated by dividing intensity of scattered light obtained when light is incident from a predetermined light source onto a surface of a substrate, by intensity of the incident light from the light source, the haze is not more than 2 ppm all over an effectively used area of the substrate and an off-angle with respect to a plane direction is 0.05 to 0.10°.
    Type: Application
    Filed: April 5, 2010
    Publication date: July 29, 2010
    Inventors: Kenji SUZUKI, Ryuichi HIRANO, Masashi NAKAMURA
  • Publication number: 20100163841
    Abstract: A nano-hetero structure is provided. The nano-hetero structure includes at least one nano-semiconductor base and a plurality of metal nanoparticles attached on the surface of nano-semiconductor base.
    Type: Application
    Filed: April 30, 2009
    Publication date: July 1, 2010
    Applicant: Industrial Technology Research Institute
    Inventors: Chun-Yi Chen, Yung-Jung Hsu
  • Patent number: RE49204
    Abstract: There is provided an organic light emitting diode display including: a substrate having a pixel area and a surrounding area enclosing the pixel area; an OLED formed in the pixel area; an anti-overflowing groove formed in the surrounding area of the substrate; and a dam positioned between the anti-overflowing groove and an end of the substrate.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: September 6, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Dong-Seop Park