Using A Coherent Energy Beam, E.g., Laser Or Electron Beam (epo) Patents (Class 257/E21.134)
  • Patent number: 10211344
    Abstract: A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leading to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: February 19, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masashi Tsubuku, Kosei Noda
  • Patent number: 10184895
    Abstract: A SERS unit comprises a substrate; an optical function part formed on the substrate, for generating surface-enhanced Raman scattering; and a package containing the optical function part in an inert space and configured to irreversibly expose the space.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: January 22, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Katsumi Shibayama, Masashi Ito, Takafumi Yokino, Masaki Hirose, Anna Yoshida, Kazuto Ofuji, Yoshihiro Maruyama
  • Patent number: 10170314
    Abstract: A non-planar transistor including partially melted raised semiconductor source/drains disposed on opposite ends of a semiconductor fin with the gate stack disposed there between. The raised semiconductor source/drains comprise a super-activated dopant region above a melt depth and an activated dopant region below the melt depth. The super-activated dopant region has a higher activated dopant concentration than the activated dopant region and/or has an activated dopant concentration that is constant throughout the melt region. A fin is formed on a substrate and a semiconductor material or a semiconductor material stack is deposited on regions of the fin disposed on opposite sides of a channel region to form raised source/drains. A pulsed laser anneal is performed to melt only a portion of the deposited semiconductor material above a melt depth.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: Jacob Jensen, Tahir Ghani, Mark Y. Liu, Harold Kennel, Robert James
  • Patent number: 10163991
    Abstract: A display device includes a substrate comprising a first plastic layer, a second plastic layer on the first plastic layer, and an inorganic layer between the first plastic layer and the second plastic layer, an inorganic embossed layer on the substrate and comprising a plurality of mountain parts, an organic layer on the inorganic embossed layer, an inorganic buffer layer on the organic layer, a thin film transistor on the inorganic buffer layer, and a display element electrically connected to the thin film transistor.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: December 25, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Younggug Seol, Juchan Park, Sunhee Lee, Pilsuk Lee
  • Patent number: 10049915
    Abstract: A stacked semiconductor device is formed by implanting ions through dielectric and conductive structures of a first substrate to define a cleave plane in the first substrate, cleaving the first substrate at the cleave plane to obtain a cleaved layer including the dielectric and conductive structures, bonding at least one die to the first substrate, the at least one die having a smaller width than a width of the first substrate, depositing a planarization material over the at least one die, planarizing the planarization material to form a planarized upper surface over the at least one die, and stacking a third substrate on the planarized upper surface.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: August 14, 2018
    Assignee: SILICON GENESIS CORPORATION
    Inventors: Theodore E. Fong, Michael I. Current
  • Patent number: 10017410
    Abstract: A non-ablative method and apparatus for making an economical glass hard disk (platter) for a computer hard disk drive (HDD) using a material machining technique involving filamentation by burst ultrafast laser pulses. Two related methods disclosed, differing only in whether the glass substrate the HDD platter is to be cut from has been coated with all the necessary material layers to function as a magnetic media in a computer's hard drive. Platter blanks are precisely cut using filamentation by burst ultrafast laser pulses such that the blank's edges need not be ground, the platter's geometric circularity need not be corrected and there is no need for further surface polishing. Thus the platters can be cut from raw glass or coated glass. As a result, this method reduces the product contamination, speeds up production, and realizes great reductions in the quantity of waste materials and lower production costs.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: July 10, 2018
    Assignee: ROFIN-SINAR TECHNOLOGIES LLC
    Inventor: S. Abbas Hosseini
  • Patent number: 9972753
    Abstract: Wavelength converting light-emitting devices and methods of making the same are provided. In some embodiments, the devices include a phosphor material region designed to convert the wavelength of emitted light.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: May 15, 2018
    Assignee: Luminus Devices, Inc.
    Inventors: Hong Lu, Michael Lim, Hao Zhu
  • Patent number: 9947761
    Abstract: A method for producing a semiconductor device includes an implantation step of performing proton implantation from a rear surface of a semiconductor substrate of a first conductivity type and a formation step of performing an annealing process for the semiconductor substrate in an annealing furnace to form a first semiconductor region of the first conductivity type which has a higher impurity concentration than the semiconductor substrate after the implantation step. In the formation step, the furnace is in a hydrogen atmosphere and the volume concentration of hydrogen is in the range of 6% to 30%. Therefore, it is possible to reduce crystal defects in the generation of donors by proton implantation. In addition, it is possible to improve the rate of change into a donor.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: April 17, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yusuke Kobayashi, Takashi Yoshimura
  • Patent number: 9941147
    Abstract: A transfer apparatus includes a supporting member, a free electron excitation device and a detection device; the free electrons excitation device is configured to excite semiconductor material of an object to be transferred to generate free electrons, and the detection device is configured to detect whether material of a surface of the transferred object in contact with the support surface of the supporting member is conductive under excitation by the free electron excitation device. A laser annealing apparatus comprising the transfer apparatus is further provided.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: April 10, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Xueyong Wang, Qingrong Ren, Lu Wang, Yan Chen
  • Patent number: 9923067
    Abstract: A thin-film transistor (TFT) includes a gate electrode, a gate insulation layer, a source electrode, a drain electrode and an active layer arranged on a base substrate. The active layer includes an un-doped a-Si layer, a first doped a-Si layer and a second doped a-Si layer. One of the source electrode and the drain electrode is in contact with the first doped a-Si layer, and the other of the source electrode and the drain electrode is in contact with the second doped a-Si layer. The source electrode and the drain electrode are on different horizontal planes and spaced apart from each other, and the un-doped a-Si layer is positioned between the source electrode and the drain electrode.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: March 20, 2018
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Optoelectronics Technology Co., Ltd.
    Inventors: Wenbo Jiang, Shiyi Xie, Zhiying Bao
  • Patent number: 9852691
    Abstract: A display device, system having the same, and pixel are disclosed. In one aspect, the display device includes a display panel including a plurality of pixels and a plurality of wireless power receivers. The display device also includes a wireless power transmitter configured to generate and wirelessly transmit power to the wireless power receivers. Each of the wireless power receivers is configured to wirelessly receive the power from the wireless power transmitter and provide a first power supply voltage to the pixels. The display device further includes a power supply configured to generate an initial power supply voltage and provide the initial power supply voltage to the wireless power transmitter.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: December 26, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventor: Chang-Ho Hyun
  • Patent number: 9776279
    Abstract: A method and system are provided for crystallizing thin films with a laser system. The method includes obtaining a thin film comprising a substrate and a target layer that contains nano-scale particles and is deposited on the substrate. The heat conduction between the target layer and the substrate of the thin film is determined based on thermal input from the laser system to identify operating parameters for the laser system that cause crystallization of the nano-scale particles of the target layer in an environment at near room temperature with the substrate remaining at a temperature below the temperature of the target layer. The laser system is then operated with the determined operating parameters to generate a laser beam that is transmitted along an optical path to impinge the target layer. The laser beam is pulsed to create a localized rapid heating and cooling of the target layer.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: October 3, 2017
    Assignee: Purdue Research Foundation
    Inventors: Gary J. Cheng, Martin Y. Zhang
  • Patent number: 9761645
    Abstract: In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: September 12, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
  • Patent number: 9640718
    Abstract: According to one embodiment, a method for manufacturing a display element is disclosed. The method can include forming a peeling layer, forming a resin layer, forming a barrier layer, forming an interconnect layer, forming a display layer, and removing. The peeling layer is formed on a major surface of a base body. The major surface has first, second, and third regions. The peeling layer includes first, second, and third peeling portions. The resin layer is formed on the peeling layer. The resin layer includes first and second resin portions. The barrier layer is formed on the first, second, and third peeling portions. The interconnect layer is formed on the barrier layer. The display layer is formed on the interconnect layer. The first peeling portion is removed from the first resin portion and the second peeling portion is removed from the second resin portion.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: May 2, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Miura, Tatsunori Sakano, Tomomasa Ueda, Nobuyoshi Saito, Shintaro Nakano, Yuya Maeda, Hajime Yamaguchi
  • Patent number: 9620667
    Abstract: A method is disclosed for doping a semiconductor material comprising the steps of providing a semiconductor material having a first and a second surface. A dopant precursor is applied on the first surface of the semiconductor material. A thermal energy beam is directed onto the second surface of the semiconductor material to pass through the semiconductor material and impinge upon the dopant precursor to dope the semiconductor material thereby.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: April 11, 2017
    Assignee: AppliCote Associates LLC
    Inventors: Nathaniel R Quick, Michael C Murray
  • Patent number: 9577111
    Abstract: A method of fabricating a thin film transistor including following steps is provided. Sequentially form a semiconductor layer, a metal layer and an auxiliary layer on a substrate. Perform a crystallization process to transform the semiconductor layer into an active layer after the metal layer and the auxiliary layer are disposed on the semiconductor layer. After the active layer is formed, pattern the metal layer to form a source and a drain. Form a gate insulator and a gate. The gate insulator is disposed between the gate and the source and drain.
    Type: Grant
    Filed: November 11, 2015
    Date of Patent: February 21, 2017
    Assignee: Au Optronics Corporation
    Inventor: Jia-Hong Ye
  • Patent number: 9530535
    Abstract: A hydrogen-free amorphous dielectric insulating film having a high material density and a low density of tunneling states is provided. The film is prepared by e-beam deposition of a dielectric material on a substrate having a high substrate temperature Tsub under high vacuum and at a low deposition rate. In an exemplary embodiment, the film is amorphous silicon having a density greater than about 2.18 g/cm3 and a hydrogen content of less than about 0.1%, prepared by e-beam deposition at a rate of about 0.1 nm/sec on a substrate having Tsub=400° C. under a vacuum pressure of 1×10?8 Torr.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: December 27, 2016
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Xiao Liu, Daniel R. Queen, Frances Hellman
  • Patent number: 9455145
    Abstract: A method and apparatus for forming a crystalline semiconductor layer on a substrate are provided. A semiconductor layer is formed by vapor deposition. A pulsed laser melt/recrystallization process is performed to convert the semiconductor layer to a crystalline layer. Laser, or other electromagnetic radiation, pulses are formed into a pulse train and uniformly distributed over a treatment zone, and successive neighboring treatment zones are exposed to the pulse train to progressively convert the deposited material to crystalline material.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: September 27, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventor: Stephen Moffatt
  • Patent number: 9449848
    Abstract: According to one embodiment, the manufacturing method for the semiconductor device according to the embodiment includes carrying out ion implantation to the semiconductor layer and forming an amorphous layer on the surface of the semiconductor layer, and a heat treatment process using microwave annealing at a temperature higher than or equal to 200° C. and lower than or equal to 700° C. and single crystallizes the amorphous layer.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: September 20, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kiyotaka Miyano, Wakana Kai, Tatsunori Isogai, Tomonori Aoyama
  • Patent number: 9418838
    Abstract: An electronic device with improved variable resistance characteristics and a method for fabricating the same are provided. In an embodiment of the disclosed technology, a method for forming an electronic device with a semiconductor memory includes forming a crystalized doped layer over a substrate; forming a barrier layer over the doped layer; forming a metal layer over the barrier layer; and reacting the barrier layer with a portion of the metal layer. The electronic device and the method of fabricating the same according to embodiments of the disclosed technology may have improved variable resistance characteristics.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: August 16, 2016
    Assignee: SK hynix Inc.
    Inventors: Sook-Joo Kim, Jae-Geun Oh, Hyung-Suk Lee
  • Patent number: 9406515
    Abstract: A laser annealing device for compensating wafer heat maps and its method are disclosed. A laser annealing device comprises a pump laser source array including of a plurality of pump laser sources for irradiating a tunable mask, each pump laser source emitting pump laser, an annealing laser source for emitting annealing laser and irradiating the tunable mask, and a tunable mask for transmitting at least part of the annealing laser after being irradiated by the pump laser.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: August 2, 2016
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: BoXiu Cai
  • Patent number: 9378951
    Abstract: A method of manufacturing a display apparatus, the method including forming an amorphous silicon layer on a substrate, placing the substrate with the amorphous silicon layer in a chamber having a window on an upper portion thereof, and directing a laser beam toward the window, and converting the amorphous silicon layer into a polycrystalline silicon layer by irradiating the amorphous silicon layer with the laser beam while nitrogen gas is discharged from a nozzle located adjacent to an opening of a stabilizing room, wherein the laser beam reaches the amorphous silicon layer on the substrate after passing through the window, the stabilization room, and the opening of the stabilization room, wherein the opening faces the substrate.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: June 28, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sunmi Kang, Kyongho Park, Raechul Park, Donghoon Shin, Kwanghyun You, Hongro Lee
  • Patent number: 9012338
    Abstract: In the present invention, At least one row of lens arrays, in which a plurality of lenses are arranged in a direction intersecting with the conveying direction of a substrate to correspond to the plurality of TFT forming areas set in a matrix on the substrate, is shifted in the direction intersecting with the conveying direction of the substrate, to thereby align the lenses in the lens array with the TFT forming areas on the substrate based on the alignment reference position. The laser beams are irradiated onto the lens array when the substrate moves and the TFT forming areas reach the underneath of the corresponding lenses of the lens array, and the laser beams are focused by the plurality of lenses to anneal the amorphous silicon film in each TFT forming area.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: April 21, 2015
    Assignee: V Technology Co., Ltd.
    Inventors: Koichi Kajiyama, Michinobu Mizumura
  • Patent number: 8981441
    Abstract: According to one embodiment, a manufacturing method of a magnetic memory includes forming a magnetoresistive element in a cell array section on a semiconductor substrate, forming a dummy element in a peripheral circuit section on the semiconductor substrate, the dummy element having the same stacked structure as the magnetoresistive element and being arranged at the same level as the magnetoresistive element, collectively flattening the magnetoresistive element and the dummy element, applying a laser beam to the dummy element to form the dummy element into a non-magnetic body, and forming an upper electrode on the flattened magnetoresistive element.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Noma, Hiroshi Watanabe, Shinya Kobayashi
  • Patent number: 8951878
    Abstract: It is an object of the present invention to provide a method for manufacturing an SOI substrate having an SOI layer that can be used in practical applications with high yield even when a flexible substrate such as a glass substrate or a plastic substrate is used. Further, it is another object of the present invention to provide a method for manufacturing a thin semiconductor device using such an SOI substrate with high yield. When a single-crystal semiconductor substrate is bonded to a flexible substrate having an insulating surface and the single-crystal semiconductor substrate is separated to manufacture an SOI substrate, one or both of bonding surfaces are activated, and then the flexible substrate having an insulating surface and the single-crystal semiconductor substrate are attached to each other.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiro Jinbo, Hironobu Shoji, Hideto Ohnuma, Shunpei Yamazaki
  • Patent number: 8912102
    Abstract: A system for and method of processing an article such as a semiconductor wafer is disclosed. The wafer includes first and second surfaces which are segmented into a plurality of first and second zones. The first surface of the wafer, for example, on which devices or ICs are formed is processed by, for example, laser annealing while the second surface is heated with a backside heating source. Corresponding, or at least substantially corresponding, zones on the first and second surfaces are processed synchronously to reduce variations of post laser anneal thermal budget across the wafer.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: December 16, 2014
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Chyiu Hyia Poon, Alex K H See, Meisheng Zhou
  • Patent number: 8906742
    Abstract: Systems and methods are disclosed for performing laser annealing in a manner that reduces or minimizes wafer surface temperature variations during the laser annealing process. The systems and methods include annealing the wafer surface with first and second laser beams that represent preheat and anneal laser beams having respective first and second intensities. The preheat laser beam brings the wafer surface temperate close to the annealing temperature and the anneal laser beam brings the wafer surface temperature up to the annealing temperature. The anneal laser beam can have a different wavelength, or the same wavelength but different orientation relative to the wafer surface. Reflectivity maps of the wafer surface at the preheat and anneal wavelengths are measured and used to select the first and second intensities that ensure good anneal temperature uniformity as a function of wafer position. The first and second intensities can also be selected to minimize edge damage or slip generation.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: December 9, 2014
    Assignee: Ultratech, Inc.
    Inventors: Xiaohua Shen, Yun Wang, Xiaoru Wang
  • Patent number: 8896002
    Abstract: A method for producing a semiconductor laser having an edge window structure includes the steps of forming masks of insulating films on a nitride-based III-V compound semiconductor substrate including first regions and second regions periodically arranged in parallel therebetween; and growing a nitride-based III-V compound semiconductor layer in a region not covered by the masks. The first region between each two adjacent second regions has two or more positions, symmetrical with respect to a center line thereof, where laser stripes are to be formed. The masks are formed on one or both sides of each of the positions where the laser stripes are to be formed at least near a position where edge window structures are to be formed such that the masks are symmetrical with respect to the center line. The nitride-based III-V compound semiconductor layer includes an active layer containing at least indium and gallium.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: November 25, 2014
    Assignee: Sony Corporation
    Inventors: Rintaro Koda, Masaru Kuramoto, Eiji Nakayama, Tsuyoshi Fujimoto
  • Patent number: 8883541
    Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: November 11, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Yuanning Chen, Thomas P. Conroy, Jeffrey R. DeBord, Nagarajan Sridhar
  • Patent number: 8884407
    Abstract: A device includes a tube extending in a longitudinal direction and a hollow channel arranged in the tube. An end part of the tube is formed such that first electromagnetic radiation paths extending in the tube and outside of the hollow channel in the longitudinal direction are focused in a first focus.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: November 11, 2014
    Assignee: Infineon Technologies AG
    Inventors: Michael Sternad, Rainer Pelzer
  • Patent number: 8872194
    Abstract: An illumination device is disclosed. The illumination device includes a light source a pre-dip material that at least partially encapsulates the light source. The pre-dip material may include one or both of thermally-conductive particles and a cyclo-aliphatic composition. The pre-dip material may further include a resin and a hardener for the resin. Methods of manufacturing an illumination device are also disclosed.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: October 28, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Kum Soon Wong, Yean Chon Yaw, Kit Lai Wong
  • Patent number: 8865578
    Abstract: An embodiment is directed to a method of manufacturing a polycrystalline silicon layer, the method including providing a crystallization substrate, the crystallization substrate having an amorphous silicon layer on a first substrate, providing a reflection substrate, the reflection substrate having a first region with a reflection panel therein and a second region without the reflection panel, disposing the crystallization substrate and the reflection substrate on one another, and selectively crystallizing the amorphous silicon layer by directing a laser beam onto the crystallization substrate and the reflection substrate, and reflecting the laser beam from the reflection panel.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: October 21, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Jin Chang, Jae-Hwan Oh, Won-Kyu Lee, Seong-Hyun Jin, Jae-Beom Choi
  • Patent number: 8865482
    Abstract: A method of detecting the circular uniformity of semiconductor circular contact holes. Several detection circuit structures are disposed on the semiconductor wafer: N-type active regions and P-type active regions; silicon dioxide layers separate the N-type active regions from the P-type active regions; the N-type active regions are formed in the P well and the P-type active regions are formed in the N well; polysilicon gates bridge the N-type active regions and the P-type active regions; gate oxide layers insulate the P-type regions and the N-type regions from the polysilicon gates, so that the P-type regions and the N-type regions are independent; the N-type active regions connect with circular contact holes while the P-type active regions and the polysilicon gates connect with oval contact holes; a electron beam scanner detects the circular uniformity of the contact holes. This invention advantageously reflects effectively and comprehensively the circular uniformity of the contact holes.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: October 21, 2014
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Kai Wang, HungLin Chen, Yin Long, Qiliang Ni, MingShen Kuo
  • Patent number: 8865529
    Abstract: A thin-film transistor device manufacturing method and others according to the present disclosure includes: forming a plurality of gate electrodes above a substrate; forming a gate insulating layer on the plurality of gate electrodes; forming an amorphous silicon layer on the gate insulating layer; forming a buffer layer and a light absorbing layer above the amorphous silicon layer; forming a crystalline silicon layer by crystallizing the amorphous silicon layer with heat generated by heating the light absorbing layer using a red or near infrared laser beam; and forming a source electrode and a drain electrode on the crystalline silicon layer in a region that corresponds to each of the plurality of gate electrodes, and film thicknesses of the gate insulating layer, the amorphous silicon layer, the buffer layer, and the light absorbing layer satisfy predetermined expressions.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Panasonic Corporation
    Inventor: Yuta Sugawara
  • Patent number: 8853590
    Abstract: A device for irradiating a laser beam onto an amorphous silicon thin film formed on a substrate. The device includes: a stage mounting the substrate; a laser oscillator for generating a laser beam; a projection lens for focusing and guiding the laser beam onto the thin film; a reflector for reflecting the laser beam guided onto the thin film; a controller for controlling a position of the reflector; and an absorber for absorbing the laser beam reflected by the reflector.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: October 7, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Jae Kim, Myung-Koo Kang
  • Patent number: 8853011
    Abstract: A repairing method, repairing device and repairing structure for repairing a signal line of an array substrate having the disconnected defect, including: setting a repairing route according to a position of the disconnected defect and determining a position at which a filling portion is required to be formed according to the repairing route; forming the filling portion at the position at which the filling portion is required to be formed; and forming a repairing line along the repairing route. By detecting the repairing route before repairing the disconnected defect by forming the filling portion according to the repairing route, the present disclosure can avoid the disconnection of the repairing line caused by great height differences of the surface under the repairing line and improve the repairing success rate of the disconnected defect.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: October 7, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Wen-da Cheng, Chujen Wu
  • Patent number: 8846505
    Abstract: A method for growing islands of semiconductor monocrystals from a solution on an amorphous substrate includes the procedures of depositing a semiconductor-metal mixture layer, applying lithography and etching for forming at least one platform, heating the at least one platform, and saturating the semiconductor-metal solution until a monocrystal of the semiconductor component is formed. The procedure of depositing a semiconductor-metal mixture layer, includes a semiconductor component and at least one other metal component, is performed on top of the amorphous substrate. The procedure of applying lithography and etching to the semiconductor-metal mixture layer and a portion of the amorphous substrate is performed for forming at least one platform, the at least one platform having a top view shape corresponding to crystal growth direction and habit respective of the semiconductor component.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: September 30, 2014
    Assignee: SKOKIE Swift Corporation
    Inventor: Moshe Einav
  • Patent number: 8846488
    Abstract: The invention relates to a semiconductor device and a method for manufacturing such a semiconductor device. A semiconductor device according to an embodiment of the invention may comprise: a substrate; a device region located on the substrate; and at least one stress introduction region separated from the device region by an isolation structure, with stress introduced into at least a portion of the at least one stress introduction region, wherein the stress introduced into the at least a portion of the at least one stress introduction region is produced by utilizing laser to illuminate an amorphized portion comprised in the at least one stress introduction region to recrystallize the amorphized portion. The semiconductor device according to an embodiment of the invention produces stress in a simpler manner and thereby improves the performance of the device.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: September 30, 2014
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Qingqing Liang, Huaxiang Yin, Huicai Zhong, Huilong Zhu
  • Patent number: 8809981
    Abstract: A method for manufacturing a semiconductor device includes: irradiating a growth substrate with laser light to focus the laser light into a prescribed position inside a crystal for a semiconductor device or inside the growth substrate, the crystal for the semiconductor device being formed on a first major surface of the growth substrate; moving the laser light in a direction parallel to the first major surface; and peeling off a thin layer including the crystal for the semiconductor device from the growth substrate, a wavelength of the laser light being longer than an absorption end wavelength of the crystal for the semiconductor device or the growth substrate, the laser light being irradiated inside a crystal for the semiconductor device or inside the growth substrate.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: August 19, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masanobu Ando, Toru Gotoda, Toru Kita
  • Patent number: 8785326
    Abstract: Wafer-level processing of wafer assemblies with transducers is described herein. A method in accordance with some embodiments includes forming a solid state transducer device by forming one or more trenches to define solid state radiation transducers. An etching media is delivered in to the trenches to release the transducers from a growth substrate used to fabricate the transducers. A pad can hold the radiation transducers and promote distribution of the etching media through the trenches to underetch and release the transducers.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: July 22, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Ming Zhang, Lifang Xu
  • Patent number: 8772173
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate having a gate structure, a source region, and a drain region formed thereon, and the gate structure includes a gate insulating layer and a gate electrode. The method also includes forming a first stress layer on the substrate, removing the first stress layer, and forming a second stress layer on the substrate.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: July 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-kwan Yu, Dong-suk Shin, Pan-kwi Park, Ki-eun Kim
  • Patent number: 8765608
    Abstract: Methods for making a semiconductor device are disclosed. The method includes forming a plurality of gate stacks on a substrate, forming an etch buffer layer on the substrate, forming a dielectric material layer on the etch buffer layer, forming a hard mask layer on the substrate, wherein the hard mask layer includes one opening, and etching the dielectric material layer to form a plurality of trenches using the hard mask layer and the etch buffer layer as an etch mask.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: July 1, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Ya Hui Chang
  • Patent number: 8767782
    Abstract: An object of the present invention is to provide a method and a device for constantly setting the energy distribution of a laser beam on an irradiating face, and uniformly irradiating the laser beam to the entire irradiating face. Further, another object of the present invention is to provide a manufacturing method of a semiconductor device including this laser irradiating method in a process. Therefore, the present invention is characterized in that the shapes of plural laser beams on the irradiating face are formed by an optical system in an elliptical shape or a rectangular shape, and the plural laser beams are irradiated while the irradiating face is moved in a first direction, and the plural laser beams are irradiated while the irradiating face is moved in a second direction and is moved in a direction reverse to the first direction.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: July 1, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Koichiro Tanaka
  • Patent number: 8759164
    Abstract: In a method for manufacturing an integral imaging device, a layer of curable adhesive is first applied on a flexible substrate and half cured such that the curable adhesive is solidified but is capable of deforming under external forces. Then the curable adhesive is printed into a lenticular lens having a predetermined shape and size using a roll-to-roll processing device and fully cured such that the curable adhesive is capable of withstanding external forces to hold the predetermined shape and size. Last, a light emitting diode display is applied on the flexible substrate opposite to the lenticular lens such that an image plane of the light emitting diode display coincides with a focal plane of the lenticular lens.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: June 24, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chia-Ling Hsu
  • Patent number: 8753946
    Abstract: The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.
    Type: Grant
    Filed: February 4, 2012
    Date of Patent: June 17, 2014
    Assignees: NthDegree Technologies Worldwide Inc, NASA, an agency of the United States
    Inventors: William Johnstone Ray, Mark David Lowenthal, Neil O. Shotton, Richard A. Blanchard, Mark Allan Lewandowski, Kirk A. Fuller, Donald Odell Frazier
  • Patent number: 8753947
    Abstract: The present invention provides a method of manufacturing an electronic apparatus, such as a lighting device having light emitting diodes (LEDs) or a power generating device having photovoltaic diodes. The exemplary method includes depositing a first conductive medium within a plurality of channels of a base to form a plurality of first conductors; depositing within the plurality of channels a plurality of semiconductor substrate particles suspended in a carrier medium; forming an ohmic contact between each semiconductor substrate particle and a first conductor; converting the semiconductor substrate particles into a plurality of semiconductor diodes; depositing a second conductive medium to form a plurality of second conductors coupled to the plurality of semiconductor diodes; and depositing or attaching a plurality of lenses suspended in a first polymer over the plurality of diodes. In various embodiments, the depositing, forming, coupling and converting steps are performed by or through a printing process.
    Type: Grant
    Filed: February 4, 2012
    Date of Patent: June 17, 2014
    Assignees: NthDegree Technologies Worldwide Inc, NASA
    Inventors: William Johnstone Ray, Mark David Lowenthal, Neil O. Shotton, Richard A. Blanchard, Mark Allan Lewandowski, Kirk A. Fuller, Donald Odell Frazier
  • Patent number: 8735233
    Abstract: A crystalline silicon thin film is formed by irradiating a silicon thin film with a laser beam. The laser beam is a continuous wave laser beam. An intensity distribution of the laser beam in a first region about a center of the intensity distribution is symmetric on an anterior side and a posterior side of the center. The intensity distribution in a second region about the center is asymmetric on the anterior side and the posterior side. The first region is from the maximum intensity of the laser beam at the center to an intensity half of the maximum intensity. The second region is at most equal to the half of the maximum intensity of the laser beam. In the second region, an integral intensity value on the posterior side is larger than on the anterior side.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: May 27, 2014
    Assignee: Panasonic Corporation
    Inventors: Tomohiko Oda, Takahiro Kawashima
  • Publication number: 20140099780
    Abstract: Techniques and structures for laser doping of crystalline semiconductors using a dopant-containing amorphous silicon stack for dopant source and passivation. A method includes forming a dopant-containing amorphous silicon layer stack on at least one portion of a surface of a crystalline semiconductor layer, and irradiating a selected area of the dopant-containing amorphous silicon layer stack, wherein the selected area of the dopant-containing amorphous silicon layer stack interacts with an upper portion of the underlying crystalline semiconductor layer to form a doped, conductive crystalline region, and each non-selected area of the dopant-containing amorphous silicon layer stack remains intact on the at least one portion of the surface of the crystalline semiconductor layer.
    Type: Application
    Filed: October 5, 2012
    Publication date: April 10, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Patent number: 8685860
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The method includes the following steps. Firstly, a semiconductor substrate having an active surface and a back surface is provided. The active surface is opposite to the back surface, and the semiconductor substrate includes at least one grounding pad disposed on the active surface. Secondly, at least one through silicon via is formed through the semiconductor substrate from the back surface to the active surface thus exposing the grounding pad. Then, a conductive layer is formed on the back surface of the semiconductor substrate and filled into the through silicon via to electrically connect to the grounding pad and the semiconductor substrate.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: April 1, 2014
    Assignee: Ineffable Cellular Limited Liability Company
    Inventor: Wen-Hsiung Chang
  • Patent number: 8673751
    Abstract: A laser crystallization system and a method of manufacturing a display apparatus using the laser crystallization system are disclosed. In one embodiment, the system includes i) a mother substrate in which first, second, and third display regions and ii) a stage for supporting the mother substrate and moving in first and second directions perpendicular to each other. The embodiment also includes i) a first laser irradiation unit for irradiating a first laser beam having a width greater than or identical to a width of a side of one of the first, second, and third display regions in the first direction and ii) a second laser irradiation unit spaced apart from the first laser irradiation unit and irradiating a second laser beam having a width greater than or identical to the width of the one side in the first direction.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: March 18, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Hwan Oh, Jae-Beom Choi, Won-Kyu Lee, Young-Jin Chang, Seong-Hyun Jin