Using A Coherent Energy Beam, E.g., Laser Or Electron Beam (epo) Patents (Class 257/E21.134)
  • Publication number: 20100221900
    Abstract: A mask for sequential lateral solidification (SLS) processes including at least one first window, one second window, one third window, and one fourth window is provided. Each window has a length extending longitude on the mask. The second window is aligned to the first window. The width of the first window is greater than that of the second window. The fourth window is aligned to the third window. The width of the third window is greater than that of the fourth window.
    Type: Application
    Filed: May 11, 2010
    Publication date: September 2, 2010
    Inventor: Ming-Wei SUN
  • Patent number: 7785936
    Abstract: The present invention relates to a method for repairing a semiconductor device. The method includes cutting a fuse without creation of residue by transforming the fuse into a nonconductor of high resistance by oxidizing the fuse by irradiating the fuse with an oxygen ion beam instead of a laser in a blowing process. The method includes transforming a fuse corresponding to a defective cell among a plurality of fuses formed in an upper portion of a semiconductor substrate into an oxide film.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: August 31, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Chi Hwan Jang
  • Patent number: 7777231
    Abstract: A method for forming a thin film transistor on a substrate is disclosed. A gate electrode and a gate insulation layer are disposed on a surface of the substrate. A deposition process is performed by utilizing hydrogen diluted silane to form a silicon-contained thin film on the gate insulation layer first. A hydrogen plasma etching process is thereafter performed. The deposition process and the etching process are repeated for at least one time to form an interface layer. Finally, an amorphous silicon layer, n+ doped Si layers, a source electrode, and a drain electrode are formed on the interface layer.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: August 17, 2010
    Assignee: AU Optronics Corp.
    Inventors: Feng-Yuan Gan, Han-Tu Lin
  • Patent number: 7772134
    Abstract: A thermal processing apparatus and method in which a first laser source, for example, a CO2 emitting at 10.6 ?m is focused onto a silicon wafer as a line beam and a second laser source, for example, a GaAs laser bar emitting at 808 nm is focused onto the wafer as a larger beam surrounding the line beam. The two beams are scanned in synchronism in the direction of the narrow dimension of the line beam to create a narrow heating pulse from the line beam when activated by the larger beam. The energy of GaAs radiation is greater than the silicon bandgap energy and creates free carriers. The energy of the CO2 radiation is less than the silicon bandgap energy so silicon is otherwise transparent to it, but the long wavelength radiation is absorbed by the free carriers.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: August 10, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Dean Jennings, Haifan Liang, Mark Yam, Vijay Parihar, Abhilash Mayur, Aaron Hunter, Bruce Adams, Joseph Michael Ranish
  • Publication number: 20100193792
    Abstract: A production method for a semiconductor film according to the present invention includes: step (a) of forming a first film 103 supported by a substrate 101; step (b) of forming a second film 102 being supported by the substrate and having a lower thermal conductivity than that of the first film 103; step (c) of depositing a semiconductor film 104 in an amorphous state above the first film 103 and the second film 102; and step (d) of irradiating portions of the semiconductor film 104 that are located above the first film 103 and the second film 102 with an energy beam of the same intensity, thereby crystallize the portion of the semiconductor film 104 that is located above the second film 102 and leaving the portion of the semiconductor film 104 that is located above the first film 103 in the amorphous state.
    Type: Application
    Filed: July 14, 2008
    Publication date: August 5, 2010
    Inventor: Toshiaki Miyajima
  • Patent number: 7767559
    Abstract: A process for fabricating a semiconductor device comprising the steps of: introducing into an amorphous silicon film, a metallic element which accelerates the crystallization of the amorphous silicon film; applying heat treatment to the amorphous silicon film to obtain a crystalline silicon film; irradiating a laser beam or an intense light to the crystalline silicon film; and heat treating the crystalline silicon film irradiated with a laser beam or an intense light.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: August 3, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Takeshi Fukunaga, Akiharu Miyanaga
  • Publication number: 20100184277
    Abstract: A semiconductor device is fabricated by forming a first crystalline region by irradiating a laser beam to a first region of an amorphous semiconductor film by relatively moving the laser beam with respect to the first region of the amorphous semiconductor film. A second crystalline region is formed by irradiating the laser beam to a second region of the amorphous semiconductor film including a portion of the first crystalline region by relatively moving the laser beam with respect to the second region of the amorphous semiconductor film. The wavelength of the laser beam falls in a range of 370 rim through 650 nm. In general, crystalline performance of the first crystalline region, the second crystalline region, and a region of overlap between the first crystalline region and the second crystalline region are the same.
    Type: Application
    Filed: February 12, 2010
    Publication date: July 22, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro Tanaka
  • Publication number: 20100173480
    Abstract: This invention is intended to provide a laser annealing method by employing a laser annealer lower in running cost so as to deal with a large-sized substrate, for preventing or decreasing the generation of a concentric pattern and to provide a semiconductor device manufacturing method including a step using the laser annealing method. While moving a substrate at a constant rate between 20 and 200 cm/s, a laser beam is radiated aslant to a semiconductor film on a surface of the semiconductor substrate. Therefore, it is possible to radiate a uniform laser beam to even a semiconductor film on a large-sized substrate and to thereby manufacture a semiconductor device for which the generation of a concentric pattern is prevented or decreased. By condensing a plurality of laser beams into one flux, it is possible to prevent or decrease the generation of a concentric pattern and to thereby improve the reliability of the semiconductor device.
    Type: Application
    Filed: June 30, 2009
    Publication date: July 8, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Koichiro Tanaka, Masaaki Hiroki
  • Publication number: 20100173481
    Abstract: A crystallization method using a mask includes providing a substrate having a semiconductor layer; positioning a mask over the substrate, the mask having first, second and third blocks, each block having a periodic pattern including a plurality of transmitting regions and a blocking region, the periodic pattern of the first block having a first position, the periodic pattern of the second block having a second position, the periodic pattern of the third block having a third position, the first, second and third positions being different from each other; and crystallizing the semiconductor layer by irradiating a laser beam through the mask.
    Type: Application
    Filed: March 22, 2010
    Publication date: July 8, 2010
    Inventor: JaeSung You
  • Patent number: 7749831
    Abstract: Methods for fabricating CMOS image sensor devices are provided, wherein active pixel sensors are constructed with non-planar transistors having vertical gate electrodes and channels, which minimize the effects of image lag and dark current.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: July 6, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jeong Ho Lyu
  • Patent number: 7745302
    Abstract: A method for making transmission electron microscope gird is provided. An array of carbon nanotubes is provided and drawing a carbon nanotube film from the array of carbon nanotubes. A substrate has a plurality of spaced metal girds attached on the substrate. The metal girds are covered with the carbon nanotube film and treating the carbon nanotube film and the metal girds with organic solvent. A transmission electron microscope (TEM) grid is obtained by removing remaining CNT film.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: June 29, 2010
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Li-Na Zhang, Zhuo Chen, Chen Feng, Liang Liu, Kai-Li Jiang, Qun-Qing Li, Shou-Shan Fan
  • Publication number: 20100155737
    Abstract: A purpose of the invention is to provide a method for leveling a semiconductor layer without increasing the number and the complication of manufacturing processes as well as without deteriorating a crystal characteristic, and a method for leveling a surface of a semiconductor layer to stabilize an interface between the surface of the semiconductor layer and a gate insulating film, in order to achieve a TFT having a good characteristic. In an atmosphere of one kind or a plural kinds of gas selected from hydrogen or inert gas (nitrogen, argon, helium, neon, krypton and xenon), radiation with a laser beam in the first, second and third conditions is carried out in order, wherein the first condition laser beam is radiated for crystallizing a semiconductor film or improving a crystal characteristic; the second condition laser beam is radiated for eliminating an oxide film; and the third condition laser beam is radiated for leveling a surface of the crystallized semiconductor film.
    Type: Application
    Filed: March 9, 2010
    Publication date: June 24, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Setsuo NAKAJIMA
  • Publication number: 20100151634
    Abstract: At least two TFTs which are connected with a light emitting element are provided, crystallinities of semiconductor regions composing active layers of the respective TFTs are made different from each other. As the semiconductor region, a region obtained by crystallizing an amorphous semiconductor film by laser annealing is applied. In order to change the crystallinity, a method of changing a scan direction of a continuous oscillating laser beam so that crystal growth directions are made different from each other is applied. Alternatively, a method of changing a channel length direction of TFT between the respective semiconductor regions without changing the scan direction of the continuous oscillating laser beam so that a crystal growth direction and a current flowing direction are different from each other is applied.
    Type: Application
    Filed: January 29, 2010
    Publication date: June 17, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 7736928
    Abstract: Embodiments of the invention contemplate the formation of a low cost solar cell using a novel electroplating apparatus and method to form a metal contact structure having metal lines formed using an electrochemical plating process. The apparatus and methods described herein remove the need to perform the often costly processing steps of performing a mask preparation and formation steps, such as screen printing, lithographic steps and inkjet printing steps, to form a contact structure. The resistance of interconnects formed in a solar cell device greatly affects the efficiency of the solar cell. It is thus desirable to form a solar cell device that has a low resistance connection that is reliable and cost effective. Therefore, one or more embodiments of the invention described herein are adapted to form a low cost and reliable interconnecting layer using an electrochemical plating process containing a common metal, such as copper.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: June 15, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Sergey Lopatin, John O. Dukovic, David Eaglesham, Nicolay Y. Kovarsky, Robert Bachrach, John Busch, Charles Gay
  • Patent number: 7732268
    Abstract: A method of manufacturing a display device to improve the quality of a polycrystal silicon upon dehydrogenating and polycrystallizing an amorphous silicon at the outside of a display region of a substrate, by forming a plurality of pixels having TFT devices using an amorphous silicon in the display region of the substrate, and forming a plurality of driving circuits having semiconductor devices using a polycrystal silicon at the outside of the display region, the method including irradiation of a first continuous oscillation laser only to the amorphous silicon in the region for forming the driving circuit and the peripheral region thereof to conduct dehydrogenation and then irradiation of a second continuous oscillation region only to the dehydrogenated region to polycrystallize the amorphous silicon, wherein the region to which the first continuous oscillation laser is irradiated is wider than the region to which the second continuous oscillation laser is irradiated.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: June 8, 2010
    Assignee: Hitachi Displays, Ltd.
    Inventors: Hideaki Shimmoto, Mikio Hongo, Akio Yazaki, Takeshi Noda, Takuo Kaitoh
  • Patent number: 7723168
    Abstract: A method of manufacturing a polycrystalline Si film and a method of manufacturing a stacked transistor are provided. The method of manufacturing the polycrystalline Si film includes preparing an insulating substrate on which is formed a transistor that includes a poly-Si active layer, a gate insulating layer, and a gate, sequentially formed, forming an interconnection metal line separated from the gate, forming an insulating layer that covers the transistor and the interconnection metal line, forming an amorphous silicon layer on the insulating layer; and annealing the amorphous silicon layer.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: May 25, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Huaxiang Yin, Takashi Noguchi, Wenxu Xianyu, Kyung-bae Park
  • Patent number: 7718517
    Abstract: High throughput systems and processes for recrystallizing thin film semiconductors that have been deposited at low temperatures on a substrate are provided. A thin film semiconductor workpiece is irradiated with a laser beam to melt and recrystallize target areas of the surface exposed to the laser beam. The laser beam is shaped into one or more beamlets using patterning masks. The mask patterns have suitable dimensions and orientations to pattern the laser beam radiation so that the areas targeted by the beamlets have dimensions and orientations that are conducive to semiconductor recrystallization. The workpiece is mechanically translated along linear paths relative to the laser beam to process the entire surface of the work piece at high speeds. Position sensitive triggering of a laser can be used generate laser beam pulses to melt and recrystallize semiconductor material at precise locations on the surface of the workpiece while it is translated on a motorized stage.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: May 18, 2010
    Inventor: James S. Im
  • Patent number: 7709337
    Abstract: It is an object of the present invention to provide a method for manufacturing an SOI substrate having an SOI layer that can be used in practical applications with high yield even when a flexible substrate such as a glass substrate or a plastic substrate is used. Further, it is another object of the present invention to provide a method for manufacturing a thin semiconductor device using such an SOI substrate with high yield. When a single-crystal semiconductor substrate is bonded to a flexible substrate having an insulating surface and the single-crystal semiconductor substrate is separated to manufacture an SOI substrate, one or both of bonding surfaces are activated, and then the flexible substrate having an insulating surface and the single-crystal semiconductor substrate are attached to each other.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: May 4, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiro Jinbo, Hironobu Shoji, Hideto Ohnuma, Shunpei Yamazaki
  • Patent number: 7709309
    Abstract: It is an object of the present invention to control the plane orientation of crystal grains obtained by using a laser beam, into a direction that can be substantially regarded as one direction in an irradiation region of the laser beam. After forming a cap film over a semiconductor film, the semiconductor film is crystallized by using a CW laser or a pulse laser having a repetition rate of greater than or equal to 10 MHz. The obtained semiconductor film has a plurality of crystal grains having a width of greater than or equal to 0.01 ?m and a length of greater than or equal to 1 ?m. In a surface of the obtained semiconductor film, a ratio of an orientation {211} is greater than or equal to 0.4 within the range of an angle fluctuation of ±10°.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: May 4, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Tomoaki Moriwaka
  • Patent number: 7704861
    Abstract: Onto a surface of an AlxGayIn1-x-yAszP1-z (0?x, y, z?1) layer including GaAs alone or an InP substrate, an electron beam controlled to an arbitrary electron beam diameter and current density is irradiated so as to selectively substitute or generate Ga2O3 for a natural oxide layer formed on the AlxGayIn1-x-yAszP1-z, layer surface, then the AlxGayIn1-x-yAszP1-z layer surface is dry-etched by a bromide in single atomic layer units, whereby the natural oxide layer other than the part substituted by the Ga2O3 and AlxGayIn1-x-yAszP1-z substrate are removed.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: April 27, 2010
    Assignee: Riber SA
    Inventors: Tadaaki Kaneko, Kiyoshi Sakaue, Naokatsu Sano
  • Patent number: 7700463
    Abstract: A semiconductor device having high electrical characteristics is manufactured at low cost and with high throughput. A semiconductor film is crystallized or activated by being irradiated with a laser beam emitted from one fiber laser. Alternatively, laser beams are emitted from a plurality of fiber lasers and coupled by a coupler to be one laser beam, and then a semiconductor film is irradiated with the coupled laser beam so as to be crystallized or activated.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: April 20, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Akihisa Shimomura
  • Patent number: 7696031
    Abstract: It is an object of the present invention to control the position in crystal lateral growth of a semiconductor film without making a system cumbersome and complicated. A method for manufacturing a semiconductor device according to the present invention includes the step of forming a semiconductor film over an insulating substrate, forming a reflective film comprising an insulating film on the semiconductor film, exposing a portion of the semiconductor film by patterning of the reflective film, and crystallizing the exposed semiconductor film by irradiating the exposed semiconductor film with laser light while using the patterned reflective film as a mask. In the above-described method according to the present invention, the reflective film has a structure in which an insulating film that has a higher refractive index and an insulating film that has a lower refractive index are stacked alternately.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: April 13, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Akihisa Shimomura, Hironobu Shoji
  • Patent number: 7696032
    Abstract: In one embodiment, a method of fabricating a semiconductor device having a crystalline semiconductor layer includes preparing a semiconductor substrate and forming a preliminary active pattern on the semiconductor substrate. The preliminary active pattern includes a barrier pattern and a non-single crystal semiconductor pattern. A sacrificial non-single crystal semiconductor layer covers the preliminary active pattern and the semiconductor substrate. By crystallizing the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern, using the semiconductor substrate as a seed layer, the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern are changed to a sacrificial crystalline semiconductor layer and a crystalline semiconductor pattern, respectively. The crystalline semiconductor pattern and the barrier pattern constitute an active pattern. The sacrificial crystalline semiconductor layer is removed.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: April 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Min Kim, Eun-Jung Yun
  • Patent number: 7687328
    Abstract: A method of forming a polycrystalline thin film for a thin film transistor, a mask used in the method, and a method of making a flat panel display device using the method of forming a polycrystalline thin film for a thin film transistor are disclosed. Certain embodiments are capable of providing a display device in which the polycrystalline thin film is uniformly crystallized such luminance non-uniformity is reduced. In the method of forming a polycrystalline thin film for a thin film transistor, amorphous material is crystallized using a laser and a mask having a mixed structure of one or more transmission region sets each comprising one or more transmission regions through which the laser beam is capable of passing and one or more non-transmission regions through which the laser beam is not capable of passing. The laser beam is directed onto overlapping regions of the material.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: March 30, 2010
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Hye-Hyang Park, Ki-Yong Lee
  • Patent number: 7687334
    Abstract: One aspect of the present invention relates to a method for fabricating a polycrystalline silicon film. In one embodiment, the method includes the steps of providing a substrate having a thermally-grown silicon dioxide layer, forming an amorphous silicon film on the thermally-grown silicon dioxide layer of the substrate, forming an aluminum layer on the amorphous silicon film to form a structure having the substrate, the amorphous silicon film and the aluminum layer, and annealing the structure at an annealing temperature for a period of time in an N2 environment with a ramp-up time to crystallize the amorphous silicon film to form a polycrystalline silicon film.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: March 30, 2010
    Assignee: Board of Trustees of the University of Arkansas
    Inventors: Min Zou, Li Cai, William David Brown
  • Publication number: 20100075487
    Abstract: To crystallize a material, a thin layer of amorphous or polycrystalline material is deposited on at least one area of the surface of a top part of a substrate. A metal layer is then deposited on at least one area of the thin layer. Thermal treatment is then performed to enable crystalline growth of the material of the thin layer, resulting in: a rapid temperature increase of the top part of the substrate until liquid or overmelted liquid state is achieved, and heat transfer from the interface between the top part of the substrate and the thin layer to the interface between the thin layer and the metal layer.
    Type: Application
    Filed: November 28, 2008
    Publication date: March 25, 2010
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE
    Inventor: Philippe Bouchut
  • Patent number: 7678621
    Abstract: Disclosed are a crystallization pattern, and a method for crystallizing amorphous silicon. The method includes the steps of forming an amorphous silicon film on a glass substrate, forming a crystallization pattern by patterning the amorphous silicon film, and crystallizing the crystallization pattern into polycrystalline silicon by irradiating a laser onto the crystallization pattern. The crystallization pattern includes a peripheral region located within a first distance from an edge of the crystallization pattern, and an internal region located away from the edge of the crystallization pattern by more than the first distance. The internal region is divided into at least one sub-region, each sub-region includes one crystallization inducement pattern, and an edge of each sub-region is located within a second distance from the crystallization inducement pattern.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: March 16, 2010
    Assignee: Hydis Technologies, Co., Ltd
    Inventors: Myung Kwan Ryu, Eok Su Kim, Kyoung Seok Son, Jang Soon Im
  • Patent number: 7678666
    Abstract: A layer structure comprising substrate, a metal layer, a first amorphous silicon layer, an insulating layer, and a second amorphous silicon layer, and a method of crystallizing the second amorphous silicon layer by irradiating single pulse laser to the layer structure are provided. The method provides an effect of forming large grain of amorphous silicon as good as using dual pulse laser or higher just by using single pulse laser without additional optical system. A semiconductor device employing the layer structure maximizes an electron mobility.
    Type: Grant
    Filed: May 9, 2006
    Date of Patent: March 16, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Ki Bong Song, Jun Ho Kim
  • Patent number: 7666767
    Abstract: A mask for sequential lateral solidification (SLS) process with at least one transparency region is provided. The transparent region is defined by two lengthwise edges, a front edge, and a rear edge. The two lengthwise edges also define a quadrilateral. The front edge is located outside the quadrilateral, and the rear edge is located inside the quadrilateral.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: February 23, 2010
    Assignee: AU Optronics Corp.
    Inventor: Ming-Wei Sun
  • Publication number: 20100041220
    Abstract: Methods for uniformly optically annealing regions of a semiconductor substrate and methods for fabricating semiconductor substrates using uniform optical annealing are provided. In accordance with an exemplary embodiment, a method for uniformly optically annealing a semiconductor substrate comprises the step of obtaining an optical reflectance of a first region of the semiconductor substrate. A second region of the semiconductor substrate is fabricated such that the optical reflectance of the second region is substantially equal to the optical reflectance of the first region, wherein the first region is not the second region. The semiconductor substrate is optically annealed.
    Type: Application
    Filed: August 12, 2008
    Publication date: February 18, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventor: Harry J. LEVINSON
  • Patent number: 7662677
    Abstract: A semiconductor device is fabricated by forming a first crystalline region by irradiating a laser beam to a first region of an amorphous semiconductor film by relatively moving the laser beam with respect to the first region of the amorphous semiconductor film. A second crystalline region is formed by irradiating the laser beam to a second region of the amorphous semiconductor film including a portion of the first crystalline region by relatively moving the laser beam with respect to the second region of the amorphous semiconductor film. The wavelength of the laser beam falls in a range of 370 nm through 650 nm. In general, crystalline performance of the first crystalline region, the second crystalline region, and a region of overlap between the first crystalline region and the second crystalline region are the same.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: February 16, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Koichiro Tanaka
  • Publication number: 20100024865
    Abstract: A continuous coating installation is disclosed. The installation includes a vacuum chamber having a supply opening for supplying a substrate to be coated and a discharge opening for discharging the coated substrate. The installation also includes a physical vapour deposition device for coating a surface of the substrate, and a laser crystallization system for simultaneously illuminating at least one sub-partial area of a currently coated partial area of the surface of the substrate with at least one laser beam. The installation further includes a transport device for transporting the substrate in a feedthrough direction from the supply opening to the discharge opening and for continuously or discontinuously moving the substrate during the coating thereof in the feedthrough direction.
    Type: Application
    Filed: August 11, 2009
    Publication date: February 4, 2010
    Applicants: CARL ZEISS LASER OPTICS GMBH, CARL ZEISS SMT AG
    Inventors: Arvind Shah, Horst Schade, Holger Muenz, Martin Voelcker, Michael Schall, Matthias Krantz
  • Patent number: 7655513
    Abstract: After crystallization of a semiconductor film is performed by irradiating first laser light (energy density of 400 to 500 mJ/cm2) in an atmosphere containing oxygen, an oxide film formed by irradiating the first laser light is removed. It is next performed to irradiate second laser light under an atmosphere that does not contain oxygen (at a higher energy density than that of the first laser light irradiation), thus to increase the flatness of the semiconductor film.
    Type: Grant
    Filed: November 6, 2007
    Date of Patent: February 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Setsuo Nakajima, Hidekazu Miyairi
  • Patent number: 7651955
    Abstract: Embodiments of the invention generally provide a method for depositing films or layers using a UV source during a photoexcitation process. The films are deposited on a substrate and usually contain a material, such as silicon (e.g., epitaxy, crystalline, microcrystalline, polysilicon, or amorphous), silicon oxide, silicon nitride, silicon oxynitride, or other silicon-containing materials. The photoexcitation process may expose the substrate and/or gases to an energy beam or flux prior to, during, or subsequent a deposition process. Therefore, the photoexcitation process may be used to pre-treat or post-treat the substrate or material, to deposit the silicon-containing material, and to enhance chamber cleaning processes.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: January 26, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Joseph M. Ranish, Kaushal K. Singh
  • Patent number: 7651931
    Abstract: The laser beam projection mask 14 has three rectangular-shaped slits 25, 26, 27 as transmission areas. These three slits 25, 26, 27 are formed in sequence in X direction shown by an arrow X in FIG. 2C at specified intervals, and the width in the X direction decreases in the order of the slit 25, the slit 26 and the slit 27. More particularly, transmission coefficients of the transmission areas change in conformity with a temperature distribution curve V1 of a silicon film 4 shown in FIG. 2B.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: January 26, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichiro Nakayama, Masanori Seki, Hiroshi Tsunasawa, Yoshihiro Taniguchi
  • Patent number: 7649206
    Abstract: A sequential lateral solidification (SLS) mask comprises a plurality of parallelizing repeat patterns. Each of the patterns further comprises a major symmetrical axis and a short axis, and each of the patterns is also composed of first units and second units, in which both the first unit and the second unit comprise respectively a plurality of light transmitting portions and light absorption portions. The first units are positioned in mirror symmetry to the second units via the major symmetrical axis.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: January 19, 2010
    Assignee: AU Optronics Corp.
    Inventors: Mao-Yi Chang, Chih-Hsiung Chang
  • Publication number: 20100009523
    Abstract: A mask includes a primary opaque pattern and a number of clusters of secondary opaque patterns. The primary opaque pattern defines a number of strip transparent slits whose extending directions are substantially the same. The clusters of the secondary opaque patterns are connected to the primary opaque pattern, and each of the clusters of the secondary opaque patterns is disposed in one of the transparent slits, respectively. Each of the clusters of the secondary opaque patterns includes a number of secondary opaque patterns, and extending directions of at least a portion of the secondary opaque patterns and the extending directions of the transparent slits together form included angles that are not equal to about 90°.
    Type: Application
    Filed: September 22, 2008
    Publication date: January 14, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventor: Ming-Wei Sun
  • Publication number: 20100006853
    Abstract: An electronic device includes: a substrate; and a plurality of thin film transistors disposed in lines at least in one direction in terms of planar view when viewed from one principal surface of the substrate; each of the plurality of thin film transistors including a preliminary heating layer on the substrate, an insulating layer on the preliminary heating layer, and a thin film semiconductor layer a part of which overlaps the preliminary heating layer through the insulating film, wherein a portion of the preliminary heating layer other than the portion overlapping the thin film semiconductor layer has a planar shape which is line-symmetrical with respect to an axis extending in a direction perpendicularly intersecting the one direction.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 14, 2010
    Applicant: SONY CORPORATION
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Publication number: 20090321739
    Abstract: The present invention relates to an array substrate for a flat display device and a method for fabricating the same, in which a number of masks is reduced for reducing a cost and improving a device performance.
    Type: Application
    Filed: December 11, 2008
    Publication date: December 31, 2009
    Inventors: Sung Ki Kim, Hong Koo Lee
  • Publication number: 20090317961
    Abstract: The inhomogeneous energy distribution at the beam spot on the irradiated surface is caused by a structural problem and processing accuracy of the cylindrical lens array forming an optical system. According to the present invention, in the optical system for forming a rectangular beam spot, an optical system for homogenizing the energy distribution of the shorter side direction of a rectangular beam spot of a laser light on an irradiated surface is replaced with a light guide. The light guide is a circuit that can confine emitted beams in a certain region and guide and transmit its energy flow in parallel with the axis of a path thereof.
    Type: Application
    Filed: August 28, 2009
    Publication date: December 24, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Koichiro TANAKA
  • Patent number: 7635656
    Abstract: A method for configuring J electromagnetic radiation sources (J?2) to serially irradiate a substrate. Each source has a different function of wavelength and angular distribution of emitted radiation. The substrate includes a base layer and I stacks (I?2; J?I) thereon. Pj denotes a same source-specific normally incident energy flux on each stack from source j. in each of I independent exposure steps, the I stacks are concurrently exposed to radiation from the J sources, Vi and Si respectively denote an actual and target energy flux transmitted into the substrate via stack i in exposure step i (i=1, . . . , I). t(i) and Pt(i) are computed such that: Vi is maximal through deployment of source t(i) as compared with deployment of any other source for i=1, . . . , I; and an error E being a function of |V1?S1|, |V2?S2|, . . . , |Vi?Si| is about minimized with respect to Pi (i=1, . . . , I).
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: December 22, 2009
    Assignee: International Business Machines Corporation
    Inventors: Brent Alan Anderson, Edward Joseph Nowak
  • Publication number: 20090311880
    Abstract: A thermal processing apparatus and method in which a first laser source, for example, a CO2 emitting at 10.6 ?m is focused onto a silicon wafer as a line beam and a second laser source, for example, a GaAs laser bar emitting at 808 nm is focused onto the wafer as a larger beam surrounding the line beam. The two beams are scanned in synchronism in the direction of the narrow dimension of the line beam to create a narrow heating pulse from the line beam when activated by the larger beam. The energy of GaAs radiation is greater than the silicon bandgap energy and creates free carriers. The energy of the CO2 radiation is less than the silicon bandgap energy so silicon is otherwise transparent to it, but the long wavelength radiation is absorbed by the free carriers.
    Type: Application
    Filed: August 24, 2009
    Publication date: December 17, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Dean JENNINGS, Haifan LIANG, Mark YAM, Vijay PARIHAR, Abhilash J. MAYUR, Aaron HUNTER, Bruce ADAMS, Joseph Michael RANISH
  • Patent number: 7629207
    Abstract: A method of manufacturing a bottom gate thin film transistor (“TFT”) in which a polycrystalline channel region having a large grain size is formed relatively simply and easily. The method of manufacturing a bottom gate thin film transistor includes forming a bottom gate electrode on a substrate, forming a gate insulating layer on the substrate to cover the bottom gate electrode, forming an amorphous semiconductor layer, an N-type semiconductor layer and an electrode layer on the gate insulating layer sequentially, etching an electrode region and an N-type semiconductor layer region formed on the bottom gate electrode sequentially to expose an amorphous semiconductor layer region, melting the amorphous semiconductor layer region using a laser annealing method, and crystallizing the melted amorphous semiconductor layer region to form a laterally grown polycrystalline channel region.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: December 8, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyuck Lim, Young-soo Park, Wenxu Xianyu, Young-kwan Cha
  • Publication number: 20090294769
    Abstract: According to a method of manufacturing a semiconductor device of the present invention, a gate electrode is formed above a substrate, and a insulating film is formed above the gate electrode. Then, an amorphous semiconductor film is formed above the insulating film, laser annealing is performed on the amorphous semiconductor film, and the amorphous semiconductor film is changed to a crystalline semiconductor film. After that, hydrofluoric acid processing is performed on the crystalline semiconductor film, and an amorphous semiconductor film is formed above the crystalline semiconductor film where the hydrofluoric acid processing is performed so that pattern ends of the amorphous semiconductor film are arranged outside pattern ends of the crystalline semiconductor film and the amorphous semiconductor film contacts with the insulating film near the pattern ends.
    Type: Application
    Filed: May 21, 2009
    Publication date: December 3, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Tomoyuki IRIZUMI
  • Patent number: 7618852
    Abstract: The present invention provides a phase transition method of an amorphous material, comprising steps of: depositing the amorphous material on a dielectric substrate; forming a cap layer on the amorphous material; depositing a metal on the cap layer; and crystallizing the amorphous material. According to the present invention, the surface of the amorphous material is protected by the cap layer, so that clean surface can be obtained and the roughness of the surface can be remarkably reduced during thermal process and sample handling. In addition, the cap layer is disposed between the amorphous material and the metal to diffuse the metal, so that the metal contamination due to the direct contact of the metal and the amorphous material in the conventional method can be remarkably reduced.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: November 17, 2009
    Assignee: Silicon Display Technology Co., Ltd.
    Inventors: Jin Jang, Jonghyun Choi, Do-Young Kim, Byoung-Kwon Choo
  • Patent number: 7615502
    Abstract: A method to laser anneal a silicon stack (or a silicon-rich alloy) including a heavily doped region buried beneath an undoped or lightly doped region is disclosed. By F selecting laser energy at a wavelength that tends to be transmitted by crystalline silicon and absorbed by amorphous silicon, crystallization progresses through the silicon layers in a manner that minimizes or prevents diffusion of dopants upward from the doped region to the undoped or lightly doped region. In preferred embodiments, the laser energy is pulsed, and a thermally conductive structure beneath the heavily doped layer dissipates heat, helping to control the anneal and limit dopant diffusion.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: November 10, 2009
    Assignee: Sandisk 3D LLC
    Inventor: Shuo Gu
  • Publication number: 20090269868
    Abstract: Optoelectronic devices are provided that incorporate quantum dots as the electroluminescent layer in an inorganic wide-bandgap heterostructure. The quantum dots serve as the optically active component of the device and, in multilayer quantum dot embodiments, facilitate nanoscale epitaxial lateral overgrowth (NELOG) in heterostructures having non-lattice matched substrates. The quantum dots in such devices will be electrically pumped and exhibit electroluminescence, as opposed to being optically pumped and exhibiting photoluminescence. There is no inherent “Stokes loss” in electroluminescence thus the devices of the present invention have potentially higher efficiency than optically pumped quantum dot devices. Devices resulting from the present invention are capable of providing deep green visible light, as well as, any other color in the visible spectrum, including white light by blending different sizes and compositions of the dots and controlling manufacturing processes.
    Type: Application
    Filed: June 25, 2009
    Publication date: October 29, 2009
    Applicant: DOT METRIC TECHNOLOGY, INC.
    Inventors: Edward B. Stokes, Mohamed-Ali Hasan, Karmal Sunderasan, Jennifer G. Pagan
  • Patent number: 7608865
    Abstract: A method of fabricating a T-gate HEMT with a club extension comprising the steps of: providing a substrate; providing a bi-layer resist on the substrate; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to a T-gate opening; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to the shape of the club extension wherein the area corresponding to the club extension is approximately 1 micron to an ohmic source side of a T-gate and approximately 0.5 microns forward from a front of the T-gate; developing out the bi-layer resist in the exposed area that corresponds to the T-gate opening; developing out the bi-layer resist in the exposed area that corresponds to the club extension; and forming the T-gate and club extension through a metallization process.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: October 27, 2009
    Assignee: Northrop Grumman Space & Mission Systems Corp.
    Inventors: Carol Osaka Namba, Po-Hsin Liu, Ioulia Smorchkova, Michael Wojtowicz, Robert Coffie, Yaochung Chen
  • Patent number: 7595208
    Abstract: A thermal processing apparatus and method in which a first laser source, for example, a CO2 emitting at 10.6 ?m is focused onto a silicon wafer as a line beam and a second laser source, for example, a GaAs laser bar emitting at 808 nm is focused onto the wafer as a larger beam surrounding the line beam. The two beams are scanned in synchronism in the direction of the narrow dimension of the line beam to create a narrow heating pulse from the line beam when activated by the larger beam. The energy of GaAs radiation is greater than the silicon bandgap energy and creates free carriers. The energy of the CO2 radiation is less than the silicon bandgap energy so silicon is otherwise transparent to it, but the long wavelength radiation is absorbed by the free carriers.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: September 29, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Dean Jennings, Haifan Liang, Mark Yam, Vijay Parihar, Abhilash Mayur, Aaron Hunter, Bruce Adams, Joseph Michael Ranish
  • Patent number: 7585709
    Abstract: A display panel including a pixel array region. The pixel array region includes a plurality of pixel cells disposed in a matrix configuration. Each pixel cell has an active device. A relative position of a first active device in a first pixel cell among the pixel cells is different from that of a second active device in a second pixel cell among the pixel cells.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: September 8, 2009
    Assignee: Au Optronics Corp.
    Inventors: Wei-Pang Huang, Shih-Lung Chen