Abstract: Embodiments of the present invention provide a two-phase process for searching the root causes of the yield loss in the production line 100. In a first phase, process tools and their process tool types that are likely to cause the yield loss are identified, and in a second phase, the process parameters that are likely to cause the yield loss within the process tool types found in the first phase are identified. In each phase, two different algorithms can be used to generate a reliance index (RIk) for gauge the reliance levels of their search results.

Abstract: There is provided a configuration that includes a device-status-monitoring controller that stores, in a storage section, device data generated by the apparatus; an analysis-support controller that acquires the device data related to abnormality analysis information from the storage section based on basic information that includes: information that defines an abnormal event, at least one of the device data corresponding to the abnormal event, and step information indicating a step where the at least one of the device data is generated; and recipe-specific information that includes at least a recipe name; and a display device that displays the device data related to the abnormality analysis information in a manner that goes back to a past time from a time when a latest recipe specified by the recipe name is executed.

Abstract: System and methods are described for a monitoring system to monitor operations of a distributed computing system and provide feedback to subscribers. The monitoring system includes a data collection engine to receive data items comprising events, metrics, or one or more configurations about a distributed computing system being monitored, and to store selected data items into a message queue. The monitoring system also includes a data processing engine to receive the selected data items from the queue, transform the selected data items into transformed data items based at least in part on one or more settings for a subscriber and the one or more configurations of the distributed computing system, and store the transformed data items into one or more of a database and a cache.

Abstract: A device includes image generation circuitry and a convolutional neural network. The image generation circuitry, in operation, generates a binned representation of a wafer defect map (WDM). The convolutional-neural-network, in operation, generates and outputs an indication of a root cause of a defect associated with the WDM based on the binned representation of the WDM and a data-driven model associating WDMs with classes of a defined set of classes of wafer defects.

Abstract: A controller includes a control operation unit that cyclically performs a control operation for controlling a control target, a data generator that generates data showing a chronological change in a value associated with a control target, and an analyzer that analyzes the data and outputs an analysis result in a predetermined analysis target period. The analysis target period includes a plurality of sections. The data generator sequentially outputs section data showing a chronological change in a value for each of the plurality of sections in the analysis target period. The analyzer analyzes the sequentially output section data for each section. When an analysis of section data for a section in the analysis target period shows a predefined result, the analyzer eliminates an analysis of section data for one or more sections in the analysis target period that are subsequent to the section for which the analysis shows the predefined result.

Abstract: Provided is a method of preparing a sample surface on which a marking is formed, wherein the marking is a local oxide film locally formed on the sample surface, the local oxide film is formed by applying voltage between a probe and the sample surface while a tip of the probe is in contact with the sample surface, and the probe is brought into contact with the sample surface after moisture supply.

Abstract: Described herein are methods and systems for chamber matching in a manufacturing facility. A method may include receiving a first chamber recipe advice for a first chamber and a second chamber recipe advice for a second chamber. The chamber recipe advices describe a set of tunable inputs and a set of outputs for a process. The method may further include adjusting at least one of the set of first chamber input parameters or the set of second chamber input parameters and at least one of the set of first chamber output parameters or the set of second chamber output parameters to substantially match the first and second chamber recipe advices.

Abstract: Provided is a semiconductor structure including a substrate, an interconnect structure, a pad, a protective layer, and a bonding structure. The interconnect structure is disposed over the substrate. The pad is disposed over and electrically connected to the interconnect structure. A top surface of the pad has a probe mark and the probe mark has a concave surface. The protective layer conformally covers the top surface of the pad and the probe mark. The bonding structure is disposed over the protective layer. The bonding structure includes a bonding dielectric layer and a first bonding metal layer penetrating the bonding dielectric layer and the protective layer to electrically connect to the pad. A method of manufacturing the semiconductor structure is also provided.

Abstract: Method and machine utilizes the real-time recipe to perform weak point inspection on a series of wafers during the fabrication of integrated circuits. Each real-time recipe essentially corresponds to a practical fabrication history of a wafer to be examined and/or the examination results of at least one examined wafer of same “lot”. Therefore, different wafers can be examined by using different recipes where each recipe corresponds to a specific condition of a wafer to be examined, even these wafers are received by a machine for examining at the same time.

Abstract: A stochastic calculation engine receives inputs from a semiconductor inspection tool or semiconductor review tool. The stochastic calculation engine determines abnormal locations and pattern variation from the inputs and determines stochastic failures from the inputs. An electronic data storage unit connected with the stochastic calculation engine can include a database with known stochastic behavior and known process metrology variations. The stochastic calculation engine can flag stochastic features, determine a failure rate, or determine fail probability.

Abstract: At the boundary where the number of effective chips changes, at least three grid points of a chip grid intersect with the periphery of a wafer effective region, and a triangle connecting these three grid points together includes therein the wafer center. To design a semiconductor chip, this feature is used to determine, by an analytic process, candidate solutions including different numbers of effective chips. These candidate solutions are used to derive an advantageous solution.

Abstract: A variety of techniques are disclosed for visual and functional augmentation of a three-dimensional printer.

Abstract: In a method for manufacturing a multilayer capacitor, a multilayer capacitor main body includes first and second main surfaces, first and second side surfaces, and first and second end surfaces, the first and second main surfaces extending in a length direction and a width direction, the first and second side surfaces extending in the length direction and a thickness direction, and the first and second end surfaces extending in the width direction and the thickness direction. The second main surface is depressed in a portion extending from opposite ends of the second main surface toward a center of the second main surface in the length direction.

Abstract: A method for producing a scaled-up solid model of microscopic features of a selected surface. A selected surface on a piece of metal exposed to friction, for example, is scanned with a profilometer along X, Y, and Z coordinates to obtain measurements of surface features. A 3-D high resolution spatial map of the surface features is made and the X, Y, and Z measurements are scaled up as desired. The spatial map is transposed into a high resolution 3-D scaled-up meshed surface. A data set of printing instructions is made from the 3-D scaled-up meshed surface acceptable for use in a 3-D printer. A solid scaled-up model of the selected surface is manufactured in the 3-D printer in any desired size using the printing instructions. The method provides a physical hand-held model of the selected surface that can be used to demonstrate accurately the effectiveness of lubrication and anti-friction products, both visually and by touch.

Abstract: Embodiments of semiconductor structures for wafer flatness control and methods for using and forming the same are disclosed. In an example, a model indicative of a flatness difference of a wafer between a first direction and a second direction is obtained. The flatness difference is associated with one of a plurality of fabrication stages of a plurality of semiconductor devices on a front side of the wafer. A compensation pattern is determined for reducing the flatness difference based on the model. At the one of the plurality of the fabrication stages, a compensation structure is formed on a backside opposite to the front side of the wafer based on the compensation pattern to reduce the flatness difference.

Abstract: A mask weak pattern recognition apparatus and a mask weak pattern recognition method are provided. The mask weak pattern recognition apparatus includes a receiving unit, an overlapping unit, an analyzing unit and a training unit. The receiving unit is used for receiving a mask layout and an inspection image of a mask. The overlapping unit is used for overlapping the mask layout and the inspection image to obtain an overlapped image. The analyzing unit is used for obtaining a plurality of risk patterns and a plurality of risk scores each of which corresponds one of the risk patterns according to the overlapped image. The training unit is used for training a recognition model according to the risk patterns and the risk scores.

Abstract: A method for the determination and correction of background signals in a spectrum, consisting of signals of a plurality of spectral points, characterized by the steps of: Calculating at least three statistic or analytic functions of the signal values of the spectrum, attributing probabilities Pi(band) for the presence of bands to each point in each of the calculated functions: Adding the probabilities Pi(band) up to an overall probability ?Pi(band) from all calculated functions for each point; calculating a probability P(background) for the presence of background for each point in the spectrum from said overall probability ?Pi(band) according to P(background)=1??Pi(band) wherein negative values are set to zero; and calculating a fit of the signal values at all points of the original spectrum wherein the signal in each point is taken into account in the fit only with the respective probability for the presence of background P(background), and subtraction of the background function determined in such a way from

Abstract: The present disclosure provides a system and a method for quickly diagnosing, classifying, and sampling in-line defects based on a CAA pre-diagnosis database. The method includes the steps of obtaining a design layout of an object and a defect data of an important process stage of the object, obtaining a pre-diagnosis data group related to the design layout from a CAA pre-diagnosing database, and judging a killer defect index and a failure risk level of the defect data according to the pre-diagnosis data group.

Abstract: An imaging and analysis system for a component of a rotary machine includes an image capture device operable to capture image data from at least one selected type of electromagnetic radiation that is at least one of reflected from and transmitted through the component. The system also includes an image processor configured to generate processed data from the captured image data. The system further includes a control system configured to automatically identify a condition of the component by comparing the processed data to stored reference data. The reference data is stored in a format that enables direct comparison to the processed data.

Abstract: Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures are provided. In some embodiments methods may include contacting a substrate with a first reactant comprising a transition metal precursor, contacting the substrate with a second reactant comprising a niobium precursor and contacting the substrate with a third reactant comprising a nitrogen precursor. In some embodiments related semiconductor device structures may include a semiconductor body and an electrode comprising a transition metal niobium nitride disposed over the semiconductor body.

Abstract: An apparatus and method for determining a target adjustment route for a preset control condition set of a production line are provided. The apparatus establishes at least one candidate adjustment route for the preset control condition set according to the historical control condition sets. Each candidate adjustment route includes at least one adjustment control condition set arranged in an adjustment order. Each adjustment control condition set is one of the historical control condition sets. Within the same candidate adjustment route, the historical yield related values corresponding to the adjustment control condition sets are all greater than the preset yield related value and increase in the adjustment order. Within the same candidate adjustment route, the numbers of the adjustment control condition(s) included in the adjustment sets increase in the adjustment order. The apparatus selects one of the candidate adjustment route(s) as the target adjustment route.

Abstract: A method for demand response dispatch having validation, estimation, and editing (VEE) rules for performing VEE on interval-based energy consumption streams, includes providing tagged energy consumption data sets having groups of contiguous interval values that correspond to correct data; for the each of the tagged energy consumption data sets, creating anomalies having different durations using only the groups; generating estimates for the anomalies by employing estimation techniques; selecting a corresponding one of the estimation techniques for subsequent employment; receiving post VEE readings and forecasted outside temperatures and estimating future cumulative energy consumption of facilities, and predicting a reception time for a demand response program event when the cumulative energy consumption exceeds a specified threshold; and preparing actions to control each of the facilities to optimally shed energy specified in a dispatch order, and optimally shedding the energy upon reception of the dispatch o

Abstract: Various aspects of the disclosed technology relate to training and applying a machine learning model for defect pattern detection. Defect pattern variants of one or more defect patterns are generated. The one or more defect patterns are extracted from wafer maps of wafers having at least systematic defects. Each of the generated defect pattern variants is superimposed on wafer maps of wafers having no systematic defects to generate positive training data of wafer maps, which are included in a training dataset. Based on the training dataset, a trained machine-learning model for recognizing known defect patterns on wafer maps is derived.

Abstract: The present disclosure relates to a semiconductor device, an operation method of a semiconductor device, and a manufacturing method of a semiconductor device which are capable of minimizing influence of a gate length variation on a circuit characteristic and increasing a good product ratio (yield) in a product sorting test. A ring oscillator configured such that the plurality of inverters is connected in a ring-like form, and gate capacitors of the transistors are connected to respective output terminals of the plurality of inverters as a load capacitor outputs an oscillating signal, the ring oscillator is configured with a plurality of transistors having the same gate length, and at least two or more ring oscillators including a plurality of transistors having different gate lengths are configured.

Abstract: Methods and systems for creating a sample of defects for a specimen are provided. One method includes detecting defects on a specimen based on output generated by a detector of an output acquisition subsystem. For the defects detected in an array region on the specimen, where the array region includes multiple array cell types, the method includes stacking information for the defects based on the multiple array cell types. The stacking includes overlaying design information for only a first of the multiple array cell types with the information for only the defects detected in the first of the multiple array cell types. In addition, the method includes selecting a portion of the detected defects based on results of the stacking thereby creating a sample of the detected defects.

Abstract: Embodiments include method, systems and computer program products for designing physical devices using an iterative floorplan methodology. The method creating, using a processor, a rough floorplan, wherein the rough floorplan includes one or more tiles and estimates for one or more components associated with the floorplan. The processor converts the estimates for the one or more components to stresses and displacements/distortions associated with the one or more tiles. The processor further generates distortion data from the displacements/distortions associated with the one or more tiles. The processor further compares the distortion data to a threshold. The processor further creates a finalized floorplan based on the rough floorplan in response to the distortion data being below the threshold.

Abstract: Improved processes for manufacturing wafers, chips, or dies utilize in-line data obtained from non-contact electrical measurements (“NCEM”) of fill cells that contain structures configured target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes. Such processes may involve evaluating Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).

Abstract: The present disclosure provides a method, computer program product, and system of document implementation tool for pcb refinement. In some embodiments, the system includes a current data object with at least a PCB design, a PCB data store, a feature identifier configured to identify one or more features in at least the current PCB design, a comparison engine, configured to compare features in the current PCB design and known features in the PCB data store, a classification engine configured to classify one or more discrepancies between the current PCB design and the PCB data store based on a size of each of the one or more discrepancies, a determination engine configured to determine changes needed to resolve the one or more discrepancies, and a reporting engine configured to report the one or more discrepancies to a user.

Abstract: The present disclosure provides a method, computer program product, and system of document implementation tool for pcb refinement. In some embodiments, the system includes a current data object with at least a current PCB design, a printed circuit board (PCB) data store, where the plurality of data objects has known features, a feature identifier configured to identify one or more features in at least the current PCB design, a comparison engine, configured to compare features in the current PCB design and known features in the PCB data store that have been linked to one or more manufacturing defects, a classification engine configured to classify one or more feature between the current PCB design and the PCB data store, a determination engine configured to determine one or more changes in the current PCB design likely to decrease an occurrence of a manufacturing defect.

Abstract: A technique to prevent reduction in throughput of a substrate processing apparatus. On the occurrence of an event disabling execution of a recipe by a processing unit, a different recipe executed by this processing unit may be used depending on the type of event having occurred. The type of event to occur and a substitute recipe that can take the place of a recipe being executed are associated in advance. On the occurrence of abnormality, it is determined whether or not a recipe being executed can be substituted by a different recipe. If the recipe can be substituted, it is determined whether or not the substitute recipe is contained in an unfinished job. If these conditions are satisfied, a substrate processing schedule is changed to execute the substitute recipe in this processing unit. If these conditions are not satisfied, substrate process in this processing unit is stopped.

Abstract: A diagnostic system implements a network including two or more sub-domains. Each sub-domain has diagnostic information extracted by analysis of object data, the object data representing one or more parameters measured in relation to a set of product units that have been subjected nominally to the same industrial process as one another. The network further has at least one probabilistic connection from a first variable in a first diagnostic sub-domain to a second variable in a second diagnostic sub-domain. Part of the second diagnostic information is thereby influenced probabilistically by knowledge within the first diagnostic information. Diagnostic information may include, for example, a spatial fingerprint observed in the object data, or inferred. The network may include connections within sub-domains. The network may form a directed acyclic graph, and used for Bayesian inference operations.

Abstract: It is an object of the present invention to provide a semiconductor inspection apparatus capable of well carrying out position alignment and correctly determining whether the position alignment has been carried out successfully or has ended in a failure without operator interventions even if an inspected image is an image having few characteristics as is the case with a repetitive pattern or the inspected image is an image having a complicated shape.

Abstract: A method includes receiving, into a measurement tool, a substrate having a material feature, wherein the material feature is formed on the substrate according to a design feature. The method further includes applying a source signal on the material feature, collecting a response signal from the material feature by using a detector in the measurement tool to obtain measurement data, and with a computer connected to the measurement tool, calculating a simulated response signal from the design feature. The method further includes, with the computer, in response to determining that a difference between the collected response signal and the simulated response signal exceeds a predetermined value, causing the measurement tool to re-measure the material feature.

Abstract: A system for enabling and disabling operation of manufacturing machines provides a manufacturing machine user interface that facilitates receiving quality control information regarding the manufacturing machine from a user. For quality assurance purposes, the computer system of the manufacturing machine may decide whether to enable operation of the manufacturing machine based on the received quality control information. The computer system of the manufacturing machine may also decide to disable operation of the manufacturing machine if the quality control information provided is incomplete, out of date, or otherwise insufficient to indicate the manufacturing machine is ready for safe and effective operation.

Abstract: A method for making integrated circuit (IC) packages includes providing a leadframe strip having a plurality of leadframe units and providing the leadframe strip to an operating station. The operating station is operable to perform one or more tests on the plurality of leadframe units in the making of IC packages. The method includes obtaining a database that has the locations of leadframe units in the leadframe strip stored in the database. The method also includes performing the one or more tests on the plurality of leadframe units and updating the database in response to the results of the testing.

Abstract: Methods and systems for determining parameter(s) of a process to be performed on a specimen are provided. One system includes one or more computer subsystems configured for determining an area of a defect detected on a specimen. The computer subsystem(s) are also configured for correlating the area of the defect with information for a design for the specimen and determining a spatial relationship between the area of the defect and the information for the design based on results of the correlating. In addition, the computer subsystem(s) are configured for automatically generating a region of interest to be measured during a process performed for the specimen with a measurement subsystem based on the spatial relationship.

Abstract: A system, method and computer program product for sorting Integrated Circuits (chips), particularly microprocessor chips, and particularly that predicts chip performance or power for sorting purposes. The system and method described herein uses a combination of performance-predicting parameters that are measured early in the process, and applies a unique method to project where the part, e.g., microprocessor IC, will eventually be sorted. Sorting includes classifying the IC product to a subset of a family of products with the product satisfying certain performance characteristics or specifications, in the early stages of manufacturing, e.g., before the end product is fully fabricated.

Abstract: A glass panel for a wiring board, includes a first surface and a second surface, the second surface being opposite to the first surface; and an alignment mark constituted by a plurality of through holes each penetrating the glass panel from the first surface to the second surface, at least one of the plurality of through holes being configured such that a first diameter “t1” of a first opening at the first surface, a second diameter “t2” of a second opening at the second surface, and a minimum diameter “t3” between the first surface and the second surface satisfy t1>t3 and also t2>t3.

Abstract: An apparatus is provided for configuring validation, estimation, and editing (VEE) rules for performing VEE on a plurality of interval based energy consumption streams. The apparatus includes a post VEE readings data stores and a rules processor. The post VEE readings data stores provides a plurality of tagged energy consumption data sets that are each associated with a corresponding one of the plurality of interval based energy consumption streams. Each of the plurality of tagged energy consumption data sets has first groups of contiguous interval values tagged as having been validated and second groups of contiguous interval values tagged as having been edited.

Abstract: According to one embodiment, a production support system for supporting a production method for a product to which a model number is allocated in a course of production. The system includes a predicted model number calculation unit which to calculate a predicted model number for a work-in-process to which the model number is not allocated, on the basis of information about the work-in-process to which the model number is not allocated in the course of production, a requirement of the model number that is found in advance, and model number allocation condition information.

Abstract: Manufacturing a device may include inspecting a surface of an inspection target device. The inspecting may include forming a metal layer on a surface of the inspection target device on which a minute pattern is formed, directing a beam of light to be incident and normal to the surface of the inspection target device, determining a spectrum of light reflected from the surface of the inspection target device, and generating, via the spectrum, information associated with a structural characteristic of the minute pattern formed on the inspection target device. The inspection target device may be selectively incorporated into the manufactured device based on the generated information.

Abstract: We disclose herein a method for testing a batch of environmental sensors to determine the fitness for purpose of the batch of environmental sensors, the method comprising: performing a plurality of electrical test sequences to the sensor inputs of the batch of environmental sensors to measure electrical responses of the sensor outputs of the batch of environmental sensors; correlating the measured electrical responses from the batch of environmental sensors to predetermined environmental parametric ranges of at least one environmental sensor so as to define correlated electrical test limits; and determining the fitness for purpose of the batch of environmental sensors if the measured electrical responses are within the correlated electrical test limits.

Abstract: A method for manufacturing a multi-layer MEMS component includes: providing a multi-layer substrate that has a monocrystalline carrier layer, a monocrystalline functional layer having a front side and a back side, and a bonding layer located between the back side and the carrier layer; growing a first polycrystalline layer over the front side of the monocrystalline functional layer; removing the monocrystalline carrier layer; and growing a second polycrystalline layer over the back side of the monocrystalline functional layer.

Abstract: Methods and systems for determining band structure characteristics of high-k dielectric films deposited over a substrate based on spectral response data are presented. High throughput spectrometers are utilized to quickly measure semiconductor wafers early in the manufacturing process. Optical models of semiconductor structures capable of accurate characterization of defects in high-K dielectric layers and embedded nanostructures are presented. In one example, the optical dispersion model includes a continuous Cody-Lorentz model having continuous first derivatives that is sensitive to a band gap of a layer of the unfinished, multi-layer semiconductor wafer. These models quickly and accurately represent experimental results in a physically meaningful manner. The model parameter values can be subsequently used to gain insight and control over a manufacturing process.

Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.

Abstract: A method for execution by dispersed storage network (DSN) monitoring unit that includes a processor includes receiving configuration parameters via an interface of the DSN monitoring unit. A configuration update request is generated for transmission to a plurality of managing units based on the configuration parameters. Collected storage unit data is received from each of the plurality of managing units. Aggregated storage statistics are generated based on the collected storage unit data received from each of the plurality of managing units.

Abstract: An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.

Abstract: Methods and systems for generating defect samples are provided. One method includes identifying a set of defects detected on a wafer having the most diversity in values of at least one defect attribute and generating different tiles for different defects in the set. The tiles define a portion of all values for the at least one attribute of all defects detected on the wafer that are closer to the values for the at least one attribute of their corresponding defects than the values for the at least one attribute of other defects. In addition, the method includes separating the defects on the wafer into sample bins corresponding to the different tiles based on their values of the at least one attribute, randomly selecting defect(s) from each of two or more of the sample bins, and creating a defect sample for the wafer that includes the randomly selected defects.

Abstract: Systems and methods for providing micro defect inspection capabilities for optical systems such as wafer metrology tools and interferometer systems are disclosed. The systems and methods in accordance with the present disclosure may detect, classify and quantify wafer surface features, wherein the detected defects are classified and the important defect metrology information of height/depth, area and volume is reported. The systems and methods in accordance with the present disclosure therefore provide more values for quantifying the negative effect of these defects on the wafer quality.

Abstract: A method for splitting a semiconductor wafer includes incorporating hydrogen atoms into at least a splitting region of a semiconductor wafer. The splitting region includes a concentration of nitrogen atoms higher than 1·1015 cm?3. The method further includes splitting the semiconductor wafer at the splitting region of the semiconductor wafer.