Abstract: An image sensor includes a photodiode disposed in a first semiconductor material to absorb photons incident on the image sensor and generate image charge. A floating diffusion is disposed in the first semiconductor material and positioned to receive the image charge from the photodiode, and a transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge out of the photodiode into floating diffusion in response to a transfer signal. A source follower transistor with a gate terminal is coupled to the floating diffusion to output an amplified signal of the image charge in the floating diffusion. The gate terminal includes a second semiconductor material in contact with the floating diffusion, and a gate oxide is partially disposed between the second semiconductor material and the first semiconductor material. The second semiconductor material extends beyond the lateral bounds of the floating diffusion.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor is provided that includes a substrate including a first surface, a second surface facing the first surface, and a first recess region that is recessed from the first surface toward the second surface. The CMOS image sensor further includes a transfer gate on the substrate, and a source follower gate on the first recess region. The source follower gate is within the first recess region and partially covers a portion of the first surface of the substrate.

Abstract: A photoelectric conversion unit in each of a plurality of pixels starts accumulation of charges at a first time and is controlled to be turned on after the first time and to be thereafter turned off at a second time to transfer the charges to a holding unit. A second transfer switch in at least one of the pixels is controlled to be turned on at a third time and a fourth time after the second time to transfer the charges held in the holding unit to an amplification unit, and a first transfer switch in the at least one of the pixels is maintained to be in an off state during a period from the third time to a fourth time.

Abstract: A semiconductor structure includes a module with a plurality of die regions, a plurality of light-emitting devices disposed upon the substrate so that each of the die regions includes one of the light-emitting devices, and a lens board over the module and adhered to the substrate with glue. The lens board includes a plurality of microlenses each corresponding to one of the die regions, and at each one of the die regions the glue provides an air-tight encapsulation of one of the light-emitting devices by a respective one of the microlenses. Further, phosphor is included as a part of the lens board.

Abstract: A manufacturing method for an edge illuminated type photodiode has: a process of forming an impurity-doped layer of a first conductivity type in each of device forming regions in a semiconductor substrate; a process of forming an impurity-doped layer of a second conductivity type in each of the device forming regions; a process of forming a trench extending in a direction of thickness of the semiconductor substrate from a principal surface, at a position of a boundary between adjacent device forming regions, by etching to expose side faces of the device forming regions; a process of forming an insulating film on the exposed side faces of the device forming regions; a process of forming an electrode for each corresponding impurity-doped layer on the principal surface side of the semiconductor substrate; and a process of implementing singulation of the semiconductor substrate into the individual device forming regions.

Abstract: A diode has a first contact of a material having a first conductivity type, a second contact of a material having a second conductivity type arranged co-planarly with the first contact, a channel arranged co-planarly between the first and second contacts, a gate arranged adjacent the channel, and a voltage source electrically connected to the gate. A diode has a layer of material arranged on a substrate, a first region of material doped to have a first conductivity type, a second region of material doped to have a second conductivity type, a channel between the first and second regions formed of an undoped region, a gate arranged adjacent the channel, and a voltage source electrically connected to the gate.

Abstract: A MEMS structure incorporating multiple joined substrates and a method for forming the MEMS structure are disclosed. An exemplary MEMS structure includes a first substrate having a bottom surface and a second substrate having a top surface substantially parallel to the bottom surface of the first substrate. The bottom surface of the first substrate is connected to the top surface of the second substrate by an anchor, such that the anchor does not extend through either the bottom surface of the first substrate or the top surface of the second substrate. The MEMS structure may include a bonding layer in contact with the bottom surface of the first substrate, and shaped to at least partially envelop the anchor.

Abstract: There is provided a solid-state imaging device in which a plurality of pixels is two-dimensionally arranged in a pixel region. Each of the pixels is formed in an island-shaped semiconductor. In this island-shaped semiconductor, a signal line N+ region and a P region are formed from the bottom. On an upper side surface of this P region, an N region and a P+ region are formed from an inner side of the island-shaped semiconductor. Above the P region, a P+ region is formed. By setting the P+ region and the P+ region to have a low-level voltage and setting the signal line N+ region to have a high-level voltage that is higher than the low-level voltage, signal charges accumulated in the N region are discharged to the signal line N+ region via the P region.

Abstract: A method for manufacturing a semiconductor apparatus includes the first step of forming a silicon oxide film including a main portion on a second portion and a sub portion between a first portion and a silicon nitride film, the second step of forming a first conductivity type impurity region under the silicon oxide film, and the third step of forming a semiconductor element including a second conductivity type impurity region having an opposite conductivity to the first conductivity type impurity region in the first portion. In the second step, angled ion implantation is performed into a region under the sub portion at an implantation angle using the silicon nitride film as a mask.

Abstract: A fringe field switching (FFS) liquid crystal display (LCD) device which uses an organic insulating layer and consumes less power, in which film quality of an upper layer of a low temperature protective film is changed to improve undercut within a pad portion contact hole, and a method for fabricating the same is provided.

Abstract: A method for manufacturing a solid-state imaging device in which a charge generator that detects an electromagnetic wave and generates signal charges is formed on a semiconductor substrate and a negative-charge accumulated layer having negative fixed charges is formed above a detection plane of the charge generator. The method includes the steps of: forming an oxygen-feed film capable of feeding oxygen on the detection plane of the charge generator; forming a metal film that covers the oxygen-feed film on the detection plane of the charge generator; and performing heat treatment for the metal film in an inactive atmosphere to thereby form an oxide of the metal film between the metal film and the oxygen-feed film on the detection plane of the charge generator, the oxide being to serve as the negative-charge accumulated layer.

Abstract: A semiconductor device and methods of manufacturing the same are disclosed. Specifically, methods and devices for manufacturing optocouplers are disclosed. Even more specifically, methods and devices that deposit one or more encapsulant materials on optocouplers are disclosed. The encapsulant material may include silicone and the devices used to deposit the silicone may be configured to simultaneously deposit the silicone on different sides of the optocoupler, thereby reducing manufacturing steps and time.

Abstract: A semiconductor structure includes a module with a plurality of die regions, a plurality of light-emitting devices disposed upon the substrate so that each of the die regions includes one of the light-emitting devices, and a lens board over the module and adhered to the substrate with glue. The lens board includes a plurality of microlenses each corresponding to one of the die regions, and at each one of the die regions the glue provides an air-tight encapsulation of one of the light-emitting devices by a respective one of the microlenses. Further, phosphor is included as a part of the lens board.

Abstract: An object is to provide a highly reliable transistor and a semiconductor device including the transistor. A semiconductor device including a gate electrode; a gate insulating film over the gate electrode; an oxide semiconductor film over the gate insulating film; and a source electrode and a drain electrode over the oxide semiconductor film, in which activation energy of the oxide semiconductor film obtained from temperature dependence of a current (on-state current) flowing between the source electrode and the drain electrode when a voltage greater than or equal to a threshold voltage is applied to the gate electrode is greater than or equal to 0 meV and less than or equal to 25 meV, is provided.

Abstract: A solid-state imaging device and an electronic device that includes the solid-state imaging device prevents shifting of a photoelectric conversion region due to long-wavelength light passing to subsurface portions of the solid-state imagine device. The device include a photo diode having an upper layer of a first conductivity type formed over a second layer having an accumulation region of a second conductivity type. The upper layer is a light-receiving portion of the photodiode. A multi-stage element isolation layer is included and has a plurality of layers of the first conductivity type, such that a first lateral side of a first stage of the multi-stage layer abuts the accumulation portion, and a second stage of the multi-stage layer is separated by a width W from the accumulation region of an intermediate portion of a second conductivity type.

Abstract: A method for fabricating an organic electroluminescent display device is provided. The organic electroluminescent display device includes a light-emitting cell having a cathode electrode, an anode electrode and an organic layer interposed therebetween; wherein the cathode electrode is electrically connected to a contact electrode via a contact hole; wherein the contact electrode has acid-resistance with respect to an etchant used in patterning the cathode electrode.

Abstract: A light-emitting device (LED) package component includes an LED chip having a first active bond pad and a second active bond pad. A carrier chip is bonded onto the LED chip through flip-chip bonding. The carrier chip includes a first active through-substrate via (TSV) and a second active TSV connected to the first and the second active bond pads, respectively. The carrier chip further includes a dummy TSV therein, which is electrically coupled to the first active bond pad, and is configured not to conduct any current when a current flows through the LED chip.

Abstract: An isolation area that provides additional active area between semiconductor devices on an integrated circuit is described. In one embodiment, the invention includes a complementary metal oxide semiconductor transistor of an image sensor having a source, a drain, and a gate between the source and the drain, the transistor having a channel to couple the source and the drain under the influence of the gate, and an isolation barrier surrounding a periphery of the source and the drain to isolate the source and the drain from other devices, wherein the isolation barrier is distanced from the central portion of the channel.

Abstract: A photoelectric conversion device comprising: a semiconductor substrate; an inorganic photoelectric conversion layer provided within the semiconductor substrate; and an organic photoelectric conversion layer provided above the inorganic photoelectric conversion layer, wherein the organic photoelectric conversion layer is prepared by a shadow mask method.

Abstract: Disclosed are a light emitting device and a method for manufacturing the same. The light emitting device includes a substrate having a lead frame, a light emitting diode mounted on the substrate, a mold member formed on the substrate and the light emitting diode, and a reflecting member having an opening portion at one side thereof and being inclined at an outer portion of the mold member.

Abstract: A solid-state imaging device including a first transfer electrode portion and a second transfer electrode portion having a pattern area ratio higher than that of the first transfer electrode portion. The first transfer electrode portion includes a plurality of first transfer electrodes having a single-layer structure of metal material. The second transfer electrode portion includes a plurality of second transfer electrodes having a single-layer structure of polycrystalline silicon or amorphous silicon.

Abstract: A back side illumination image sensor according to an embodiment includes: a photosensitive device and a readout circuit on the front side of a first substrate; an interlayer dielectric layer on the front side of the first substrate; a metal line on the interlayer dielectric layer; a pad having a step on the interlayer dielectric layer; and a second substrate bonded with the front side of the first substrate over the interlayer dielectric layer, metal line, and pad.

Abstract: A method is provided for processing a substrate. The substrate has at least one filter region, a plurality of bond pads, and a plurality of scribe lines arranged around the filter region and bond pads. A first planarization layer is formed above the substrate. The planarization layer has a substantially flat top surface overlying the filter region, the bond pads and the scribe lines. At least one color resist layer is formed over the first planarization layer and within the filter region while the first planarization layer covers the bond pads and the scribe lines.

Abstract: A backside illuminated image sensor comprises a sensor layer having a plurality of photosensitive elements of a pixel array, an oxide layer adjacent a backside surface of the sensor layer, and at least one dielectric layer adjacent a frontside surface of the sensor layer. A color filter array is formed on a backside surface of the oxide layer, and a transparent cover is attached to the backside surface of the oxide layer overlying the color filter array. Redistribution metal conductors are in electrical contact with respective bond pad conductors through respective openings in the dielectric layer. A redistribution passivation layer is formed over the redistribution metal conductors, and contact metallizations are in electrical contact with respective ones of the respective redistribution metal conductors through respective openings in the redistribution passivation layer. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.

Abstract: A method of manufacturing a back side illumination image sensor according to an embodiment includes: forming an ion implantation layer by implanting ions throughout the front side of a first substrate; defining a pixel region by forming a device isolation region on the front side of the first substrate; forming a photosensitive device and a readout circuit on the pixel region; forming an interlayer dielectric layer and a metal line on the front side of the first substrate; bonding a second substrate with the front side of the first substrate where the metal line is formed; removing a lower part of the first substrate under the ion implantation layer; applying wet etching to a back side of the first substrate after removing the lower part; and forming a microlens on the photosensitive device at the back side of the first substrate.

Abstract: A backside illuminated image sensor comprises a sensor layer implementing a plurality of photosensitive elements of a pixel array, an oxide layer adjacent a backside surface of the sensor layer, and at least one dielectric layer adjacent a frontside surface of the sensor layer. The sensor layer further comprises a plurality of backside trenches formed in the backside surface of the sensor layer and arranged to provide isolation between respective pairs of the photosensitive elements. The backside trenches have corresponding backside field isolation implant regions formed in the sensor layer, and the resulting structure provides reductions in carrier recombination and crosstalk between adjacent photosensitive elements. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Abstract: A charge transfer device 1 has an P-type region, an N-type well provided to the surficial portion of the P-type region, and transfer electrodes having P-type conductivity, provided over the N-type substrate while placing an insulating film in between.

Abstract: An image sensor according to an example embodiment may include a plurality of photoelectric transformation active regions, a plurality of read active regions, and/or at least one read gate. The plurality of photoelectric transformation active regions may be formed on a substrate. Each read active region may be formed adjacent to one of the plurality of photoelectric transformation active regions. Each read gate may be formed on one of the read active regions and partially overlap at least one of the adjacent photoelectric transformation active regions. Each read gate may be electrically isolated from the overlapping portion of the photoelectric transformation active region.

Abstract: This invention relates to imaging device and its related transferring technologies to independent substrate able to attain significant broadband capability covering the wavelengths from ultra-violet (UV) to long-Infrared. More particularly, this invention is related to the broadband image sensor (along with its manufacturing technologies), which can detect the light wavelengths ranges from as low as UV to the wavelengths as high as 20 ?m covering the most of the wavelengths using of the single monolithic image sensor on the single wafer. This invention is also related to the integrated circuit and the bonding technologies of the image sensor to standard integrated circuit for multicolor imaging, sensing, and advanced communication. Our innovative approach utilizes surface structure having more than micro-nano-scaled 3-dimensional (3-D) blocks which can provide broad spectral response.

Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).

Abstract: A backside illuminated image sensor comprises a sensor layer implementing a plurality of photosensitive elements of a pixel array, and an oxide layer adjacent a backside surface of the sensor layer. The sensor layer comprises a seed layer and an epitaxial layer formed over the seed layer, with the seed layer having a cross-sectional doping profile in which a designated dopant is substantially confined to a pixel array area of the sensor layer. The doping profile advantageously reduces dark current generated at an interface between the sensor layer and the oxide layer. The image sensor may be implemented in a digital camera or other type of digital imaging device.

Abstract: A Complementary Metal Oxide Semiconductor (CMOS) image sensor and methods for fabricating the same. In one example embodiment of the invention, a method for manufacturing a Complementary Metal Oxide Semiconductor (CMOS) image sensor includes several acts. First, a metal pad is formed over a semiconductor substrate. Next, a protection film is formed over the semiconductor substrate and the metal pad. Then, the protection film is selectively removed to expose a surface of the metal pad. Next, a first planarization film is formed over the protection film. Then, a color filter layer is formed over the first planarization film. Next, a second planarization layer is formed over the color filter layer. Then, a first material layer is formed over the second planarization layer. Next, a second material layer is formed over the first material layer. Then, a micro lens is formed out of the first and second material layers.

Abstract: Disclosed are a light emitting device and a method for manufacturing the same. The light emitting device includes a substrate having a lead frame, a light emitting diode mounted on the substrate, a mold member formed on the substrate and the light emitting diode, and a reflecting member having an opening portion at one side thereof and being inclined at an outer portion of the mold member.

Abstract: A pixel of an image sensor includes a polysilicon layer, and an active region which needs to be electrically coupled with the polysilicon layer, wherein the polysilicon layer extends over a portion of the active region, such that the polysilicon layer and the active region are partially overlapped, and the polysilicon layer and the active region are coupled through a buried contact structure.

Abstract: A method and structure of providing a doped plug to improve the performance of CCD gaps is discussed. A highly-doped region is implemented in a semiconductor, aligned beneath a gap. The plug provides a highly-conductive region at the semiconductor surface, therefore preventing the development of a region where potential is significantly influenced by surface charges.

Abstract: A lens forming method according to the present invention for forming lenses capable of focusing light on a plurality of respective photoelectric conversion sections constituting of a semiconductor apparatus is described. The method includes a lens forming step of processing a lens forming material, in which an average gradient of a ? curve indicating a residual film thickness with respect to the amount of irradiation light is between ?15 and ?0.8 nm·cm2/mJ within the range of a residual film ratio of 10 to 50% or within the range of the amount of irradiation light of 55 to 137 mJ/cm2 into a lens surface shape, using a photomask with an optical transmittance that is varied according to a lens surface shape, as an exposure mask.

Abstract: The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a photosensor and providing an electrical connection to pixel circuitry, and the method of making the same.

Abstract: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon.

Abstract: A method of forming a charge-coupled device including the steps of forming well or substrate of a first conductivity type; a buried channel of a second conductivity type; a plurality of first gate electrodes; partially coating the first gate electrodes with a mask substantially aligned to an edge of the first gate electrodes; implanting ions of the first conductivity type of sufficient energy to penetrate the first gates and into the buried channel; and a plurality of second gate electrodes covering regions each over the buried channel between the first gate electrodes.

Abstract: A solid state image pickup device is provided which includes: charge accumulation regions disposed in a semiconductor substrate in a matrix shape; a plurality of vertical transfer channels formed in the semiconductor substrate each in a close proximity to each column of the charge accumulation regions; vertical transfer electrodes formed above the vertical transfer channels; a channel protective impurity layer formed just under the vertical transfer channel and surrounding the charge accumulation region; one or more pixel separation impurity layers formed under the channel protective impurity layer and at a position facing the channel protective impurity layer; an overflow barrier region having a peak position of an impurity concentration at a position deeper than the pixel separation impurity layer, the peak position of the impurity concentration being at a depth of 3 ?m or deeper from a surface of the semiconductor substrate; and a horizontal CCD for transferring signal charges transferred from the vertical

Abstract: In a solid-state image pick-up device in which a photoelectric converting section formed on a semiconductor substrate and a gate oxide film of a transfer path of a charge coupled device (CCD) which is close to the photoelectric converting section are constituted by a laminated film comprising a silicon oxide film (SiO) and a silicon nitride film (SiN), the gas oxide film has a single layer structure in which at least an end on the photoelectric converting section side of the gate oxide film does not contain the silicon nitride film.

Abstract: A method for manufacturing a vertical CMOS image sensor related to a semiconductor device is disclosed. A high-temperature double annealing process and/or an additional passivation nitride film are selectively applied in order to improve dark leakage characteristics and also to prevent or reduce an incidence of circular defects, thereby enhancing the quality and reliability of the vertical CMOS image sensor.

Abstract: An image sensing circuit and method is disclosed, wherein a photodiode is formed in a substrate through a series of angled implants. The photodiode is formed by a first, second and third implant, wherein at least one of the implants are angled so as to allow the resulting photodiode to extend out beneath an adjoining gate. Under an alternate embodiment, a fourth implant is added, under an increased implant angle, in the region of the second implant. The resulting photodiode structure substantially reduces or eliminates transfer gate subthreshold leakage.

Abstract: A method of reading surface levels of a field defined on a substrate using a sensing apparatus having at least one cell array composed of a plurality of cells, in which some of the cells constituting the at least one cell array are selected and designated as available cells. Light is radiated onto a surface of the field. Light reflected to the available cells from the surface is sensed to extract available level signals. The available level signals may be calculated to read the surface level of the field. The surface level of the field are used in a method of controlling the level of an exposure apparatus controlling the substrate mounted on a leveling stage in up, down, right, left, front, back, and rotational directions using the surface level.

Abstract: A CMOS image sensor and manufacturing method thereof are disclosed. The present CMOS image sensor comprises: a semiconductor substrate including an active region having a photo diode region and a transistor region; a gate on the active region, comprising a gate insulating layer and a gate electrode thereon; a first source/drain diffusion region in the transistor region at one side of the gate electrode, including a first conductivity type dopant; a second photo diode diffusion region in the region at the other side of the gate electrode, the second diffusion region including a first conductivity type dopant; insulating sidewalls on sides of the gate electrode; and a third diffusion region over or in the second diffusion region, extending below one of the insulating sidewalls (e.g., closest to the photo diode region), and including a second conductivity type dopant.

Abstract: In the manufacture of an electronic device such as an active matrix display, a vertical amorphous PIN photodiode or similar thin-film diode (D) is advantageously integrated with a polysilicon TFT (TFT1, TFT2) in a manner that permits a good degree of optimization of the respective TFT and diode properties while being compatible with the complex pixel context of the display. High temperature processes for making the active semiconductor film (10) of the TFT more crystalline than an active semiconductor film (40) of the diode and for forming the source and drain doped regions (s1,s2, d1,d2) of the TFT are carried out before depositing the active semiconductor film (40) of the diode. Thereafter, the lateral extent of the diode is defined by etching while protecting with an etch-stop film (30) an interconnection film (20) that can provide a doped bottom electrode region (41) of the diode as well as one of the doped regions (s2, g1) of the TFT.

Abstract: A solar cell is prepared. The solar cell is photo-sensitized. The solar cell has a semiconductor layer. And carbon nanotubes are deposited on the semiconductor layer with an arrangement. The solar cell is prepared with a reduced amount of fabrication material, a lowered fabrication cost and a prolonged lifetime.

Abstract: A method for manufacturing a CMOS image sensor may include at least one of the following steps: Forming a salicide blocking layer on an entire surface of a semiconductor substrate having a photodiode area and a transistor. Forming a photoresist pattern inclined at an angle less 90° (e.g. between approximately 70° and approximately 80°) on and/or over a non-salicide area. Performing wet-etching on the salicide blocking layer using the photoresist pattern as an etching mask. Forming salicide on the salicide area after removing the photoresist pattern.

Abstract: A TFT liquid crystal display device is disclosed, which includes two substrates and a liquid crystal layer provided in between the substrates, one substrate having a surface providing with a plurality of data signal lines, a plurality of scan lines, a plurality of pixel electrodes, and a plurality of functional components having source electrode, gate electrodes and drain electrodes. Moreover, the projection of one of the signal electrode and the drain electrode on the gate electrode having at least one bridging zone and one conducting zone. The width of the bridging zone in the direction in parallel to one side of the gate electrode is smaller than the width of the conducting zone in the direction in parallel to the side of the gate electrode.