Comprising Group Iii-v Or Ii-vi Compound, Or Of Se, Te, Or Oxide Semiconductor (epo) Patents (Class 257/E29.296)
  • Patent number: 9601631
    Abstract: A semiconductor device in which a shift of the threshold voltage of a transistor is suppressed is provided. A semiconductor device in which a decrease in the on-state current of a transistor is suppressed is provided. The semiconductor device is manufactured as follows: forming a gate electrode layer over a substrate; forming a gate insulating film over the gate electrode layer; forming an oxide semiconductor film over the gate insulating film; forming a metal oxide film having a higher reducing property than the oxide semiconductor film over the oxide semiconductor film; performing heat treatment while the metal oxide film and the oxide semiconductor film are in contact with each other, thereby the metal oxide film is reduced so that a metal film is formed; and processing the metal film to form a source electrode layer and a drain electrode layer.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: March 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventor: Hiromichi Godo
  • Patent number: 9472674
    Abstract: A thin film transistor includes a first gate electrode located on a base, a second gate electrode located on the base, an insulating layer, a source electrode, a drain electrode, and a channel layer. The insulating layer covers the base, the first gate electrode, and the second gate electrode. The second gate electrode is insulated from the first gate electrode. The channel layer includes a first portion and a second portion sandwiched between the first portion and the insulating layer. A conductivity of the second portion is larger than a conductivity of the first portion. The first portion includes a first region facing the first gate electrode and a second region facing the second gate electrode. The source electrode is electrically connected to the first region, and the drain electrode is electrically connected to the second region.
    Type: Grant
    Filed: September 8, 2015
    Date of Patent: October 18, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Kuo-Lung Fang, Po-Li Shih, Yi-Chun Kao, Hsin-Hua Lin, Chih-Lung Lee
  • Patent number: 9299814
    Abstract: The semiconductor device is manufactured through the following steps: after first heat treatment is performed on an oxide semiconductor film, the oxide semiconductor film is processed to form an oxide semiconductor layer; immediately after that, side walls of the oxide semiconductor layer are covered with an insulating oxide; and in second heat treatment, the side surfaces of the oxide semiconductor layer are prevented from being exposed to a vacuum and defects (oxygen deficiency) in the oxide semiconductor layer are reduced.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: March 29, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 9035305
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: May 19, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 9029852
    Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: May 12, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Honda, Masashi Tsubuku, Yusuke Nonaka, Takashi Shimazu, Shunpei Yamazaki
  • Patent number: 9018629
    Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: April 28, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sachiaki Tezuka, Atsuo Isobe, Takehisa Hatano, Kazuya Hanaoka
  • Patent number: 9012910
    Abstract: This semiconductor device (100) includes a substrate (1), a gate electrode (11), a gate insulating film (12), an oxide semiconductor layer (13), a source electrode (14), a drain electrode (15), and a protective film (16). The upper and side surfaces of the oxide semiconductor layer are covered with the source and drain electrodes and the protective film. When viewed along a normal to the substrate, the narrowest gap between the respective outer peripheries of a first contact region (13s) and the source electrode and the narrowest gap between the respective outer peripheries of a second contact region (13d) and the drain electrode both have a length of 1.5 ?m to 4.5 ?m.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: April 21, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akihiro Oda
  • Patent number: 9006732
    Abstract: In an embodiment, an insulating film is formed over a flat surface; a mask is formed over the insulating film; a slimming process is performed on the mask; an etching process is performed on the insulating film using the mask; a conductive film covering the insulating film is formed; a polishing process is performed on the conductive film and the insulating film, so that the conductive film and the insulating film have equal thicknesses; the conductive film is etched, so that a source electrode and a drain electrode which are thinner than the conductive film are formed; an oxide semiconductor film is formed in contact with the insulating film, the source electrode, and the drain electrode; a gate insulating film covering the oxide semiconductor film is formed; and a gate electrode is formed in a region which is over the gate insulating film and overlaps with the insulating film.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideomi Suzawa, Shinya Sasagawa
  • Patent number: 9006730
    Abstract: A metal oxide semiconductor structure and a production method thereof, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: April 14, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Chin-Wen Lin, Chuan-I Huang, Chung-Chin Huang, Ted Hong Shinn
  • Patent number: 9000592
    Abstract: Disclosed are a display device and a method of fabricating the same. A pad for a display device includes: an oxide semiconductor layer formed on a substrate; a lower insulation layer formed on the oxide semiconductor layer to at least partially overlap the oxide semiconductor layer; one or more line layers formed on the lower insulation layer; an upper insulation layer formed on the one or more line layers; and a pad electrode formed on the upper insulation layer and connected to the one or more line layers through a contact hole formed in the upper insulation layer.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: April 7, 2015
    Assignee: LG Display Co., Ltd.
    Inventor: YoungHak Lee
  • Patent number: 8993386
    Abstract: An object is to provide a semiconductor device including a semiconductor element which has favorable characteristics. A manufacturing method of the present invention includes the steps of: forming a first conductive layer which functions as a gate electrode over a substrate; forming a first insulating layer to cover the first conductive layer; forming a semiconductor layer over the first insulating layer so that part of the semiconductor layer overlaps with the first conductive layer; forming a second conductive layer to be electrically connected to the semiconductor layer; forming a second insulating layer to cover the semiconductor layer and the second conductive layer; forming a third conductive layer to be electrically connected to the second conductive layer; performing first heat treatment after forming the semiconductor layer and before forming the second insulating layer; and performing second heat treatment after forming the second insulating layer.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Ohara, Toshinari Sasaki
  • Patent number: 8994024
    Abstract: A highly reliable display device which has high aperture ratio and includes a transistor with stable electrical characteristics is manufactured. The display device includes a driver circuit portion and a display portion over the same substrate. The driver circuit portion includes a driver circuit transistor and a driver circuit wiring. A source electrode and a drain electrode of the driver circuit transistor are formed using a metal. A channel layer of the driver circuit transistor is formed using an oxide semiconductor. The driver circuit wiring is formed using a metal. The display portion includes a pixel transistor and a display portion wiring. A source electrode and a drain electrode of the pixel transistor are formed using a transparent oxide conductor. A semiconductor layer of the pixel transistor is formed using the oxide semiconductor. The display portion wiring is formed using a transparent oxide conductor.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara
  • Patent number: 8987727
    Abstract: An object is to provide a semiconductor device in which defects are reduced and miniaturization is achieved while favorable characteristics are maintained. A semiconductor layer is formed; a first conductive layer is formed over the semiconductor layer; the first conductive layer is etched with use of a first resist mask to form a second conductive layer having a recessed portion; the first resist mask is reduced in size to form a second resist mask; the second conductive layer is etched with use of the second resist mask to form source and drain electrodes each having a projecting portion with a tapered shape at the peripheries; a gate insulating layer is formed over the source and drain electrodes to be in contact with part of the semiconductor layer; and a gate electrode is formed in a portion over the gate insulating layer and overlapping with the semiconductor layer.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: March 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Motomu Kurata
  • Patent number: 8981368
    Abstract: A thin film transistor includes: a gate electrode, a source electrode, and a drain electrode; an oxide semiconductor layer provided on one side of the gate electrode with an insulating film in between, the oxide semiconductor layer being provided in a region not facing the source electrode and the drain electrode and being electrically connected to the source electrode and the drain electrode; and a low resistance oxide layer provided in a region facing the source electrode and in a region facing the drain electrode, the regions being adjacent to the oxide semiconductor layer, and the low resistance oxide layer having an electric resistivity lower than an electric resistivity of the oxide semiconductor layer.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Tsutomu Shimayama, Nobutoshi Fujii, Takashige Fujimori
  • Patent number: 8980686
    Abstract: An object is to provide a deposition technique for depositing an oxide semiconductor film. Another object is to provide a method for manufacturing a highly reliable semiconductor element using the oxide semiconductor film. A novel sputtering target obtained by removing an alkali metal, an alkaline earth metal, and hydrogen that are impurities in a sputtering target used for deposition is used, whereby an oxide semiconductor film containing a small amount of those impurities can be deposited.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8969867
    Abstract: The semiconductor device includes a transistor including an oxide semiconductor film having a channel formation region, a gate insulating film, and a gate electrode layer. In the transistor, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the thickness of the gate insulating film is large (equivalent oxide thickness which is obtained by converting into a thickness of silicon oxide containing nitrogen is 5 nm or more and 50 nm or less, preferably 10 nm or more and 40 nm or less). Alternatively, the channel length is small (5 nm or more and less than 60 nm, preferably 10 nm or more and 40 nm or less), and the resistivity of the source region and the drain region is 1.9×10?5 ?·m or more and 4.8×10?3 ?·m or less.
    Type: Grant
    Filed: January 10, 2013
    Date of Patent: March 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Matsubayashi, Yutaka Okazaki
  • Patent number: 8962386
    Abstract: To reduce oxygen vacancies in an oxide semiconductor film and the vicinity of the oxide semiconductor film and to improve electric characteristics of a transistor including the oxide semiconductor film. A semiconductor device includes a gate electrode whose Gibbs free energy for oxidation is higher than that of a gate insulating film. In a region where the gate electrode is in contact with the gate insulating film, oxygen moves from the gate electrode to the gate insulating film, which is caused because the gate electrode has higher Gibbs free energy for oxidation than the gate insulating film. The oxygen passes through the gate insulating film and is supplied to the oxide semiconductor film in contact with the gate insulating film, whereby oxygen vacancies in the oxide semiconductor film and the vicinity of the oxide semiconductor film can be reduced.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromichi Godo, Tetsuhiro Tanaka
  • Patent number: 8957411
    Abstract: An object is to improve reliability of a light-emitting device. A light-emitting device has a driver circuit portion including a transistor for a driver circuit and a pixel portion including a transistor for a pixel over one substrate. The transistor for the driver circuit and the transistor for the pixel are inverted staggered transistors each including an oxide semiconductor layer in contact with part of an oxide insulating layer. In the pixel portion, a color filter layer and a light-emitting element are provided over the oxide insulating layer. In the transistor for the driver circuit, a conductive layer overlapping with a gate electrode layer and the oxide semiconductor layer is provided over the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed using metal conductive films.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masayuki Sakakura, Yoshiaki Oikawa, Kenichi Okazaki, Hotaka Maruyama
  • Patent number: 8956907
    Abstract: There is provided a method of fabricating a field effect transistor including: forming a first oxide semiconductor film on a gate insulation layer disposed on a gate electrode; forming a second oxide semiconductor film on the first oxide semiconductor film, the second oxide semiconductor film differing in cation composition from the first oxide semiconductor film and being lower in electrical conductivity than the first oxide semiconductor film; applying a heat treatment at over 300° C. in an oxidizing atmosphere; forming a third oxide semiconductor film on the second oxide semiconductor film, the third oxide semiconductor film differing in cation composition from the first oxide semiconductor film and being lower in electrical conductivity than the first oxide semiconductor film; applying a heat treatment in an oxidizing atmosphere; and, forming a source electrode and a drain electrode on the third oxide semiconductor film.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: February 17, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Masashi Ono, Masahiro Takata, Fumihiko Mochizuki, Atsushi Tanaka, Masayuki Suzuki
  • Patent number: 8946701
    Abstract: Embodiments of the present invention provide a thin film transistor, an array substrate and a display device. The thin film transistor comprises a gate layer, a first insulating layer, an active layer, an etch stop layer and a source/drain electrode layer, wherein the active layer is made of a metal oxide material, the first insulating layer, the active layer, the etch stop layer and the source/drain electrode layer are sequentially stacked from bottom to top, the source/drain electrode layer contains an interval separating a source electrode and a drain electrode therein, the etch stop layer is located below the interval, and the etch stop layer has a width greater than that of the interval, and the first insulating layer comprises a laminate of a first sub-insulation layer and a second sub-insulation layer, the second sub-insulation layer is in contact with the active layer and made of an oxygen-rich insulating material.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: February 3, 2015
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhanfeng Cao, Xiaoyang Tong, Qi Yao, Seongyeol Yoo
  • Patent number: 8946005
    Abstract: A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: February 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Je-Hun Lee, Do-Hyun Kim, Eun-Guk Lee, Chang-Oh Jeong
  • Patent number: 8945981
    Abstract: To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 8927982
    Abstract: A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used. In a transistor using an oxide semiconductor film for an active layer, a microvoid is provided in a source region and a drain region adjacent to a channel region. By providing a microvoid in the source region and the drain region formed in an oxide semiconductor film, hydrogen contained in the channel region of an oxide semiconductor film can be captured in the microvoid.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yuichi Sato, Shinji Ohno
  • Patent number: 8927985
    Abstract: A semiconductor device includes first and second conductive layers over an insulating surface, a first insulating layer over the first and second conductive layers, first and second oxide semiconductor layers over the first insulating layer, third and fourth conductive layers over the first oxide semiconductor layer, a second insulating layer over the third and fourth conductive layers, and a fifth conductive layer over the second insulating layer. In the semiconductor device, the third conductive layer is electrically connected to the second conductive layer, the fifth conductive layer is electrically connected to the fourth conductive layer, the first oxide semiconductor layer has a region overlapping with the first conductive layer, the second oxide semiconductor layer has a region overlapping with the fifth conductive layer, and the second oxide semiconductor layer has a region intersecting with the second conductive layer.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hideki Matsukura
  • Patent number: 8921850
    Abstract: A thin film transistor (TFT), a method for fabricating a TFT, an array substrate for a display device having a TFT, and a method for fabricating the same are provided. An oxide thin film transistor (TFT) includes: a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; an active layer formed on the gate insulating layer above the gate electrode; an etch stop layer pattern formed on the active layer; a source alignment element and a drain alignment element formed on the etch stop layer pattern and spaced apart from one another; and a source electrode in contact with the source alignment element and the active layer and a drain electrode in contact with the drain alignment element and the active layer.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 30, 2014
    Assignee: LG Display Co., Ltd.
    Inventor: SangHee Yu
  • Patent number: 8921863
    Abstract: A thin film transistor TFT, including a substrate, a gate electrode on the substrate, a gate insulating layer on the gate electrode, an active layer on the gate insulating layer, the active layer corresponding to the gate electrode and including a channel region, source and drain electrodes contacting the active layer, the source and drain electrodes being separate from each other, and an ohmic contact layer between the active layer and at least one of the source and drain electrodes, the ohmic contact layer including an oxide semiconductor material.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: December 30, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Chun-Gi You
  • Patent number: 8916867
    Abstract: A semiconductor element having high mobility, which includes an oxide semiconductor layer having crystallinity, is provided. The oxide semiconductor layer includes a stacked-layer structure of a first oxide semiconductor film and a second oxide semiconductor film having a wider band gap than the first oxide semiconductor film, which is in contact with the first oxide semiconductor film. Thus, a channel region is formed in part of the first oxide semiconductor film (that is, in an oxide semiconductor film having a smaller band gap) which is in the vicinity of an interface with the second oxide semiconductor film. Further, dangling bonds in the first oxide semiconductor film and the second oxide semiconductor film are bonded to each other at the interface therebetween. Accordingly, a decrease in mobility resulting from an electron trap or the like due to dangling bonds can be reduced in the channel region.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: December 23, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Junichi Koezuka
  • Patent number: 8912080
    Abstract: The semiconductor device is manufactured through the following steps: after first heat treatment is performed on an oxide semiconductor film, the oxide semiconductor film is processed to form an oxide semiconductor layer; immediately after that, side walls of the oxide semiconductor layer are covered with an insulating oxide; and in second heat treatment, the side surfaces of the oxide semiconductor layer are prevented from being exposed to a vacuum and defects (oxygen deficiency) in the oxide semiconductor layer are reduced.
    Type: Grant
    Filed: January 9, 2012
    Date of Patent: December 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8912027
    Abstract: A display device according to an exemplary embodiment of the present invention includes a semiconductor layer; a data line disposed on the semiconductor layer, and a source electrode as well as a drain electrode disposed on the semiconductor layer and facing the source electrode. The semiconductor layer is made of an oxide semiconductor including indium, tin, and zinc. An atomic percent of indium in the oxide semiconductor is equal to or larger than about 10 at % and equal to or smaller than about 90 at %, an atomic percent of zinc in the oxide semiconductor is equal to or larger than about 5 at % and equal to or smaller than about 60 at %, and an atomic percent of tin in the oxide semiconductor is equal to or larger than about 5 at % and equal to or smaller than about 45 at %, and the data line and the drain electrode comprise copper.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: December 16, 2014
    Assignee: Samsung Display Co., Ltd
    Inventors: Byung Du Ahn, Kyoung Won Lee, Gun Hee Kim, Young Joo Choi
  • Patent number: 8912536
    Abstract: An oxide transistor includes: a channel layer formed of an oxide semiconductor; a source electrode contacting a first end portion of the channel layer; a drain electrode contacting a second end portion of the channel layer; a gate corresponding to the channel layer; and a gate insulating layer disposed between the channel layer and the gate. The oxide semiconductor includes hafnium-indium-zinc-oxide (HfInZnO). An electrical conductivity of a back channel region of the channel layer is lower than an electrical conductivity of a front channel region of the channel layer.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: December 16, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wan-joo Maeng, Myung-kwan Ryu, Tae-sang Kim, Joon-seok Park
  • Patent number: 8901554
    Abstract: A first insulating film in contact with an oxide semiconductor film and a second insulating film are stacked in this order over an electrode film of a transistor including the oxide semiconductor film, an etching mask is formed over the second insulating film, an opening portion exposing the electrode film is formed by etching a portion of the first insulating film and a portion of the second insulating film, the opening portion exposing the electrode film is exposed to argon plasma, the etching mask is removed, and a conductive film is formed in the opening portion exposing the electrode film. The first insulating film is an insulating film whose oxygen is partly released by heating. The second insulating film is less easily etched than the first insulating film and has a lower gas-permeability than the first insulating film.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: December 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Hiroshi Fujiki, Yoshinori Ieda
  • Patent number: 8901559
    Abstract: One object is to provide a new semiconductor device whose standby power is sufficiently reduced. The semiconductor device includes a first power supply terminal, a second power supply terminal, a switching transistor using an oxide semiconductor material and an integrated circuit. The first power supply terminal is electrically connected to one of a source terminal and a drain terminal of the switching transistor. The other of the source terminal and the drain terminal of the switching transistor is electrically connected to one terminal of the integrated circuit. The other terminal of the integrated circuit is electrically connected to the second power supply terminal.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: December 2, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8901658
    Abstract: A thin film transistor (TFT) is provided, which includes a gate, a semiconductor layer, an insulation layer, a source and a drain. The semiconductor layer has a first end and a second end opposite to the first end. The insulation layer is disposed between the gate and the semiconductor layer. The source clamps the first end of the semiconductor layer and the drain clamps the second end of the semiconductor layer.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: December 2, 2014
    Assignee: E Ink Holdings Inc.
    Inventors: Henry Wang, Chia-Chun Yeh, Xue-Hung Tsai, Ted-Hong Shinn
  • Patent number: 8895977
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Patent number: 8895376
    Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; source and drain electrodes provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source and drain electrodes above the gate electrode.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
  • Patent number: 8889499
    Abstract: A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: November 18, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 8884283
    Abstract: An object is to provide a semiconductor device having a novel structure with a high degree of integration. A semiconductor device includes a semiconductor layer having a channel formation region, a source electrode and a drain electrode electrically connected to the channel formation region, a gate electrode overlapping with the channel formation region, and a gate insulating layer between the channel formation region and the gate electrode. A portion of a side surface of the gate insulating layer and a portion of a side surface of the source electrode or the drain electrode are substantially aligned with each other when seen from a planar direction.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventor: Kiyoshi Kato
  • Patent number: 8883556
    Abstract: A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short channel effect is hardly caused is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed by self-aligned process in which one or more elements selected from Group 15 elements are added to the semiconductor layer with the use of a gate electrode as a mask. The source region and the drain region can have a wurtzite crystal structure.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8883558
    Abstract: An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Toshinari Sasaki, Hideaki Kuwabara
  • Patent number: 8884287
    Abstract: A semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics and reliability. Film deposition is performed using an oxide semiconductor target containing an insulator (an insulating oxide, an insulating nitride, silicon oxynitride, aluminum oxynitride, or the like), typically SiO2, so that the semiconductor device in which the Si-element concentration in the thickness direction of the oxide semiconductor layer has a gradient which increases in accordance with an increase in a distance from a gate electrode is realized.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichiro Sakata, Takashi Shimazu, Hiroki Ohara, Toshinari Sasaki, Shunpei Yamazaki
  • Patent number: 8878174
    Abstract: A novel semiconductor element contributing to an increase in circuit scale is provided. In the semiconductor element, two different electrical switches are formed using a single oxide semiconductor layer. For example, in the semiconductor element, formation of a channel (a current path) in the vicinity of a bottom surface (a first surface) of the oxide semiconductor layer and formation of a channel in the vicinity of a top surface (a second surface) of the oxide semiconductor layer are independently controlled. Therefore, the circuit area can be reduced as compared to the case two electrical switches are separately provided (for example, the case where two transistors are separately provided). That is, a circuit is formed using the semiconductor element, whereby an increase in the circuit area due to an increase in circuit scale can be suppressed.
    Type: Grant
    Filed: April 9, 2012
    Date of Patent: November 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Junichiro Sakata
  • Patent number: 8878172
    Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: November 4, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunichi Ito, Toshinari Sasaki, Miyuki Hosoba, Junichiro Sakata
  • Patent number: 8878176
    Abstract: A thin-film transistor with a fluorinated channel and fluorinated source and drain regions and methods of fabrication are provided. The thin-film transistor includes: a substrate; a semiconductor active layer of fluorine-doped metal-oxide formed on the substrate; fluorine-doped source and drain regions disposed adjacent to the semiconductor active layer; a gate electrode disposed over the semiconductor active layer, configured to induce a continuous conduction channel between the source and drain regions; and a gate dielectric material separating the gate electrode and the channel.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: November 4, 2014
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Man Wong, Hoi Sing Kwok, Zhi Ye
  • Patent number: 8872229
    Abstract: A thin film transistor includes a substrate and an active layer formed on the substrate. The active layer includes a channel region, a source region and a drain region. A source electrode and a drain electrode are formed on the source region and the drain region respectively. A gate insulating layer is formed between a gate electrode and the channel region. The thin film transistor further includes a nitride conductive layer formed between the drain electrode and the drain region, and between the source electrode and source region. The nitride conductive layer has a carrier concentration higher than that of the active layer, thereby reducing contacting resistances between the drain electrode and the drain region and between the source electrode and source region.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: October 28, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jian-Shihn Tsang
  • Patent number: 8865516
    Abstract: The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshifumi Ohta, Go Mori, Hirohiko Nishiki, Yoshimasa Chikama, Tetsuya Aita, Masahiko Suzuki, Okifumi Nakagawa, Michiko Takei, Yoshiyuki Harumoto, Takeshi Hara
  • Patent number: 8865555
    Abstract: A base insulating film is formed over a substrate. A first oxide semiconductor film is formed over the base insulating film, and then first heat treatment is performed to form a second oxide semiconductor film. Then, selective etching is performed to form a third oxide semiconductor film. An insulating film is formed over the first insulating film and the third oxide semiconductor film. A surface of the insulating film is polished to expose a surface of the third oxide semiconductor film, so that a sidewall insulating film is formed in contact with at least a side surface of the third oxide semiconductor film. Then, a source electrode and a drain electrode are formed over the sidewall insulating film and the third oxide semiconductor film. A gate insulating film and a gate electrode are formed.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: October 21, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Teruyuki Fujii, Sho Nagamatsu
  • Patent number: 8860023
    Abstract: Reducing hydrogen concentration in a channel formation region of an oxide semiconductor is important in stabilizing threshold voltage of a transistor including an oxide semiconductor and improving reliability. Hence, hydrogen is attracted from the oxide semiconductor and trapped in a region of an insulating film which overlaps with a source region and a drain region of the oxide semiconductor. Impurities such as argon, nitrogen, carbon, phosphorus, or boron are added to the region of the insulating film which overlaps with the source region and the drain region of the oxide semiconductor, thereby generating a defect. Hydrogen in the oxide semiconductor is attracted to the defect in the insulating film. The defect in the insulating film is stabilized by the presence of hydrogen.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Yusuke Nonaka, Noritaka Ishihara, Masashi Oota, Hideyuki Kishida
  • Patent number: 8859330
    Abstract: A semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability, is provided. In a method for manufacturing a transistor including an oxide semiconductor film, an implantation step where rare gas ions are implanted to the oxide semiconductor film is performed, and the oxide semiconductor film to which rare gas ions are implanted is subjected to a heating step under reduced pressure, in a nitrogen atmosphere, or in a rare gas atmosphere, whereby hydrogen or water contained in the oxide semiconductor film to which rare gas ions are implanted is released; thus, the oxide semiconductor film is highly purified.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Shinji Ohno, Yuichi Sato
  • Patent number: 8853690
    Abstract: An object is to provide a transistor including an oxide layer which includes Zn and does not include a rare metal such as In or Ga. Another object is to reduce an off current and stabilize electric characteristics in the transistor including an oxide layer which includes Zn. A transistor including an oxide layer including Zn is formed by stacking an oxide semiconductor layer including insulating oxide over an oxide layer so that the oxide layer is in contact with a source electrode layer or a drain electrode layer with the oxide semiconductor layer including insulating oxide interposed therebetween, whereby variation in the threshold voltage of the transistor can be reduced and electric characteristics can be stabilized.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiromichi Godo, Hideyuki Kishida
  • Patent number: 8853683
    Abstract: The field of an oxide semiconductor has been attracted attention in recent years. Therefore, the correlation between electric characteristics of a transistor including an oxide semiconductor layer and physical properties of the oxide semiconductor layer has not been clear yet. Thus, a first object is to improve electric characteristics of the transistor by control of physical properties of the oxide semiconductor layer. A semiconductor device including at least a gate electrode, an oxide semiconductor layer, and a gate insulating layer sandwiched between the gate electrode and the oxide semiconductor layer, where the oxide semiconductor layer has the relative permittivity of equal to or higher than 13 (or equal to or higher than 14), is provided.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: October 7, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Tatsuya Honda