Comprising Group Iii-v Or Ii-vi Compound, Or Of Se, Te, Or Oxide Semiconductor (epo) Patents (Class 257/E29.296)
  • Patent number: 8513661
    Abstract: A first gate electrode (2) is formed on a substrate (1); a first gate insulating layer (3) is formed so as to cover the first gate electrode (2); a semiconductor layer (4) including an oxide semiconductor is formed on the first gate insulating layer (3); a second gate insulating layer (7) is formed on the semiconductor layer (4); a second gate electrode (8) having a thickness equal to or larger than a thickness of the first gate electrode (2) is formed on the second gate insulating layer (7); and a drain electrode (6) and a source electrode (5) are formed so as to be connected to the semiconductor layer (4).
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: August 20, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenji Takahashi, Ryo Hayashi
  • Patent number: 8513053
    Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: August 20, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroki Ohara, Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
  • Patent number: 8507330
    Abstract: A method is proposed for producing a thin-film transistor (TFT), the method comprising forming a substrate, applying a ZnO-based precursor solution onto the substrate to form a ZnO-based channel layer, annealing the channel layer, forming a source electrode and a drain electrode on the channel layer, forming a dielectric layer on the channel layer and forming a gate electrode on the dielectric layer.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: August 13, 2013
    Assignee: Sony Corporation
    Inventors: Chunmei Wang, Wei Beng Ng, Takehisa Ishida
  • Publication number: 20130200361
    Abstract: A thin film transistor includes a substrate, a gate electrode, and an active layer formed on the substrate. The active layer includes a channel region, a source region and a drain region located at two lateral portions of the channel region. The active layer includes a first oxide semiconductor material layer and a second oxide semiconductor material layer stacked to each other. Material of the first oxide semiconductor material layer is different from material of the second oxide semiconductor material layer. A gate insulating layer is formed between the channel region and the gate electrode. A source electrode electrically connects the source region. A drain electrode electrically connects the drain region.
    Type: Application
    Filed: July 30, 2012
    Publication date: August 8, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: JIAN-SHIHN TSANG
  • Patent number: 8502220
    Abstract: An object is to improve reliability of a semiconductor device. A semiconductor device including a driver circuit portion and a display portion (also referred to as a pixel portion) over the same substrate is provided. The driver circuit portion and the display portion include thin film transistors in which a semiconductor layer includes an oxide semiconductor; a first wiring; and a second wiring. The thin film transistors each include a source electrode layer and a drain electrode layer which each have a shape whose end portions are located on an inner side than end portions of the semiconductor layer. In the thin film transistor in the driver circuit portion, the semiconductor layer is provided between a gate electrode layer and a conductive layer. The first wiring and the second wiring are electrically connected in an opening provided in a gate insulating layer through an oxide conductive layer.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: August 6, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Masayuki Sakakura, Yoshiaki Oikawa, Kenichi Okazaki, Hotaka Maruyama
  • Patent number: 8497502
    Abstract: A thin film field effect transistor includes at least: a substrate; and a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode, and a protective layer provided on the substrate in this order from the substrate side. The active layer is a layer containing an amorphous oxide containing at least one metal selected from the group consisting of In, Sn, Zn and Cd. The thin film field effect transistor further includes, between the active layer and at least one of the source electrode or the drain electrode, an electric resistance layer containing an oxide or nitride containing at least one metal selected from the group consisting of Ga, Al, Mg, Ca and Si.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: July 30, 2013
    Assignee: FUJIFILM Corporation
    Inventor: Hiroyuki Yaegashi
  • Publication number: 20130187149
    Abstract: Disclosed herein is a thin film transistor. The thin film transistor is characterized in having a source interconnect layer and a drain interconnect layer. The source electrode and the drain electrode are respectively disposed above and in contact with the source interconnect layer and the drain interconnect layer. The semiconductor layer is in contact with both the source interconnect layer and the drain interconnect layer, but is not in contact with the source electrode and the drain electrode.
    Type: Application
    Filed: September 14, 2012
    Publication date: July 25, 2013
    Applicant: E INK HOLDINGS INC.
    Inventors: Henry WANG, Chia-Chun YEH, Xue-Hung TSAI, Chih-Hsuan WANG, Ted-Hong SHINN
  • Patent number: 8492759
    Abstract: It is an object to provide a low-cost oxide semiconductor material which is excellent in controllability of the carrier concentration and stability, and to provide a field effect transistor including the oxide semiconductor material. An oxide including indium, silicon, and zinc is used as the oxide semiconductor material. Here, the content of silicon in the oxide semiconductor film is greater than or equal to 4 mol % and less than or equal to 8 mol %. The field effect transistor including such an In—Si—Zn—O film can withstand heat treatment at a high temperature and is effective against ?BT stress.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: July 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kengo Akimoto, Shunpei Yamazaki
  • Patent number: 8492764
    Abstract: A light-emitting device in which plural kinds of circuits are formed over one substrate and plural kinds of thin film transistors in accordance with characteristics of the plural kinds of circuits are included. An inverted-coplanar thin film transistor including an oxide semiconductor layer which overlaps a source and drain electrode layers is used as a thin film transistor for a pixel, a channel-stop thin film transistor is used as a thin film transistor for a driver circuit, and a color filter layer is provided between the thin film transistor for a pixel and a light-emitting element so as to overlap the light-emitting element which is electrically connected to the thin film transistor for a pixel.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: July 23, 2013
    Assignee: Semicondcutor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masayuki Sakakura, Junichiro Sakata, Masashi Tsubuku, Kengo Akimoto, Miyuki Hosoba, Yoshiaki Oikawa
  • Patent number: 8492761
    Abstract: A method for fabricating a field-effect transistor having a gate electrode, a source electrode, a drain electrode, and an active layer forming a channel region, the active layer having an oxide semiconductor mainly containing magnesium and indium is disclosed. The method includes a deposition step of depositing an oxide film, a patterning step of patterning the oxide film by processes including etching to obtain the active layer, and a heat-treatment step of heat-treating the obtained active layer subsequent to the patterning step.
    Type: Grant
    Filed: August 16, 2012
    Date of Patent: July 23, 2013
    Assignee: Ricoh Company, Ltd.
    Inventors: Yukiko Abe, Naoyuki Ueda, Yuki Nakamura, Yuji Sone
  • Publication number: 20130175520
    Abstract: A thin film transistor suitable for being disposed on a substrate is provided. The thin film transistor includes a gate electrode, an organic gate dielectric layer, a metal oxide semiconductor layer, a source electrode and a drain electrode. The gate electrode is disposed on the substrate. The organic gate dielectric layer is disposed on the substrate to cover the gate electrode. The source electrode, the drain electrode and the metal oxide semiconductor layer are disposed above the organic gate dielectric layer, and the metal oxide semiconductor layer contacts with the source electrode and the drain electrode. Because the channel layer of the thin film transistor is a layer of metal oxide semiconductor formed at a lower temperature, thus the thin film transistor can be widely applied into various display applications such as flexible display devices.
    Type: Application
    Filed: September 12, 2012
    Publication date: July 11, 2013
    Applicant: E Ink Holdings Inc.
    Inventors: Wei-Chou Lan, Ted-Hong Shinn, Henry Wang, Chia-Chun Yeh
  • Publication number: 20130175505
    Abstract: A thin film transistor (“TFT”) includes a gate electrode, a gate insulating layer, a source electrode, a drain electrode and a semiconductor layer. The gate insulating layer is disposed on the gate electrode. The source electrode is disposed on the gate insulating layer. The drain electrode is disposed on the gate insulating layer. The drain electrode is spaced apart from the source electrode. The semiconductor layer is disposed on the gate insulating layer. The semiconductor layer makes contact with a side surface of the source electrode and a side surface of the drain electrode.
    Type: Application
    Filed: August 14, 2012
    Publication date: July 11, 2013
    Inventors: Woo-Yong SUNG, Dong-Hwan KIM, Jeong-Ho LEE, Tae-Woon CHA, Sang-Gun CHOI
  • Patent number: 8481363
    Abstract: The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity. The semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layer.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: July 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 8481362
    Abstract: The present invention relates to a thin film transistor and a method of manufacturing the same. More particularly, the present invention relates to a thin film transistor that includes a zinc oxide (ZnO series) electrode having one or more of Si, Mo, and W as a source electrode and a drain electrode, and a method of manufacturing the same.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: July 9, 2013
    Assignee: LG Chem, Ltd.
    Inventor: Jung-Hyoung Lee
  • Patent number: 8476628
    Abstract: Disclosed herein is a device using an oxide semiconductor, the device including a circuit part configured to include a thin film transistor using the oxide semiconductor as a channel material, wherein the circuit part has a lower interconnect, an upper interconnect, and an interlayer insulating film, the interlayer insulating film includes an oxide semiconductor layer and a channel protective layer, and the channel protective layer is interposed between an outer circumferential surface of a rising part of the oxide semiconductor layer corresponding to thickness of the lower interconnect and the upper interconnect.
    Type: Grant
    Filed: October 17, 2011
    Date of Patent: July 2, 2013
    Assignee: Sony Corporation
    Inventors: Tetsuo Minami, Katsuhide Uchino
  • Patent number: 8476626
    Abstract: It is an object to provide a semiconductor device with a novel structure. The semiconductor device includes memory cells connected to each other in series and a capacitor. One of the memory cells includes a first transistor connected to a bit line and a source line, a second transistor connected to a signal line and a word line, and a capacitor connected to the word line. The second transistor includes an oxide semiconductor layer. A gate electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, and one electrode of the capacitor are connected to one another.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: July 2, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Publication number: 20130161604
    Abstract: A pixel structure and a manufacturing method thereof are provided. The pixel structure includes a substrate, a scan line, a data line, a first insulating layer, an active device, a second insulating layer, a common electrode and a first pixel electrode. The data line crossed to the scan line is disposed on the substrate and includes a linear transmitting part and a cross-line transmitting part. The first insulating layer covering the scan line and the linear transmitting part is disposed between the scan line and the cross-line transmitting part. The active device, including a gate, an oxide channel, a source and a drain, is connected to the scan line and the data line. The second insulating layer is disposed on the oxide channel and the linear transmitting part. The common electrode is disposed above the linear transmitting part. The first pixel electrode is connected to the drain.
    Type: Application
    Filed: July 4, 2012
    Publication date: June 27, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Te-Chun Huang, Hsiang-Lin Lin, Kuo-Yu Huang
  • Patent number: 8471252
    Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. A metal oxide layer having higher carrier concentration than the semiconductor layer is provided intentionally as the buffer layer between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: June 25, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hidekazu Miyairi, Kengo Akimoto, Kojiro Shiraishi
  • Patent number: 8466462
    Abstract: A thin film transistor (TFT) including a gate electrode, an active layer, and source and drain electrodes. The active layer includes contact regions that contact the source and drain electrodes, which are thinner than a remaining region of the active layer. The contact regions reduce the contact resistance between the active material layer and the source and drain electrodes.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: June 18, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun-Joong Chung, Min-Kyu Kim, Jong-Han Jeong, Yeon-Gon Mo
  • Patent number: 8461597
    Abstract: Transistors, methods of manufacturing a transistor, and electronic devices including a transistor are provided, the transistor includes a channel layer, a source and a drain respectively contacting opposing ends of the channel layer, a gate corresponding to the channel layer, a gate insulating layer between the channel layer and the gate, and a first passivation layer and a second passivation layer sequentially disposed on the gate insulating layer. The first passivation layer covers the source, the drain, the gate, the gate insulating layer and the channel layer. The second passivation layer includes fluorine (F).
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: June 11, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-il Kim, Jae-chul Park, Sang-wook Kim, Young-soo Park, Chang-jung Kim
  • Patent number: 8455869
    Abstract: An oxide thin film transistor (TFT) and its fabrication method are disclosed. In a TFT of a bottom gate structure using amorphous zinc oxide (ZnO)-based semiconductor as an active layer, source and drain electrodes are formed, on which the active layer made of oxide semiconductor is formed to thus prevent degeneration of the oxide semiconductor in etching the source and drain electrodes.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: June 4, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Hyun-Sik Seo, Jong-Uk Bae, Dae-Hwan Kim
  • Publication number: 20130134412
    Abstract: To reduce oxygen vacancies in an oxide semiconductor film and the vicinity of the oxide semiconductor film and to improve electric characteristics of a transistor including the oxide semiconductor film. A semiconductor device includes a gate electrode whose Gibbs free energy for oxidation is higher than that of a gate insulating film. In a region where the gate electrode is in contact with the gate insulating film, oxygen moves from the gate electrode to the gate insulating film, which is caused because the gate electrode has higher Gibbs free energy for oxidation than the gate insulating film. The oxygen passes through the gate insulating film and is supplied to the oxide semiconductor film in contact with the gate insulating film, whereby oxygen vacancies in the oxide semiconductor film and the vicinity of the oxide semiconductor film can be reduced.
    Type: Application
    Filed: November 12, 2012
    Publication date: May 30, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY CO.
  • Patent number: 8450732
    Abstract: Oxide semiconductors and thin film transistors (TFTs) including the same are provided. An oxide semiconductor includes Zn atoms and at least one of Ta and Y atoms added thereto. A thin film transistor (TFT) includes a channel including an oxide semiconductor including Zn atoms and at least one of Ta and Y atoms added thereto.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: May 28, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-jung Kim, Sang-wook Kim, Sun-il Kim
  • Patent number: 8450736
    Abstract: A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: May 28, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young-Wook Lee, Woo-Geun Lee, Ki-Won Kim, Hyun-Jung Lee, Ji-Soo Oh
  • Publication number: 20130126861
    Abstract: An amorphous region with low density is formed in an oxide insulating film containing zirconium. The amount of oxygen released from such an oxide insulating film containing zirconium by heating is large and a temperature at which oxygen is released is higher in the oxide insulating film than in a conventional oxide film (e.g., a silicon oxide film). When the insulating film is formed using a sputtering target containing zirconium in an oxygen atmosphere, the temperature of a surface on which the insulating film is formed may be controlled to be lower than a temperature at which a film to be formed starts to crystallize.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 23, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 8445905
    Abstract: An object is to increase an aperture ratio of a semiconductor device. The semiconductor device includes a driver circuit portion and a display portion (also referred to as a pixel portion) over one substrate. The driver circuit portion includes a channel-etched thin film transistor for a driver circuit, in which a source electrode and a drain electrode are formed using metal and a channel layer is formed of an oxide semiconductor, and a driver circuit wiring formed using metal. The display portion includes a channel protection thin film transistor for a pixel, in which a source electrode layer and a drain electrode layer are formed using an oxide conductor and a semiconductor layer is formed of an oxide semiconductor, and a display portion wiring formed using an oxide conductor.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: May 21, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichiro Sakata, Hiroyuki Miyake, Hideaki Kuwabara, Ikuko Kawamata
  • Publication number: 20130119377
    Abstract: By reducing the contact resistance between an oxide semiconductor film and a metal film, a transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device includes a pair of electrodes over an insulating surface; an oxide semiconductor film in contact with the pair of electrodes; a gate insulating film over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film interposed therebetween. In the semiconductor device, the pair of electrodes contains a halogen element in a region in contact with the oxide semiconductor film. Further, plasma treatment in an atmosphere containing fluorine can be performed so that the pair of electrodes contains the halogen element in a region in contact with the oxide semiconductor film.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 16, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20130119373
    Abstract: A highly reliable semiconductor device is provided. Over an oxide semiconductor layer in which a channel is formed, an insulating layer including the oxide semiconductor material having a higher insulating property than an oxide semiconductor layer is formed. A material which contains an element M and is represented by a chemical formula InMZnOX (X>0) or an oxide material which contains an element M1 and an element M2 and is represented by a chemical formula InM1XM2(1?X)ZnO (0<X<1+? where ? is less than 0.3 and (1?X)>0) is used as the oxide semiconductor material having a high insulating property. Ti, Zr, Hf, Ge, Ce, or Y is used as the element M and the element M2, for example. Ga is used as the element M1, for example.
    Type: Application
    Filed: October 18, 2012
    Publication date: May 16, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semicondutor Energy Laboratory Co., Ltd.
  • Patent number: 8441010
    Abstract: In a transistor including an oxide semiconductor, hydrogen in the oxide semiconductor leads to degradation of electric characteristics of the transistor. Thus, an object is to provide a semiconductor device having good electrical characteristics. An insulating layer in contact with an oxide semiconductor layer where a channel region is formed is formed by a plasma CVD method using a silicon halide. The insulating layer thus formed has a hydrogen concentration less than 6×1020 atoms/cm3 and a halogen concentration greater than or equal to 1×1020 atoms/cm3; accordingly, hydrogen diffusion into the oxide semiconductor layer can be prevented and hydrogen in the oxide semiconductor layer is inactivated or released from the oxide semiconductor layer by the halogen, whereby a semiconductor device having good electrical characteristics can be provided.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: May 14, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuhiro Ichijo, Toshiya Endo, Kunihiko Suzuki, Yasuhiko Takemura
  • Patent number: 8441007
    Abstract: A display device includes a first wiring functioning as a gate electrode formed over a substrate, a gate insulating film formed over the first wiring, a second wiring and an electrode layer provided over the gate insulating film, and a high-resistance oxide semiconductor layer formed between the second wiring and the electrode layer are included. In the structure, the second wiring is formed using a stack of a low-resistance oxide semiconductor layer and a conductive layer over the low-resistance oxide semiconductor layer, and the electrode layer is formed using a stack of the low-resistance oxide semiconductor layer and the conductive layer which is stacked so that a region functioning as a pixel electrode of the low-resistance oxide semiconductor layer is exposed.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: May 14, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuyuki Arai
  • Publication number: 20130105792
    Abstract: A material suitable for a semiconductor included in a transistor, a diode, or the like is provided. The material is an oxide material including In, M1, M2 and Zn, in which M1 is an element in the group 13 of the periodic table, a typical example thereof is Ga, and M2 is an element whose content is less than the content of M1. Examples of M2 are Ti, Zr, Hf, Ge, Sn, and the like. To contain M2 leads to suppression of generation of oxygen vacancies in the oxide material. A transistor which includes as few oxygen vacancies as possible can be achieved, whereby reliability of a semiconductor device can be increased.
    Type: Application
    Filed: October 22, 2012
    Publication date: May 2, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20130105865
    Abstract: A semiconductor device includes a base insulating film including silicon, an oxide semiconductor film over the base insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode which is in contact with the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The oxide semiconductor film includes a region in which a concentration of silicon distributed from the interface with the base insulating film toward an inside of the oxide semiconductor film is lower than or equal to 1.0 at. %. A crystal portion is included at least in the region.
    Type: Application
    Filed: October 18, 2012
    Publication date: May 2, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20130099228
    Abstract: A passivation layer solution composition is provided. A passivation layer solution composition according to an exemplary embodiment of the present invention includes an organic siloxane resin represented by Chemical Formula 1 below. In Chemical Formula 1, R is at least one substituent selected from a saturated hydrocarbon or an unsaturated hydrocarbon having from 1 to about 25 carbon atoms, and x and y may each independently be from 1 to about 200, and wherein each wavy line indicates a bond to an H atom or to an x siloxane unit or a y siloxane unit, or a bond to an x siloxane unit or a y siloxane unit of another siloxane chain comprising x siloxane units or y siloxane units or a combination thereof.
    Type: Application
    Filed: June 27, 2012
    Publication date: April 25, 2013
    Inventors: Byung Du Ahn, Seung Ho Yeon, Sei-Yong Park, Mi-Hyae Park, Bu Sop Song, Tae Gweon Lee, Jun Hyun Park, Je Hun Lee, Jae Woo Park
  • Publication number: 20130099232
    Abstract: To provide a highly reliable semiconductor device which includes a transistor including an oxide semiconductor, in a semiconductor device including a staggered transistor having a bottom-gate structure provided over a glass substrate, a gate insulating film in which a first gate insulating film and a second gate insulating film, whose compositions are different from each other, are stacked in this order is provided over a gate electrode layer. Alternatively, in a staggered transistor having a bottom-gate structure, a protective insulating film is provided between a glass substrate and a gate electrode layer. A metal element contained in the glass substrate has a concentration lower than or equal to 5×1018 atoms/cm3 (preferably, lower than or equal to 1×1018 atoms/cm3) at the interface between the first gate insulating film and the second gate insulating film or the interface between the gate electrode layer and a gate insulating film.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 25, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20130099231
    Abstract: A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. In a semiconductor device including a bottom-gate transistor in which an insulating layer functioning as a channel protective film is provided over an oxide semiconductor film, elements contained in an etching gas can be prevented from remaining as impurities on a surface of the oxide semiconductor film by performing impurity-removing process after formation of an insulating layer provided over and in contact with the oxide semiconductor film and/or formation of source and drain electrode layers. The impurity concentration in the surface of the oxide semiconductor film is lower than or equal to 5×1018 atoms/cm3, preferably lower than or equal to 1×1018 atoms/cm3.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 25, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20130099233
    Abstract: A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device is manufactured with a high yield to achieve high productivity. In the manufacture of a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are sequentially stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film, the source electrode layer and the drain electrode layer are formed through an etching step and then a step for removing impurities which are generated by the etching step and exist on a surface of the oxide semiconductor film and in the vicinity thereof is performed.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 25, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: SEMICONDUCTOR ENERGY LABORATORY CO.
  • Publication number: 20130099240
    Abstract: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.
    Type: Application
    Filed: October 12, 2012
    Publication date: April 25, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Hyun-Jung LEE, Sung-Haeng CHO, Woo-Geun LEE, Jang-Hoon HA, Hee-Jun BYEON, Ji-Yun HONG, Ji-Soo OH
  • Patent number: 8426853
    Abstract: An object is to provide a UV sensor with high accuracy, which can be manufactured at low cost and formed over a flexible substrate. A semiconductor device includes a transistor having an oxide semiconductor film, and a voltage source electrically connected to a gate of the transistor, in which a threshold voltage of the transistor is changed by irradiating the oxide semiconductor film with UV rays; a change in the threshold voltage of the transistor is dependent on a wavelength of the UV rays with which the oxide semiconductor film is irradiated, and the voltage source adjusts a voltage output to the gate of the transistor.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Saito, Yuta Uemura
  • Publication number: 20130092930
    Abstract: A semiconductor device that is less influenced by variations in characteristics between transistors or variations in a load, and is efficient even for normally-on transistors is provided. The semiconductor device includes at least a transistor, two wirings, three switches, and two capacitors. A first switch controls conduction between a first wiring and each of a first electrode of a first capacitor and a first electrode of a second capacitor. A second electrode of the first capacitor is connected to a gate of the transistor. A second switch controls conduction between the gate and a second wiring. A second electrode of the second capacitor is connected to one of a source and a drain of the transistor. A third switch controls conduction between the one of the source and the drain and each of the first electrode of the first capacitor and the first electrode of the second capacitor.
    Type: Application
    Filed: October 12, 2012
    Publication date: April 18, 2013
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 8421083
    Abstract: In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: April 16, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Masashi Tsubuku, Toshinari Sasaki, Hideaki Kuwabara
  • Patent number: 8409916
    Abstract: A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: April 2, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kap-Soo Yoon, Sung-Hoon Yang, Byoung-June Kim, Czang-Ho Lee, Sung-Ryul Kim, Hwa-Yeul Oh, Jae-Ho Choi, Yong-Mo Choi
  • Patent number: 8410479
    Abstract: Transistors, electronic devices including a transistor and methods of manufacturing the same are provided, the transistor includes an oxide semiconductor layer (as a channel layer) having compositions that vary in one direction. The channel layer may be an oxide layer including a first element, a second element, and Zn, which are metal elements. The amount of at least one of the first element, the second element, and Zn may change in a deposition direction of the channel layer. The first element may be any one of hafnium (Hf), yttrium (Y), tantalum (Ta), zirconium (Zr), gallium (Ga), aluminum (Al) or combinations thereof. The second element may be indium (In). The channel layer may have a multi-layered structure including at least two layers with different compositions.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: April 2, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-wook Kim, Chang-jung Kim, Jae-chul Park, Sun-il Kim
  • Publication number: 20130075722
    Abstract: A highly reliable structure for high-speed response and high-speed driving of a semiconductor device, in which on-state characteristics of a transistor are increased is provided. In the coplanar transistor, an oxide semiconductor layer, a source and drain electrode layers including a stack of a first conductive layer and a second conductive layer, a gate insulating layer, and a gate electrode layer are sequentially stacked in this order. The gate electrode layer is overlapped with the first conductive layer with the gate insulating layer provided therebetween, and is not overlapped with the second conductive layer with the gate insulating layer provided therebetween.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 28, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Atsuo ISOBE, Yutaka OKAZAKI, Takehisa HATANO, Sachiaki TEZUKA, Suguru HONDO, Toshihiko SAITO
  • Publication number: 20130075719
    Abstract: According to one embodiment, a thin film transistor includes a substrate, a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, a source electrode, and a drain electrode. The gate electrode is provided on a part of the substrate. The first insulating film covers the gate electrode. The oxide semiconductor film is provided on the gate electrode via the first insulating film. The second insulating film is provided on a part of the oxide semiconductor film. The source and drain electrodes are respectively connected to first and second portions of the oxide semiconductor film not covered with the second insulating film. The oxide semiconductor film includes an oxide semiconductor. Concentrations of hydrogen contained in the first and second insulating films are not less than 5×1020 atm/cm3, and not more than 1019 atm/cm3, respectively.
    Type: Application
    Filed: May 30, 2012
    Publication date: March 28, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shintaro NAKANO, Tomomasa UEDA, Kentaro MIURA, Nobuyoshi SAITO, Tatsunori SAKANO, Hajime YAMAGUCHI
  • Publication number: 20130075720
    Abstract: An oxide semiconductor includes a first material including at least one selected from the group consisting of zinc (Zn) and tin (Sn), and a second material, where a value acquired by subtracting an electronegativity difference value between the second material and oxygen (O) from the electronegativity difference value between the first material and oxygen (O) is less than about 1.3.
    Type: Application
    Filed: July 20, 2012
    Publication date: March 28, 2013
    Applicants: Kobe Steel, Ltd., SAMSUNG DISPLAY CO., LTD.
    Inventors: Byung Du AHN, Je Hun LEE, Sei-Yong PARK, Jun Hyun PARK, Gun Hee KIM, Ji Hun LIM, Jae Woo PARK, Jin Seong PARK, Toshihiro KUGIMIYA, Aya MIKI, Shinya MORITA, Tomoya KISHI, Hiroaki TAO
  • Publication number: 20130069059
    Abstract: A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.
    Type: Application
    Filed: November 8, 2012
    Publication date: March 21, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 8395151
    Abstract: A thin film transistor having (a) an oxide semiconductor film including a channel region composed of an oxide semiconductor, and a source electrode region and a drain electrode region that are composed of the same oxide semiconductor as that of the channel region and have a higher carrier density than that of the channel region; (b) a gate insulating film; and (c) a gate electrode.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventors: Shina Kirita, Toshitaka Kawashima
  • Publication number: 20130056728
    Abstract: Provided is a thin film transistor capable of improving reliability in the thin film transistor including an oxide semiconductor layer. A thin film transistor including: a gate electrode; a gate insulating film formed on the gate electrode; an oxide semiconductor layer forming a channel region corresponding to the gate electrode on the gate insulating film; a channel protective film formed at least in a region corresponding to the channel region on the oxide semiconductor layer; and a source/drain electrode. A top face and a side face of the oxide semiconductor layer are covered with the source/drain electrode and the channel protective layer on the gate insulating film.
    Type: Application
    Filed: October 31, 2012
    Publication date: March 7, 2013
    Applicant: SONY CORPORATION
    Inventor: SONY CORPORATION
  • Publication number: 20130056726
    Abstract: A flat panel display device with an oxide thin film transistor and a fabricating method thereof are disclosed. The fabricating method of the flat panel display device includes: preparing a substrate defined into a pixel region and a pad contact region; forming a gate electrode and a link line; forming a pixel electrode within the pixel region; forming an oxide layer on the substrate provided with the pixel electrode; forming a passivation layer on the substrate and performing a formation process of contact holes to expose the link line; and forming a second transparent conductive material film on the substrate.
    Type: Application
    Filed: August 16, 2012
    Publication date: March 7, 2013
    Inventors: Ji Eun Chae, Jung Eun Ahn, Tae Keun Lee
  • Publication number: 20130056727
    Abstract: A semiconductor device which is miniaturized and has sufficient electrical characteristics to function as a transistor is provided. In a semiconductor device including a transistor in which a semiconductor layer, a gate insulating layer, and a gate electrode layer are stacked in that order, an oxide semiconductor film which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and in which the percentage of the indium is twice or more as large as each of the percentage of the gallium and the percentage of the zinc when the composition of the four elements is expressed in atomic percentage is used as the semiconductor layer. In the semiconductor device, the oxide semiconductor film is a film to which oxygen is introduced in the manufacturing process and contains a large amount of oxygen, and an insulating layer including an aluminum oxide film is provided to cover the transistor.
    Type: Application
    Filed: September 4, 2012
    Publication date: March 7, 2013
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Naoto YAMADE, Junichi KOEZUKA