Packaging (epo) Patents (Class 257/E33.056)
  • Patent number: 8535959
    Abstract: The present invention relates to a method for manufacturing large lighting which uses a power LED, such as for large LED lighting for street lamps, which incorporates a heat dissipation device that has the ability to dissipate heat with natural convection to maintain ambient temperature. The disclosed method is novel applied technology for producing a large LED lighting, such as for street lamps, which has a power LED device with a unique, rear heat dissipation capability. In addition to maximum thermal efficiency by heat dissipation, the present LED lighting system also increases luminous efficiency by providing high light emission with only a small quantity of LED power.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: September 17, 2013
    Inventor: Young Seob Lee
  • Publication number: 20130234149
    Abstract: A light emitting diode is made using a laser to texture the sidewalls of the bottom contact layer, without damaging a mesa. To do so, the substrate is mounted on a laser machining platform, and trenches are cut along lines through the semiconductor layer on the substrate using a first sequence of laser pulses having short pulse lengths that result in formation of textured sidewalls in the trenches, without causing recasting of the material. Then the substrate can be scribed along the lines of the trenches using a second sequence of laser pulses for singulation of die.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 12, 2013
    Applicant: ELECTRO SCIENTIFIC INDUSTRIES, INC.
    Inventors: JONATHAN D. HALDERMAN, JUAN CHACIN, IRVING CHYR
  • Patent number: 8530909
    Abstract: Various embodiments of solid state lighting (“SSL”) assemblies with high voltage SSL dies and methods of manufacturing are described herein. In one embodiment, an array assembly of SSL dies includes a first terminal and a second terminal configured to receive an input voltage (Vo). The array assembly also includes a plurality of SSL dies coupled between the first terminal and the second terminal, at least some of which are high voltage SSL dies coupled in parallel.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: September 10, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Martin F. Schubert
  • Patent number: 8530925
    Abstract: Provided are a light emitting device package and a lighting system including the same. The light emitting device package includes: a body, a plurality of electrode layers, a light emitting device, and a molding member. The body includes a plurality of pits. The electrode layers include first protrusions disposed in the pits, and second protrusions protruding in a direction opposite to the first protrusions. The light emitting device is disposed on at least one of the plurality of electrode layers. The molding member is disposed on the light emitting device.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: September 10, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hye Young Kim
  • Patent number: 8530921
    Abstract: A monolithic LED chip is disclosed comprising a plurality of junctions or sub-LEDs (“sub-LEDs”) mounted on a submount. The sub-LEDs are serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. Methods for fabricating a monolithic LED chip are also disclosed with one method comprising providing a single junction LED on a submount and separating the single junction LED into a plurality of sub-LEDs. The sub-LEDs are then serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of the serially interconnected sub-LEDs and the junction voltage of the sub-LEDs.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: September 10, 2013
    Assignee: Cree, Inc.
    Inventors: James Ibbetson, Sten Heikman
  • Patent number: 8530918
    Abstract: Disclosed are a light emitting device package and a lighting system. The light emitting device package includes a body including a cavity and formed in a transmittive material; a plurality of lead electrodes in the cavity; an isolation member disposed between the lead electrodes; a light emitting device electrically connected to the lead electrodes in the cavity; and a molding member on the light emitting device.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: September 10, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventor: Ji Won Jang
  • Patent number: 8525213
    Abstract: A light emitting device and a light unit including the same are provided. The light emitting device includes a body, a first cavity disposed at a center of the body, the first cavity having an open upper side, a second cavity disposed around an upper portion of the body, the second cavity being spaced from the first cavity, first and second lead electrodes disposed within the first cavity, a light emitting chip disposed on at least one of the first and second lead electrodes, and a first molding member in the first cavity. The second cavity has an upper width greater than a lower width thereof and a side surface of the second cavity is formed of a vertical side surface with respect to a top surface of the body.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: September 3, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Hyung Hwa Park, Joo Seok Lee
  • Publication number: 20130221380
    Abstract: A method for manufacturing a plurality of optoelectronic apparatuses include attaching bottom surfaces of a plurality of packaged optoelectronic semiconductor devices (POSDs) to a carrier substrate (e.g., a tape) so that there is a space between each POSD and its one or more neighboring POSD(s). A light reflective molding compound is molded around a portion each of the POSDs attached to the carrier substrate so that a reflector cup is formed from the light reflective molding compound for each of the POSDs. The light reflective molding compound can also attach the POSDs to one another. Alternatively, an opaque molding compound can be molded around each POSD/reflector cup to attach the POSDs/reflector cups to one another and form a light barrier between each POSD and its neighboring POSD(s). The carrier substrate is thereafter removed so that electrical contacts on the bottom surfaces of the POSDs are exposed.
    Type: Application
    Filed: April 30, 2012
    Publication date: August 29, 2013
    Applicant: INTERSIL AMERICAS INC.
    Inventors: Seshasayee (Sai) S. Ankireddi, Lynn K. Wiese
  • Patent number: 8519424
    Abstract: Mosaic devices including an apparatus includes at least one electroluminescence (EL) device and a system substrate. The at least one EL device can be configured to be coupled mechanically and electrically to the system substrate. The system substrate can be configured to receive the at least one EL device at a non-discrete location or orientation. The system substrate can be a smart system substrate configured to automatically identify a device type. The EL device can be an area-emitting device such as an organic light emitting diode (OLED) device.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: August 27, 2013
    Assignee: Plextronics, Inc.
    Inventors: Troy D. Hammond, Lisa Pattison, Venkataramanan Seshadri
  • Publication number: 20130214295
    Abstract: Heat spreading substrate. In an embodiment in accordance with the present invention, an apparatus includes a first conductive layer, a first insulating layer disposed in contact with the first conductive layer and a thermally conductive layer disposed in contact with the first insulating layer, opposite the first conductive layer. The faces of the first conductive layer, the first insulating layer and the thermally conductive layer are substantially co-planar; and a sum of widths of faces of the first conductive layer, the first insulating layer and the thermally conductive layer is greater than a height of the faces. The first conductive layer and the first insulating layer may include rolled materials.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Applicant: INVENSAS CORPORATION
    Inventor: Gabriel Z. Guevara
  • Publication number: 20130214297
    Abstract: A high voltage light emitting diode chip and its manufacturing method are provided. The high voltage light emitting diode chip can be manufactured by forming a plurality of light emitting diode units on a substrate and electrically connecting the light emitting diode units, wherein a trench with a width of about 0.5 ?m to about 7 ?m is present between every two adjacent light emitting diode units to isolate the light emitting diode units. The procedure for manufacturing the high voltage light emitting diode chip is simple and the high voltage light emitting diode chip that is produced can exhibit satisfying luminous efficiency.
    Type: Application
    Filed: May 7, 2012
    Publication date: August 22, 2013
    Applicant: WALSIN LIHWA CORPORATION
    Inventors: Chih-Wei YANG, Ching-Hwa CHANG JEN
  • Patent number: 8513040
    Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. A film material layer is formed on a support substrate. A first heating process for the film material layer at a first temperature to form a film layer and a second heating process for a second region surrounding a first region at a second temperature higher than the first temperature are performed. The first region is provided in a central part of the film layer. A display layer is formed in the first region and a peripheral circuit section is formed at least in a part of the second region. A third heating process is performed for at least a part of the film layer at a third temperature higher than the second temperature. In addition, the film layer is peeled off from the support substrate.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: August 20, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsunori Sakano, Kentaro Miura, Nobuyoshi Saito, Shintaro Nakano, Tomomasa Ueda, Hajime Yamaguchi
  • Publication number: 20130207127
    Abstract: An integrated circuit package includes a substrate having a recess formed along at least a portion of a perimeter of the substrate, and an optical die having opto-electric circuitry, the optical die coupled to the substrate such that a portion of the optical die with the opto-electric circuitry overhangs the recess. The integrated circuit package also includes an optical unit disposed in the recess such that optical signals emitted by the opto-electric circuitry are reflected away from the substrate and incident optical signals are reflected onto the opto-electric circuitry.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: FutureWei Technologies, Inc.
    Inventors: Fei Yu, Qi Deng
  • Publication number: 20130207130
    Abstract: Light emitter devices having improved light output and related methods are disclosed. In one embodiment, light emitter devices can include a light emission area including one or more light emitting chips. The emitter device can further include a filling material at least partially disposed over the one or more light emitting chips. The filling material can include a first discrete layer of phosphor containing material and a second discrete layer of optically clear material. The device can optionally include more than one discrete layer of optically clear material. Each of the discrete layers of material can be separately dispensed within the light emission area such that the filling material is dispensed to a level that is substantially flush with an upper surface of the emitter device.
    Type: Application
    Filed: April 11, 2012
    Publication date: August 15, 2013
    Inventor: Jesse Colin Reiherzer
  • Publication number: 20130207129
    Abstract: An LED area light module has a substrate and a circuit layer and a solder mask layer formed on the substrate. The solder mask layer partially covers the circuit layer for the partially exposed circuit layer to form multiple electrical contacts. An embankment wall is formed on the solder mask layer with a solder mask material for the electrical contacts to be located within the embankment wall. Multiple LED chips are mounted on the solder mask layer within the embankment wall and electrically connected to the electrical contacts. Optically-transmissive adhesive is filled and concentrated within the embankment wall and covers the LED chips by a tension force thereof, and forms an optically-transmissive adhesive layer after congealed. Accordingly, the LED area light module eliminates the use of thick frame made of metal or rubber and steps of manufacturing and mounting the frame to simplify the packaging processes.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: UNISTAR OPTO CORPORATION
    Inventors: Chin-Lung LIN, Yen-Chang TU, Pai-Ti LIN, Che-Chang HU
  • Publication number: 20130207126
    Abstract: A method for manufacturing an optoelectronic apparatus includes attaching bottom surfaces of first and second packaged optoelectronic semiconductor devices (POSDs) to a carrier substrate (e.g., a tape) so that there is a space between the first and second POSDs. An opaque molding compound is molded around portions of the first and second POSDs attached to the carrier substrate, so that peripheral surfaces of the first POSD and the second POSD are surrounded by the opaque molding compound, the space between the first and second POSDs is filled with the opaque molding compound, and the first and second POSDs are attached to one another by the opaque molding compound. The carrier substrate is thereafter removed so that electrical contacts on the bottom surfaces of the first and second POSDs are exposed. A window for each of the POSDs is formed during the molding process or thereafter.
    Type: Application
    Filed: March 27, 2012
    Publication date: August 15, 2013
    Applicant: INTERSIL AMERICAS LLC
    Inventors: Seshasayee (Sai) S. Ankireddi, Lynn K. Wiese
  • Patent number: 8507940
    Abstract: The package substrates with through silicon plugs (or vias) described above provide lateral and vertical heat dissipation pathways for semiconductor chips that require thermal management. Designs of through silicon plugs (TSPs) with high duty ratios can most effectively provide heat dissipation. TSP designs with patterns of double-sided combs can provide high duty ratios, such as equal to or greater than 50%. Package substrates with high duty ratios are useful for semiconductor chips that generate large amount of heat. An example of such semiconductor chip is a light-emitting diode (LED) chip.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: August 13, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Hung-Pin Chang, Yung-Chi Lin, Chia-Lin Yu, Jui-Pin Hung, Chien Ling Hwang
  • Patent number: 8507309
    Abstract: A photosensor comprises a photoelectric conversion device region and a connection pad on the lower surface of a semiconductor substrate, and also comprises a wiring line connected to the connection pad via insulating film under the semiconductor substrate, and a columnar electrode as an external connection electrode connected to the wiring line. As a result, as compared with the case where the photoelectric conversion device region and the connection pad connected to the photoelectric conversion device region are formed on the upper surface of the semiconductor substrate, a piercing electrode for connecting the connection pad and the wiring line does not have to be formed in the semiconductor substrate. Thus, the number of steps can be smaller, and a fabrication process can be less restricted.
    Type: Grant
    Filed: May 25, 2011
    Date of Patent: August 13, 2013
    Assignee: Teramikros, Inc.
    Inventors: Ichiro Mihara, Takeshi Wakabayashi
  • Publication number: 20130201669
    Abstract: The present disclosure involves an LED illumination apparatus. The illumination apparatus includes a substrate and a plurality of LED modules disposed over the substrate according to a predefined layout pattern. The layout pattern includes a row having a vertically-aligned LED module located laterally adjacent to a first horizontally-aligned LED module and a second horizontally-aligned LED module. The layout pattern also includes a column having a horizontally-aligned LED module located laterally adjacent to a first vertically-aligned LED module and a second vertically-aligned LED module. The layout pattern further includes a row of horizontally-aligned LED modules located laterally adjacent to one another. The illumination apparatus also includes a diffuser disposed over the plurality of LED modules. Each LED module also includes a secondary optical component providing an asymmetric light pattern.
    Type: Application
    Filed: February 3, 2012
    Publication date: August 8, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Wei-Yu Yeh, Pei-Wen Ko
  • Patent number: 8502261
    Abstract: Side-mountable semiconductor light emitting device packages include an electrically insulating substrate having a front face and a back face and a side face extending therebetween. The side face is configured for mounting on an underlying surface. An electrically conductive contact is provided proximate an edge of the substrate on the back face of the substrate and/or on a recessed region on the side face of the substrate. The contact is positioned to be positioned proximate an electrical connection region of the underlying surface when the semiconductor light emitting device package is side mounted on the underlying surface. A conductive trace extends along the front face of the substrate and is electrically connected to the contact. A semiconductor light emitting device is mounted on the front face of the substrate and electrically connected to the conductive trace.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: August 6, 2013
    Assignee: Cree, Inc.
    Inventor: Ban P. Loh
  • Patent number: 8502258
    Abstract: A semiconductor structure having an electrically conducting silicon substrate and a GaN semiconductor device separated from the substrate by a buffer layer is provided. The buffer layer electrically connects the silicon substrate with the GaN semiconductor device. In addition, a GaN LED arranged in a flip chip orientation on the buffer layer on the substrate is provided.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: August 6, 2013
    Assignee: RFMD (UK) Limited
    Inventor: Matthew F. O'Keefe
  • Patent number: 8492777
    Abstract: A light emitting diode (LED) package includes a LED package substrate, first LED chips and second LED chips. The LED package substrate includes a substrate, a first bonding pad, second bonding pads and a third bonding pad. The first, second and third bonding pads are disposed on the substrate. The second bonding pads are arranged in an array. The first and third bonding pads are located adjacent respectively to first and last column of the array. The first LED chips are die-bonded on the first bonding pad and wire-bonded respectively to the second bonding pads arranged in first column of the array. The second LED chips are die-bonded on the second bonding pads respectively. In each row except last column, each second LED chip is wire-bonded to the second bonding pad arranged in next column. The second LED chips located in last column are wire-bonded to the third bonding pad.
    Type: Grant
    Filed: April 2, 2011
    Date of Patent: July 23, 2013
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Chung-Chuan Hsieh, Yi-Chun Chen, Yi-Ting Chiu
  • Publication number: 20130175551
    Abstract: A slim LED package configured to handle large current, having a narrow width, an LED chip mounting area positioned centro-symmetrically within the package, mounting holes positioned equidistantly from the mounting area, wherein multiple packages may be arranged with alternating anode and cathode ends in such a manner that a high-power density radiometric flux line may be created. Some embodiments include current density management areas positioned on one more sides of the LED chip mounting area.
    Type: Application
    Filed: May 10, 2012
    Publication date: July 11, 2013
    Applicant: LUMINUS DEVICES, INC.
    Inventors: Michael Lim, Paul Panaccione, Aaron Breen, Michael Hadley
  • Patent number: 8482018
    Abstract: Disclosed is a light emitting device. The light emitting device comprises a light emitting semiconductor layer comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, a second electrode layer supporting the light emitting semiconductor layer while surrounding the light emitting semiconductor layer, and a first passivation layer between a side of the light emitting semiconductor layer and the second electrode layer.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: July 9, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Bong Cheol Kang, Duk Kyu Bae
  • Patent number: 8482026
    Abstract: An optoelectronic component includes a semiconductor body and a carrier substrate connected to the semiconductor body with a solder joint, wherein the carrier substrate includes first and second apertures, through which first and second electrically conductive connecting layers are guided from a first primary surface of the carrier substrate facing away from the semiconductor body to a second primary surface of the carrier substrate facing away from the semiconductor body, the carrier substrate made of a semiconductor material and having side flanks, which run obliquely to the primary surfaces at least in a first partial region, wherein the side flanks are provided with an electrically insulating layer in the first partial region.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: July 9, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Lutz Höppel
  • Publication number: 20130168722
    Abstract: An SMT LED device includes an LED and a circuit board carrying the LED. The circuit board has two copper pads thereon, each being provided with a solder on an inner later side thereof which faces the other copper pad. The LED includes two pins and each pin includes a horizontal protrusion and a vertical portion. The LED is mounted on the circuit board between the two copper pads. The solders securely and electrically connect the two pins of the LED with the circuit board.
    Type: Application
    Filed: June 18, 2012
    Publication date: July 4, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIH-CHEN LAI
  • Patent number: 8476824
    Abstract: An active matrix organic electroluminescent device includes a thin-film transistor, an organic electroluminescent device, and a spacer layer deposited between the thin-film transistor and the organic electroluminescent device, wherein the spacer layer is made of adhesive for a dual curing system selected from the group consisting of ultraviolet curing-thermal curing, ultraviolet curing-microwave curing, ultraviolet curing-anaerobic curing, and ultraviolet curing-electron beam curing system. The present invention solves the poor adhesiveness between the thin-film transistor and the organic electroluminescent device, and improves the moisture and oxygen proof ability. The preparation method is simple, effective, and able to lower the cost and difficulty, and greatly improve the yield rate of the device.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: July 2, 2013
    Assignee: University of Electronic Science and Technology of China
    Inventors: Junsheng Yu, Yadong Jiang, Jian Zhong, Hui Lin
  • Patent number: 8476650
    Abstract: A film-covered LED device includes a high thermal conductive substrate, a reflector, a plurality of LED chips, and a fluorescent film. A pair of electrical contacts is respectively disposed on two ends of the high thermal conductive substrate. A thru opening is formed on the reflector, which is disposed on the high thermal conductive substrate. The LED chips are disposed on the high thermal conductive substrate and connected electrically, within the thru opening. The fluorescent film is disposed on the reflector and casted over the LED chips. Thereby, the LEDs illumination is more evenly distributed, in maintaining illumination efficiency uniformity. The yield rate is also enhanced with savings in labor cost.
    Type: Grant
    Filed: January 14, 2011
    Date of Patent: July 2, 2013
    Inventor: Pei-Ling Liao
  • Patent number: 8476653
    Abstract: A light-emitting diode (LED) package includes a first chip group, a second chip group and an optical wavelength converting substance. The first chip group includes a plurality of red LED chips configured for emitting red light. The second chip group includes a plurality of blue LED chips configured for emitting blue light. The optical wavelength converting substance is arranged on light paths of the blue LED chips. The optical wavelength converting substance is configured for partly absorbing blue light emitted from the blue LED chips and emitting visible lights with different wavelengths. The plurality of blue LED chips has a total light output larger than that of the plurality of red LED chips.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: July 2, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Jian-Shihn Tsang
  • Patent number: 8476632
    Abstract: To provide a wireless identification semiconductor device provided with a display function, which is capable of effectively utilizing electric power supplied by an electromagnetic wave. The following are included: an antenna; a power source generating circuit electrically connected to the antenna; an IC chip circuit and a display element electrically connected to the power source generating circuit; a first TFT provided in the power source generating circuit; a second TFT provided in the IC chip circuit; a third TFT provided in the display element; an insulating film provided to cover the first to third TFTs; a first source electrode and a first drain electrode, a second source electrode and a second drain electrode, and a third source electrode and a third drain electrode which are formed over the insulating film; and a pixel electrode electrically connected to the third source electrode or the third drain electrode.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: July 2, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Tokunaga
  • Patent number: 8476090
    Abstract: A circuit board for a light emitting diode package improved in heat radiation efficiency and a manufacturing method thereof. In a simple manufacturing process, insulating layers are formed by anodizing on a portion of a thermally conductive board body and plated with a conductive material. In the light emitting diode package, a board body is made of a thermally conductive metal. Insulating oxidation layers are formed at a pair of opposing edges of the board body. First conductive patterns are formed on the insulating oxidation layers, respectively. Also, second conductive patterns are formed in contact with the board body at a predetermined distance from the first conductive patterns, respectively. The light emitting diode package ensures heat generated from the light emitting diode to radiate faster and more effectively. Additionally, the insulating layers are formed integral with the board body by anodizing, thus enhancing productivity and durance.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: July 2, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Hyun Shin, Seog Moon Choi, Young Ki Lee
  • Patent number: 8476668
    Abstract: An LED chip comprising a plurality of sub-LEDs on a submount. Electrically conductive and electrically insulating features are included that serially interconnect the sub-LEDs such that an electrical signal applied to the serially interconnected sub-LEDs along the electrically conductive features spreads to the serially interconnected sub-LEDs. A via is included that is arranged to electrically couple one of the sub-LEDs to the submount. The sub-LEDs can be interconnected by more than one of the conductive features, with each one of the conductive features capable of spreading an electrical signal between two of the sub-LEDs.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: July 2, 2013
    Assignee: Cree, Inc.
    Inventors: James Ibbetson, Sten Heikman
  • Publication number: 20130161657
    Abstract: A light emitting diode package includes a triangular supporting member, a first substrate and a second substrate adhered on first and second inclined sidewalls the supporting member, respectively, a first LED chip and a second LED chip secured on the first substrate and the second substrate, respectively, and a package layer covering the first LED chip and a second LED chip. The first inclined sidewall and a bottom surface of the supporting member cooperatively form a first angle therebetween, and the second inclined sidewall and the bottom surface cooperatively form a second angle therebetween. The first angle and the second angle each range between 0 degree and 90 degrees. A method for making the light emitting diode package is also provided.
    Type: Application
    Filed: June 20, 2012
    Publication date: June 27, 2013
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chao-Hsiung Chang, Hou-Te Lin
  • Patent number: 8471241
    Abstract: Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure layer, a conductive layer, a bonding layer, a support member, first and second pads, and first and second electrodes. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The conductive layer is disposed under the light emitting structure layer. The bonding layer is disposed under the conductive layer. The support member is disposed under the bonding layer. The first pad is disposed under the support member. The second pad is disposed under the support member at a distance from the first pad. The first electrode is connected between the first conductive type semiconductor layer and the first pad. The second electrode is connected between the bonding layer and the second pad.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: June 25, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song, Ji Hyung Moon
  • Patent number: 8471284
    Abstract: An LED package structure includes: a carrier; at least a first protruding portion and a plurality of electrical contacts formed on the carrier; a plurality of LED chips disposed on the first protruding portion and on the carrier in a region free from the first protruding portion, respectively; a plurality of bonding wires electrically connecting the LED chips and the electrical contacts; and a phosphor covering the LED chips, the electrical contacts and the bonding wires. The LED chips are disposed at different heights so as to allow the portions of the phosphor on the LED chips to have different thicknesses and thus generate light with different color temperatures.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: June 25, 2013
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chieh-Lung Lai, Chih-Sheng Hsu, Chang-Yueh Chan
  • Patent number: 8470621
    Abstract: A method for fabricating flip-chip semiconductor optoelectronic devices initially flip-chip bonds a semiconductor optoelectronic chip attached to an epitaxial substrate to a packaging substrate. The epitaxial substrate is then separated using lift-off technology.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: June 25, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chester Kuo, Lung Hsin Chen, Wen Liang Tseng, Shih Cheng Huang, Po Min Tu, Ying Chao Yeh, Wen Yu Lin, Peng Yi Wu, Shih Hsiung Chan
  • Publication number: 20130153920
    Abstract: According to an embodiment, a semiconductor light emitting device includes a light emitting body including a semiconductor light emitting layer, a support substrate supporting the light emitting body, and a bonding layer provided between the light emitting body and the support substrate, the bonding layer bonding the light emitting body and the support substrate together. The device also includes a first barrier metal layer provided between the light emitting body and the bonding layer, and an electrode provided between the light emitting body and the first barrier metal layer. The first barrier layer includes a first layer made of nickel and a second layer made of a metal having a smaller linear expansion coefficient than nickel, and the first layer and the second layer are alternately disposed in a multiple-layer structure. The electrode is electrically connected to the light emitting body.
    Type: Application
    Filed: May 15, 2012
    Publication date: June 20, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yasuharu SUGAWARA
  • Patent number: 8466558
    Abstract: Provided are a semiconductor package and a semiconductor system including the semiconductor package. The semiconductor package includes a semiconductor device and an interconnect structure electrically connected to the semiconductor device and delivering a signal from the semiconductor device, wherein the interconnect structure includes an anodized insulation region and an interconnect adjacent to and defined by the anodized insulation region.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: June 18, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Wook Yoo
  • Patent number: 8461601
    Abstract: A method for producing a plurality of optoelectronic devices is specified, comprising the following steps: providing a connection carrier assemblage having a plurality of device regions, wherein at least one electrical connection region is provided in each of the device regions, providing a semiconductor body carrier, on which a plurality of separate semiconductor bodies connected to the semiconductor body carrier are arranged, wherein the semiconductor bodies each have a semiconductor layer sequence having an active region, arranging the connection carrier assemblage and the semiconductor body carrier relative to one another in such a way that the semiconductor bodies face the device regions, mechanically connecting a plurality of semiconductor bodies to the connection carrier assemblage in a mounting region of a device region assigned to the respective semiconductor body, electrically conductively connecting the respective semiconductor body to the connection region of the device region assigned to the semi
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: June 11, 2013
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Siegfried Herrmann
  • Patent number: 8455996
    Abstract: The present invention discloses a wafer level packaging method and a packaging structure for packaging a first wafer and a second wafer. The first wafer has a back side and an active side, and further, the active side of the first wafer has a MEMS element. The step of forming two through silicon vias is performed first. A first electrical interconnect and a first bonding ring are formed on the active side of the first wafer. The former connects with one of the through silicon vias, the later surrounds the MEMS element and connects with the other of the through silicon vias. The step of forming a second bonding ring and a second electrical interconnect is then performed. And then, a voltage will be applied to the through silicon vias through the back side of the first wafer.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: June 4, 2013
    Assignee: National Chiao Tung University
    Inventors: Tsung-Lin Chen, Jui-Chien Lien
  • Patent number: 8455888
    Abstract: A light emitting diode (LED) lamp including a socket, an LED module disposed on the socket, and a lamp housing assembled to the socket is provided. LED module includes a supporting member and a plurality of LED packages, wherein each LED package includes a chip carrier, a reflective member, an LED chip, a lens, and a phosphor layer. Reflective member mounted on the chip carrier has a recess for exposing parts of the chip carrier. LED chip disposed in the recess. Lens encapsulating the LED chip has a light-emitting surface, a first reflection surface bonded with the reflective member and a second reflection surface, wherein the LED chip faces the light-emitting surface of the lens.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: June 4, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Te Lin, Ming-Yao Lin, Shang-Pin Ying, Chih-Hsuan Liu, Kuang-Yu Tai
  • Patent number: 8455873
    Abstract: It is an object of the present invention to provide a high reliable EL display device and a manufacturing method thereof by shielding intruding moisture or oxygen which is a factor of deteriorating the property of an EL element without enlarging the EL display device. In the invention, application is used as a method for forming a high thermostability planarizing film 16, typically, an interlayer insulating film (a film which serves as a base film of a light emitting element later) of a TFT in which a skeletal structure is configured by the combination of silicon (Si) and oxygen (O). After the formation, an edge portion or an opening portion is formed to have a tapered shape. Afterwards, distortion is given by adding an inert element with a comparatively large atomic radius to modify or highly densify a surface (including a side surface) for preventing the intrusion of moisture or oxygen.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: June 4, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaharu Nagai, Osamu Nakamura
  • Patent number: 8450764
    Abstract: A light-emitting apparatus has a light-emitting device and a supporting board. The light-emitting device has a pair of n-electrodes with a p-electrode therebetween, on the same plane. The supporting board includes an insulating substrate on which positive and negative electrodes are formed, opposing to the p- and n-electrodes of the light-emitting device, respectively. Bonding members bond the p- and n-electrodes with the positive and negative electrodes, respectively. The positive electrode on the supporting board is formed within the width region of the p-electrode and narrower in width than the width of the p-electrode, in a cross-section along a line extending through the pair of n-electrodes. The negative electrodes oppose to the n-electrodes, respectively, with the same widths, or with that side face of each of the negative electrodes which faces the positive electrode being retracted outwardly from that side face of each of the n-electrodes which faces the p-electrode.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: May 28, 2013
    Assignee: Nichia Corporation
    Inventors: Ryo Suzuki, Tadao Hayashi
  • Patent number: 8450756
    Abstract: A formed, multi-dimensional light-emitting diode (LED) array is disclosed. A substrate is bent into a trapezoidal shape having different sections facing in different directions. Each section has one or more mounted LEDs that emit light with an azimuthally non-circular, monotonic angular distribution. A converter material is placed in an optical path of the LEDs to alter characteristics of the light from the LEDs.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: May 28, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Samuel C. Strickler, Nickolaus W. Kaiser
  • Publication number: 20130126081
    Abstract: A method of fabricating and transferring a micro device and an array of micro devices to a receiving substrate are described. In an embodiment, an electrically insulating layer is utilized as an etch stop layer during etching of a p-n diode layer to form a plurality of micro p-n diodes. In an embodiment, an electrically conductive intermediate bonding layer is utilized during the formation and transfer of the micro devices to the receiving substrate.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 23, 2013
    Inventors: Hsin-Hua Hu, Andreas Bibl, John A. Higginson, Hung-Fai Stephen Law
  • Publication number: 20130126921
    Abstract: Inverted optical device. In accordance with an embodiment of the present invention, a plurality of piggyback substrates are attached to a carrier wafer. The plurality of piggyback substrates are dissimilar in composition to the carrier wafer. The plurality of piggyback substrates are processed, while attached to the carrier wafer, to produce a plurality of integrated circuit devices. A flip wafer is attached to the plurality of light emitting diodes, away from the carrier wafer and the carrier wafer is removed. The plurality of light emitting diodes may be singulated to form individual light emitting diode devices.
    Type: Application
    Filed: November 18, 2011
    Publication date: May 23, 2013
    Applicant: INVENSAS CORPORATION
    Inventors: Ilyas Mohammed, Masud Beroz, Liang Wang
  • Patent number: 8445308
    Abstract: In accordance with certain embodiments, arrays of phosphor dots are formed and associated with arrays of light-emitting elements to form lighting systems.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: May 21, 2013
    Assignee: Cooledge Lighting Inc.
    Inventors: Jasbir N. Patel, Philippe M. Schick, Michael Tischler
  • Publication number: 20130119418
    Abstract: A method of forming can be provided by applying an optical conversion material to a mold to form a unitary layer of optical conversion material and removing the unitary layer of optical conversion material from the mold.
    Type: Application
    Filed: November 10, 2011
    Publication date: May 16, 2013
    Inventors: Matthew Donofrio, John Edmond, Peter S. Andrews
  • Patent number: 8436392
    Abstract: A light emitting diode package comprises a substrate with a first surface and a second surface opposite to each other, a circuit on the substrate, a support on the substrate for reinforcing strength of the substrate, a plurality of light emitting diodes on the substrate and electrically connected to the circuit, and a cover layer on the plurality of light emitting diodes. A method for manufacturing a light-emitting diode package is further provided.
    Type: Grant
    Filed: February 21, 2011
    Date of Patent: May 7, 2013
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventors: Chao-Hsiung Chang, Chieh-Ling Chang, Shen-Bo Lin
  • Patent number: 8436375
    Abstract: To reliably keep an LED board and a heat conductive member in close contact to improve the heat-dissipation efficiency and to reliably position an LED and an optical element, such as a lens part, arranged in a housing are a slim LED board, the housing that has an accommodating concave part to house the LED board, a heat conductive member that is arranged between the LED board and the accommodating concave part, a pressing member that has the lens part and that presses a long side edge part of the LED board against a bottom surface of the accommodating concave part of the housing, a securing mechanism for securing the LED board, the heat conductive member and the pressing member to the housing, and a positioning mechanism for positioning the lens part relative to the LED.
    Type: Grant
    Filed: June 1, 2009
    Date of Patent: May 7, 2013
    Assignee: CCS Inc.
    Inventor: Kenji Miura