Abstract: An embodiment of the invention relates to a driving circuit for an emitter-switching configuration of transistors having at least one first and one second control terminal connected to the driving circuit to form a controlled emitter-switching device having in turn respective collector, source and gate terminals. Advantageously the driving circuit comprises at least one IGBT device inserted between the collector terminal and a first end of a capacitor, whose second end is connected to the first control terminal, the IGBT device having in turn a third control terminal connected, through a first resistive element, to the gate terminal, as well as a second resistive element inserted between the gate terminal and the second control terminal. Advantageously, the driving circuit further comprises an additional supply inserted between the first and second ends of the capacitor to ensure its correct biasing.

Abstract: A switching circuit and a DC-DC converter including the same are provided. The switching circuit includes an output terminal, a plurality of input terminals, and a plurality of switches configured to selectively connect the plurality of input terminals to the output terminal. The plurality of switches include a first switch directly connected to the output terminal and a plurality of second switches connecting the plurality of input terminals to the first switch. The first switch is implemented using a high-voltage transistor. Each of the second switches is implemented using a low-voltage transistor. A gate of the high-voltage transistor is at least two times longer than a gate of the low-voltage transistor. The DC-DC converter increases or decreases a signal selected from among a plurality of input signals input through the input terminals by a predetermined voltage level.

Abstract: Method for operating a converter circuit with voltage boosting with N half-bridges, which in each case can be connected by their center connection to a phase of an N-phase generator and at an end side are connected in parallel with a series circuit formed by two capacitances, wherein each half-bridge contains a Top switch and a Bot switch, in which, in a PWM method with a fixed period duration at the beginning of the period duration, all the TOP switches are simultaneously switched on for the duration of a TOP switched-on interval. After half the period duration all the BOT switches are simultaneously switched on for the duration of a BOT switched-on interval wherein the TOP switched-on interval, and the BOT switched-on interval amount at most to half the duration of the period.

Abstract: A high-frequency switching circuit includes, on a semiconductor substrate, FETs, electrode pads for applying a control voltage, gate wiring patterns for connecting gate terminals of the FETs to the electrode pads, and first resistors and second resistors connected in series with the gate wiring patterns. The first resistors are connected in series near the gate terminals of the FETs. The second resistors are connected in series near the electrode pads. The resistances of the first resistors and the second resistors are set to values large enough to inhibit the influence of an induced high frequency signal.

Abstract: A high-side semiconductor switch control circuit for switching a positive supply voltage is provided, having a circuit to provide a drive voltage for the high-side semiconductor switch, a driver circuit for driving the high-side semiconductor switch based on the control circuit, wherein both the circuit for providing the drive voltage as well as the driver circuit operate in relation to a floating switching point, an input circuit portion that receives a control signal related to ground, and a level shift circuit portion that is connected between the input circuit portion and the driver circuit portion and set up so as to transform the control signal related to ground into a floating voltage level for the driver circuit portion.

Abstract: Owing to the property of bidirectional conduction under the saturation mode, synchronous rectifiers in conventional power converters usually suffer from a reverse current under light loads or a shoot-through current under heavy loads. The reverse current may degrade the converter efficiency and the shoot-through current may damage synchronous rectifiers. The present invention discloses a unidirectional metal oxide semiconductor field effect transistor (UMOS), which comprises a metal oxide semiconductor field effect transistor (MOS), a current detection circuit and a fast turn-off circuit. The current detection circuit detects the direction of the current flowing through the MOS. When a forward current is detected, the fast turn-off circuit is disabled and the channel of the MOS can be formed. When a reverse current is detected, the fast turn-off circuit is enabled and the channel of the MOS cannot be formed.

Abstract: A gate-controlled switch configuration comprising a gate-controlled switch (V4) and a gate driver system (Ctrl, D1, D2, V1, V2), which in its first functional state is configured to change the amount of charge (Qgate) in the gate (G) of the gate-controlled switch (V4) to provide a normal turn-off functionality for the gate-controlled switch (V4), and in its second functional state it is configured to maintain the amount of charge (Qgate) in the gate (G) of the gate-controlled switch (V4) substantially constant. The gate driver system (Ctrl, D1, D2, V1, V2) is configured to produce a soft turn-off functionality during which the gate driver system (Ctrl, D1, D2, V1, V2) is in the first functional state a plural number of times, and between the subsequent first functional states it is in its second functional state.

Abstract: A switching control system and method is provided that optimizes switching efficiencies for power switching applications including automotive ignition systems, solenoid drivers, motor drivers and power regulation systems. In an ignition system, a coil current switching magnitude is controlled at the start of ignition coil charging, thereby avoiding an untimely spark event. When the transistor threshold voltage is reached, the collapse rate of the ignition system transistor collector voltage is reduced by reducing the gate charging current. The reduced collector voltage slew rate results in a reduced primary and secondary coil output voltage. After the collector voltage collapses, a continued rapid charge is provided to place the transistor in a hard saturation bias condition. In an aspect, the present invention dynamically determines the threshold voltage of a power transistor.

Abstract: A switching circuit includes: a transistor having a first electrode, a second electrode and a control electrode; a zener diode; and a capacitor. A connection between the first electrode and the second electrode is capable of temporally switching between a condition state and a non-conduction state by switching a control voltage of the transistor. The zener diode and the capacitor are coupled in series between the first electrode and the control electrode of the transistor. The first electrode is a drain or a collector.

Abstract: In the case of an electronic circuit, comprising a drive unit, which generates at least one drive signal, two or more power semiconductor switches each having a first and a second main terminal, which power semiconductor switches can be switched synchronously by the drive signal, the first and the second main terminals of the power semiconductor switches in each case being electrically connected in parallel among one another, for each of the power semiconductor switches a first and a second electrically conductive connection for connection to the drive unit, a uniform dynamic current division between the power semiconductor switches is achieved according to the invention by virtue of the fact that a first inductance is provided in each of the first electrically conductive connections, and a second inductance is provided in each of the second electrically conductive connections, the first inductance being coupled to the second inductance for each of the power semiconductor switches.

Abstract: The bus switch with back gate control circuit includes: an NMOS transistor coupled between a first port and a second port; a PMOS transistor coupled in parallel with the NMOS transistor; a first blocking device coupled between the first port and a control node of the PMOS transistor; a second blocking device coupled between the second port and the control node of the PMOS transistor; a first pull-down device coupled to a back gate of the NMOS transistor; and a second pull-down device coupled to the back gate of the NMOS transistor, wherein the pull down device is controlled by a power supply node and the control node of the PMOS transistor.

Abstract: A power switching circuit in CMOS technology has a power MOS transistor and a driver stage. The power MOS transistor is operated at a higher supply voltage in excess of its maximum allowable gate-source voltage; and the driver stage of the level shifter is operated at a lower supply voltage substantially lower than the supply voltage for the power MOS transistor. The driver stage includes a pair of driver MOS transistors coupled in series between a higher supply voltage rail and a reference potential rail, and at an interconnection node coupled to the gate of the power MOS transistor. The gates of the driver MOS transistors are AC-coupled to drive signals of mutually opposite phase; and the gates of the driver MOS transistors are each connected to the higher voltage supply rail through a respective parallel connection of a first resistor and a second resistor connected in series with a non-linear component.

Abstract: A low-voltage power switch includes a gate-controlled circuit and a switch. The gate-controlled circuit generates a control voltage lower than the voltage of ground according to a control signal. The switch includes a first end, a second end, and a control end. The first end of the switch is coupled to a power supply of a low voltage, the control end of the switch is coupled to the gate-controlled circuit for receiving the gate-controlled signal, and the second end of the switch couples the first end of the switch when the switch receives the gate-controlled signal for outputting the power supply of the low voltage.

Abstract: A turn-on circuit that is used to provide power to a system or other circuit when activated. The circuit is activated through depression of a momentary button or other similar device. The circuit is deactivated by a separate digital signal from said system or said other circuit and when deactivated no longer provides power to the system.

Abstract: A semiconductor device comprises a driver provided for a semiconductor element having a control electrode to which a drive voltage is applied, the semiconductor element being switched between the conduction state and the non-conduction state based on the drive voltage, the driver operative to apply the drive voltage to the control electrode; a detector operative to supply a voltage detection signal oscillating at a certain frequency to the control electrode to detect a first voltage having a certain relation to a voltage applied to the semiconductor element; and a controller operative to control the detector based on the first voltage detected at the detector.

Abstract: An output driving device prevents an inflow of external current through an output terminal even when there is no power supply. The output driving device includes an output circuit that maintains an output terminal at a low impedance state by receiving a supply of power in an output drive operation and maintains the output terminal at a high impedance state by receiving the supply of power in a non-output drive operation and a leakage prevention unit coupled to the output terminal of the output circuit, the leakage prevention unit preventing a current inflow to the output circuit through the output terminal when the supply of power is not supplied to the output circuit.

Abstract: A switch control circuit for controlling a bridge circuit comprising: an upper and a lower transistor, connected to a positive and a negative voltage, respectively, and comprising a flywheel diode connected in parallel with each transistor. An LC-circuit filters the voltage from the junction of the transistors. A drive circuit controls each transistor in order to switch off the corresponding switch element when a reference current has been obtained in the inductor and for switching on the corresponding switch element when the current in the inductor is essentially zero. A first timer circuit is arranged for preventing the on-switch of the switch element until a minimum time period has passed.

Abstract: An LED driving circuit and a MOSFET switch module thereof is disclosed, and the MOSFET switch module which is used to control a current of the LED driving circuit. The present invention employs a voltage clamping device to clamp the voltage level of the drain of transistor in the MOSFET switch module when being turned off. Via this way, the requirement for the withstand voltage of the transistor is lowered, and so the cost and power consumption thereof is reduced.

Abstract: A transistor gate driving circuit is developed for power saving. It includes a first high-side transistor, a second high-side transistor and a low-side transistor. A voltage clamp device is connected to the gate terminal of the first high-side transistor to limit the maximum output voltage. A detection circuit is coupled to detect a feedback signal of the power converter. The feedback signal is correlated to the output load of the power converter. The detection circuit will generate a disable signal in response to the level of the feedback signal. The disable signal is coupled to disable the second high-side transistor once the level of the feedback signal is lower than a threshold.

Abstract: A device for controlling (10) a power transistor (5), comprises: an amplifying device (15) for monitoring the transistor gate (5) via an output control signal, the device including: a first input connected to the transistor drain, the whole assembly forming a first circuit portion; a second input connected to the transistor source, the whole assembly forming a second circuit portion. The control device comprises means for producing a polarizing current (11, 12), the current being injected into the first and second inputs (NEG, POS) so as to offset the drain-source voltage measurement and maintain a linear operating mode of the output control signal, prior to opening the transistor, and the same number of N semiconductor junctions in the first and second circuit portions. The device is applicable in particular on battery charging devices.

Abstract: In a complementary-MOSFET driving circuit for driving the charge multiplication gate of an EM-CCD, a ferrite bead is connected to a conduction-termination direction diode in parallel thereto, the conduction-termination direction diode being inserted into the gate electrodes of complementary MOSFETs in series therewith, the impedance of the ferrite bead at a switching frequency being lower than one-half of the gate-electrode impedance of the MOSFETs, a time during which the MOSFETs are brought into simultaneous conduction being shorter than ¼th of the switching period, the impedance of the ferrite bead at a frequency equivalent to ¼th of the switching period being higher than 2 times the gate-electrode impedance of the MOSFETs, a ferrite bead being connected to the drain electrodes of the complementary MOSFETs in series therewith, the impedance of the ferrite bead at the switching frequency being lower than one-half of the impedance of a capacitive load at the switching frequency, and the impedance of the ferr

Abstract: A switching circuit includes switching transistors connected to one of an input terminal and an output terminal of the switching circuit, and a control bias supply circuit that supplies a control bias for cutting off all the switching transistors to the switching transistors when all of the switching transistors are in a non-selected state.

Abstract: A negative voltage switch includes a switch unit, a voltage level converting circuit, and a discharge circuit. The switch unit has an input terminal for receiving a negative input voltage and an output terminal coupled to a load. The voltage level converting circuit receives a control signal and switches the switch unit to a first state or a second state according to the control signal. The switch circuit is switched to the first state if the level of the control signal is higher than a predetermined level and is switched to the second state if the level of the control signal is lower than the predetermined level, and the predetermined level is higher than the level of the negative input voltage.

Abstract: An integrated circuit is disclosed. The integrated circuit includes first and second transistors, first and second diodes, a first pin connected to the first transistor, a second pin connected to the second transistor, a third pin connected to the first diode, and a fourth pin connected to the second diode.

Abstract: An integrated circuit having a first connection, a second connection, a substrate, and a control connection, in provided. The control connection controls a conductivity of the integrated circuit between the first connection and the second connection.

Abstract: A power sequence control circuit receives an input positive voltage and an input negative voltage. The control circuit includes a pull-up stage, having a first terminal receiving the input positive voltage, a second terminal coupled to a node, and a control terminal receiving feedback of an output positive voltage. A pull-down stage has a first terminal coupled to the node and a second terminal coupled to an output negative voltage. A current-limit switching unit has a first terminal receiving the input positive voltage, a second terminal outputting the output positive voltage, and a control terminal coupled to the node. When the output negative voltage decreases, and if the pull-down stage decreases a control voltage at the node and the control voltage is less than a threshold value, the current-limit switching unit is conducted to transmit the input positive voltage as the output positive voltage.

Abstract: A transistor arrangement has first and second terminals and a control terminal which sets a current flow between the first and second terminals, and a signal conditioning device which applies a transistor control voltage to the control terminal in a manner dependent on a differential voltage present between the first and second terminals, and a driving apparatus is assigned to the signal conditioning device and switches the latter between at least two operating modes.

Abstract: Circuit and method for controlling a synchronous rectifier. A circuit for monitoring the drain to source voltage of an SR transistor in a secondary side circuit of a voltage converter is disclosed, having a circuit for generating a gate control circuit for the SR MOSFET; the circuit preventing subsequent gate control signals until a primary turn on detection signal is received. In another embodiment a circuit for generating the primary turn on detection signal is provided. A method for controlling an SR transistor is disclosed comprising monitoring the drain to source voltage of the SR MOSFET, generating a gate control output, and preventing subsequent gate control output signals until a primary turn on detection signal is received. In another method embodiment a method for generating the primary turn on detection signal is disclosed. An SR embodiment incorporating the control circuit embodiments is disclosed.

Abstract: Disclosed is a high voltage switch circuit that can include a first well bias switch configured to track the greater of an input voltage and a supply voltage, a voltage comparator configurable to compare the input voltage to a predetermined reference voltage, and a second well bias switch having a control input coupled to an output of the comparator.

Abstract: A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.

Abstract: A drive circuit for an insulated gate device includes a constant current source generating a constant current, and a switching circuit, wherein a gate of the insulated gate device is connected to a power supply potential side via the constant current source at the time of turn-on and to a ground potential side at the time of turn-off. Whereby a drive circuit for the insulated gate device can be reduced loss at the time of turn-on and reduced temperature dependency of noise.

Abstract: The invention concerns a method for controlling a switching assembly comprising a plurality of transistors connected in parallel, having a linear operating mode, a closed-switch operating mode and an off operating mode including a first operating phase during which a current flows from a source terminal to a drain terminal and a second operating phase during which no current flows. The method includes the following successive steps; (a) controlling the switching assembly in closed-switch mode during part of the first phase; (b) controlling the switching assembly in linear mode; (c) controlling the assembly in off mode during part of the second phase.

Abstract: A field transistor is divided into a number of cells (6) and includes a separate first gate line (20) connected to first transistor cells (8) and a separate second gate line (22) connected to second transistor cells (10). A drive circuit is used to drive all the cells (6) in a normal, saturated operations state but to drive only the second cells (10) in a linear operations state to reduce the number of cells used in the linear operations state.

Abstract: A design structure embodied in a machine readable medium used in a design process includes a voltage divider device, including a double gate field effect transistor (FET) having a first gate and a second gate disposed at opposite sides of a body region; the first and second gates configured to have an input voltage coupled thereacross; and at least one of a source of the FET and a drain of the FET configured to have an output voltage taken therefrom; wherein the output voltage represents a divided voltage with respect to the input voltage.

Abstract: A control apparatus comprises a voltage source, a controlling unit and an enabling unit. The controlling unit receives an input signal and generates an output signal. The enabling unit controls whether the controlling unit generates the output signal or not according to an enabling signal. The enabling unit comprises a first switch, a second resistor, a third resistor and a third transistor. The first switch selectively turns on or off according to the enabling signal. A first terminal of the second resistor is coupled to the first switch. A first terminal of the third resistor is coupled to a second terminal of the second resistor and a second terminal of the third resistor is coupled to the ground terminal. A source of the third transistor is coupled to the ground terminal and a gate of the third transistor is coupled between the second and the third resistor.

Abstract: There are provided: a voltage division circuit (13) that performs voltage division of the voltage applied between the main electrodes of a non-latching switching element (11) having two main electrodes and a single control electrode at voltage division elements (14a) to (14c); a control current source (16) that injects current at the control electrode in accordance with the divided voltage of main voltage detection voltage division elements, of the voltage division elements (14a) to (14c) of the voltage division circuit (13) and a voltage division ratio control circuit (20) that adjusts the voltage division ratio of the main voltage detection voltage division elements (14b), (14c) of the voltage division circuit (13) in accordance with a control signal for controlling the switching element (11).

Abstract: A one mode of a gate driving circuit that drives a gate electrode of an electric power switching element (9), comprising drive means (6) configured to supply to the gate electrode a current in accordance with a voltage applied across the principal electrodes of the electric power switching element (9), while utilizing a voltage produced by dividing a voltage applied across the principal electrodes by use of resistors (4a, 4b). Since the drive means (6) utilizes a voltage produced by a voltage dividing resistor circuit, which divides the voltage applied across the principal electrodes of the electric power switching element (9) as a power source voltage, only an addition of the dividing resistors (4a, 4b) makes it possible to constitute the power source for the current drive means (6).

Abstract: A driving circuit of a switch includes first and second transistors connected in series to each other and to relative intrinsic diodes in antiseries and driven by a driving device that includes at least one first and one second output terminal connected to the switch to supply it with a first control signal for driving the switch in a first working state and a second control signal for driving the switch in a second working state. At least one latch circuit coupled between respective common gate and source terminals of the first and second transistors supplies the common gate terminal with the first and second control signals, respectively, according to the working state to turn off and turn on the first and second transistors.

Abstract: To provide a highly reliable inverter apparatus which discriminates long-cycle noise generated by the isolated signal transmission element from short-cycle dv/dt noise and induction noise. A low pass filter, band pass filter, and a switching means are provided between the input section of the gate drive circuit of the voltage-drive type power semiconductor switching element and the isolated signal transmission means that transmits the output of the control circuit; and an abnormal signal discriminating circuit is also provided which turns on and off the switching means according to the output of the band pass filter thereby eliminating long-cycle noise derived from the isolated signal transmission element, short-cycle dv/dt noise, and induction noise; and also outputs alarm signals.

Abstract: A semiconductor integrated circuit includes: a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears; a second voltage line; a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on the second voltage line and the other one of the power-supply voltage and the reference voltage; a plurality of switch transistors connected in parallel between the first and second voltage lines to serve as switch transistors including switch transistors each having different conducting-state resistances; and a switch conduction control section for controlling a transition of each of the switch transistors from a non-conducting state to a conducting state by turning on the switch transistors at separate points of time.

Abstract: The present invention discloses MOSFET or IGBT switch drive circuitry that uses the gate capacitance and the inherently high gate resistance of such switch devices to provide essentially bistable switching. Gate-charge is injected to enhance the switch device(s), invoking an ON state. Gate-charge is removed to deplete the switch device(s), invoking an OFF state. Circuitry is provided to effect charge removal immediately following charge injection, enabling relatively large switch devices to operate efficiently at several MHz. An arrangement for bipolar switch operation is provided.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A semiconductor device includes an output MOS transistor to control a current flowing into an L-load in accordance with a gate signal input to its gate. A level shifter shifts the level of an input signal based on a power supply voltage at a Vcc terminal to generate the gate signal. A control signal adjuster detects an output voltage between the L-load and the output MOS transistor based on the power supply voltage and adjusts the level of the gate signal.

Abstract: A semiconductor device (100) includes a MOS transistor (10) having a back gate region “a”, a first region “b” serving as one of a source region and a drain region, and a second region “c” serving as the other of the source region and the drain region. The semiconductor device further includes an input terminal (20) connected to the first region “b” and to which an input voltage is applied from outside the semiconductor device (100), an output terminal (30) connected to the second region “c” and outputting an output voltage outside the semiconductor device (100), and a back gate control circuit (40) for applying the input voltage or the output voltage to the back gate region “a”. With this configuration of the semiconductor device having the output MOS transistor, even when a reverse bias is applied between the input and the output terminal, the terminals are insulated from each other and lowering of the drain current by the substrate bias effect can be suppressed.

Abstract: A gated nano-electro-mechanical (NEM) switch employing metal-insulator-metal (MIM) technology and related devices and methods which can facilitate implementation of low-power, radiation-hardened, high-temperature electronic devices and circuits. In one example embodiment a gate electrode is configured as a cantilever beam whose free end is coupled to a MIM stack. The stack moves into bridging contact across a source and drain region when the applied gate voltage generates a sufficient electrostatic force to overcome the mechanical biasing of the cantilever beam. A second set of contacts can be added on the cantilever beam to form a complementary switching structure, or to a separate cantilever beam. The switching can be configured as non-volatile in response to stiction forces. NEM circuits provide a number of advantages within a variety of circuit types, including but not limited to: logic, memory, sleep circuits, pass circuits, and so forth.

Abstract: An isolation circuit is provided. The isolation circuit is coupled between a master circuit and a slave circuit for isolating or conducting an inter integrated circuit (I2C) signal. While the master circuit has electricity and the slave circuit does not, the isolation circuit isolates the master circuit to prevent the I2C signal being transmitted to the slave circuit. While the master circuit and the slave circuit have electricity, the isolation circuit conducts the master circuit to transmit the I2C signal to the slave circuit. The present invention solves the signal isolation problem between the master and slave circuits, and also improves the operational stability of an I2C bus.

Abstract: There is provided with a gate drive circuit including: a first switching element connected at one end to a power terminal; a second switching element connected at one end to the other end of the first switching element and connected at the other end to a reference terminal; a gate voltage output terminal which supplies a voltage at a node between the first switching element and the second switching element to a drive switching element as an output gate voltage; a gate voltage monitoring circuit which monitors the output gate voltage; an overcurrent detection circuit which monitors a current through the drive switching element; and a control circuit which generates a control voltage for controlling impedance of the second switching element based on an on/off signal for indicating that the drive switching element should be turned on/off, a gate voltage monitoring signal and an overcurrent monitoring signal.

Abstract: The p- well back bias for NCH transistors in a DRAM sense amplifier circuit is dynamically adjusted. Preferably, during sensing, the p- well back bias for the NCH transistors of the sense amp is increased to in effect lower the threshold voltages for the NCH transistors so that they are more easily activated during sensing. The back bias voltage is preferably increased from ground (its normal value) to the threshold voltage of a NCH transistor (NVt), a value low enough to prevent the circuit from latch-up. Moreover, this voltage is preferably arrived at using a Vt detector/bias circuitry which receives the p- well bias voltage as feedback. While benefiting the disclosed sense amp circuit, the dynamic bias provided to the p- well of the NCH transistors can also benefit NCH transistors in other CMOS circuitry as well. Moreover, similar modifications to dynamically bias the n- wells of PCH transistors in CMOS circuits are also provided to increase the sensing margins of PCH transistors as well.

Abstract: A bus switch for connecting and disconnecting a bus connection provided by a pair of buses includes a first switching element and a second switching element. The first switching element is coupled between an input terminal and an output terminal of a high-potential side bus of the pair of buses. The second switching element is coupled between an input terminal and an output terminal of a low-potential side bus of the pair of buses. The bus connection is connected when the first switching element and the second switching element are activated, and the bus connection is disconnected when the first switching element and the second switching element are deactivated.

Abstract: A transient voltage occurring between output terminals during ON/OFF operation is reduced. There are provided a pair of input terminals IN1 and IN2, a pair of output terminals OUT1 and OUT2, MOSFETs N1 and N2 connected between the output terminals, and a drive circuit 10 connected between the input terminals IN1 and IN2 and the MOSFETs N1 and N2. A light-emitting diode D1 is connected between the input terminals IN1 and IN2. The MOSFETs N1 and N2 have their source electrodes electrically connected to each other and their drains connected to the output terminals OUT1 and OUT2 respectively. The drive circuit 10 includes a photodiode array FD1 that supplies a drive voltage to the gates of the MOSFETs N1 and N2, and a discharge circuit 11, connected between the gate electrodes and the source electrodes of the MOSFETs N1 and N2, that discharges electric charges accumulated on each gate electrode. (FIG.