Abstract: An apparatus for voltage ripple reduction on a power supply line of an integrated circuit device is provided to be operable in at least two modes. The apparatus includes: one or more clamping devices connectable to the power supply line; a clamp control unit; and a mode change detection unit arranged to monitor an interface of the integrated circuit device for one or more information indicating an upcoming mode change of the integrated circuit device and to provide a mode change signal to the clamp control unit when the one or more information is detected. The clamp control unit is arranged to connect at least one of the one or more clamping devices to the power supply line when receiving the mode change signal.

Abstract: Various methods and devices that involve tuning filters are disclosed. A disclosed method for tuning a filter comprises trimming a center frequency of the filter. The method also comprises trimming an input signal magnitude of the filter. The method also comprises measuring a performance metric of the filter after trimming the center frequency of the filter and the input signal magnitude of the filter. The method also comprises repeating the trimming steps and the measuring step until the filter is tuned for a first physical test condition. A disclosed device that includes a filter also includes first and second trimming circuits that trim the center frequency and input signal magnitude of the filter. A disclosed system includes a motor to transfer a transmitting device from a first physical test condition to a second physical test condition relative to a proximity coupling device with a filter.

Abstract: A method for enhancing speech output in real time is used in a hearing aid device. The input speech is divided into multiple audio segments first. Then each audio segment is analyzed for its attribute: high frequency, low frequency, or soundless. Low frequency segments are outputted without undergoing frequency processing. High frequency segments are outputted after undergoing frequency processing. All or some of the soundless segments are deleted without being outputted. The deletion of soundless segments can reduce the delay caused by the frequency processing of the high frequency segments.

Abstract: An apparatus comprises a resonator including a plurality of switched impedances spatially distributed within the resonator and a corresponding plurality of transconductance elements distributed within respective distances among the switched impedances. The resonator has a given desired resonant frequency and a given amplitude of response. Combined pairs of the switched impedances and transconductance elements have respective parasitic resonant frequencies which are higher than the given desired resonant frequency and have respective amplitudes of response which are lower than the given amplitude of response. The apparatus may be a voltage controlled oscillator or an active filter.

Abstract: A single-MOS pole-zero lowpass filter for use in a single-ended-input current-reuse wideband receiver having a stacked RF-to-BB front end adapted to receive and process an RF signal to generate an N-phase BB signal, the lowpass filter being adapted to filter the N-phase BB signal, the lowpass filter having a lowpass input impedance for high stopband rejection at low voltage headroom consumption. The lowpass filter is arranged with one active MOS MLPF and one self-biased MOS ML; MLPF creates complex poles and two stopband zeros to boost the stopband rejection; ML provides BB current-to-voltage conversion and common-mode feedback to alleviate tradeoff between voltage headband and BB gain; and ML is diode-connected to enable the generated BB signal to be copied to a next HR stage.

Abstract: A circuit for providing damping in an electromagnetic interference (EMI) filter with an inductor-capacitor (LC) circuit, includes at least one capacitor connected to receive a common-mode current from the LC circuit; a current sensor that senses the common-mode current; a linear amplifier that amplifies the sensed common-mode current; and a power amplifier that receives the amplified sensed common-mode current and outputs a voltage which creates a damping impedance for frequencies of the common-mode current less than a threshold frequency and absorbs the common-mode current for frequencies greater than the threshold frequency.

Abstract: A radio receiver has a front end having a shared amplification path for both radio frequency signals and intermediate frequency signals. In one example, the shared amplification path can include a low noise amplifier and an attenuator. By amplifying both radio frequency (RF) signals and intermediate frequency (IF) signals with the same shared amplification path, gains in power efficiency, and reductions in cost and circuit size can be achieved.

Abstract: The embodiments relate to a method and an apparatus for compensating nonlinear damage. The method and apparatus being used in a dual-polarization communication system, the method comprising: calculating, according to input time-domain signals, a plurality of multiplicative parameters indicative of nonlinear damages to the input signals; constructing a plurality of multiplicators by using the plurality of multiplicative parameters; and compensating the input time-domain signals by using the plurality of multiplicators.

Abstract: An asymmetric PHY pair for communicating over a point-to-point link is disclosed. The PHY pair is asymmetric in that the signal processing power used by one of the PHYs to communicate a unit of data over the link is made to be less than that of the other PHY. This asymmetry is accomplished not merely by reducing the signal processing power of one of the PHYs at the expense of the rate at which symbols can be communicated over the link, but by transferring the signal processing power from one of the PHYs to the other PHY so that the symbol rate can be substantially maintained as compared to the symbol rate of a symmetric PHY pair. The asymmetric PHY pair can be advantageously implemented in many different types of communication systems (i.e., in communication systems where one end is more congested and/or crowded than the other end).

Abstract: Exemplary embodiments of the present invention relate to electronic dispersion compensation (EDC). The interaction between the frequency chirp and the fiber dispersion is newly analyzed. The linear and nonlinear properties of the chirp-dispersion are separately analyzed. A pre-compensating transmitter may consist of a phase interpolator (PI), a 2 tap data generator, a pulse widening CLK generator, a rising pattern detector, 4:1 Mux and an output driver. A post-compensating receiver may consist of linear equalizer for the rabbit ear compensation, nonlinear equalizer for tilting compensation, typical high frequency boosting equalizer (EQ) and limiting amp (LA).

Abstract: A transmitter for providing channel equalization that includes a first driver and second driver having a high pass filter. The first driver generates a first output signal representing a digital input signal. The second driver generates a second output signal representing a high pass filtered version of the digital input signal. The first and second output signals are summed to provide a third output signal that is channel equalized for transmission over a channel.

Abstract: A filter, comprising: two source-follower stages connected in series and in between input nodes and output nodes, wherein inner nodes connect the two stages; and a frequency dependent feedback circuit connected between the input and output nodes, wherein the filter comprises additional frequency dependent feedback circuits connected between input nodes and inner nodes and between output nodes and inner nodes, the additional frequency dependent feedback circuits comprising capacitors.

Abstract: A light emission reference signal, the timing of which is adjusted by a first delay time control circuit, is input as a timing adjustment signal to a light emitter driver. The light emission reference signal, which is delayed by a second delay time control circuit, is output as an offset signal. The offset signal and a light emission timing signal from the light emitter driver are input to a timing correction phase comparator, and a phase comparison result is output from the timing correction phase comparator. The phase comparison result is input to a timing correction control logic circuit, and a delay adjusting signal based on the phase comparison result is output from the timing correction control logic circuit. The delay adjusting signal is input to the first delay time control circuit, whereby the timing of the light emission reference signal is adjusted.

Abstract: Described herein is an integrated circuit which comprises: a first buffer, with positive trans-conductance, to drive a first signal with first phase; and a second buffer, with negative trans-conductance, to drive a second signal with second phase, wherein the first buffer and the second buffer are cross-coupled to one another.

Abstract: A charging circuit for a capacitor includes a current mirror module including a first branch circuit, a second branch circuit and a third branch circuit for supplying a plurality of output currents respectively, a switching module coupled to the first branch circuit and the second branch circuit for determining a conducting condition of the switching module according to the plurality of output currents from the first branch circuit and the second branch circuit, and an active loading circuit coupled to the third branch circuit and the switching module for adjusting a current passing through the active loading circuit according to the conducting condition of the switching module. The capacitor has one end coupled to the first branch circuit and the switching module to process a charging operation according to the output current of the first branch circuit.

Abstract: Methods, systems, and computer readable media for wideband frequency and bandwidth tunable filtering are disclosed. According to one aspect, the subject matter described herein includes a wideband frequency and bandwidth tunable filter that splits a filter input signal into first and second input signals, modifies the first input signal to produce a first output signal, modifies the second input signal to produce a second output signal having an intermediate frequency response, and combines the first and second output signals while adjusting their relative phases and/or amplitudes to produce a filter output signal with the target frequency response. Adjustment includes splitting the second input signal into third and fourth input signals, which are modified and then combined to produce the second output signal having the intermediate frequency response.

Abstract: A reference voltage is maintained stable against disturbance noise and self-noise of an internal circuit. A reference voltage stabilizer circuit for stabilizing the reference voltage to be supplied through at least one of first or second signal lines includes a preceding-stage circuit including a capacitive path connected between the first and second signal lines; and a subsequent-stage circuit including a resistive path connected between the first and second signal lines, and a resistive circuit inserted, between the capacitive path and the resistive path, into one of the first or second signal lines through which the reference voltage is supplied.

Abstract: A calibration system may be provided for calibrating wireless communications circuitry in an electronic device during manufacturing. The calibration system may include data acquisition equipment and calibration computing equipment for receiving and processing test and calibration signals from wireless communications circuitry to be calibrated. During testing and calibration operations, a device may be provided with initial pre-distortion calibration values. The initial pre-distortion calibration values may be generated at least in part based on calibration operations performed for other wireless electronic devices. The device may generate a test signal using the initial pre-distortion calibration values. The calibration system may determine whether the test signal is within an acceptable range of a known reference signal.

Abstract: In a high-performance interface circuit for micro-electromechanical (MEMS) inertial sensors, an excitation signal (used to detect capacitance variation) is used to control the value of an actuation signal bit stream to allow the dynamic range of both actuation and detection paths to be maximized and to prevent folding of high frequency components of the actuation bit stream due to mixing with the excitation signal. In another aspect, the effects of coupling between actuation signals and detection signals may be overcome by performing a disable/reset of at least one of and preferably both of the detection circuitry and the MEMS detection electrodes during actuation signal transitions. In a still further aspect, to get a demodulated signal to have a low DC component, fine phase adjustment may be achieved by configuring filters within the sense and drive paths to have slightly different center frequencies and hence slightly different delays.

Abstract: A transconductance adjustment circuit includes a reference signal generation circuit that outputs a first signal and a second signal that is different by 90 degrees in phase from the first signal, a replica circuit to which the first signal and the second signal are input and which generates a first output signal and a second output signal, and an adjustment signal generation circuit that outputs a transconductance adjustment signal with respect to the adjustment-targeted circuit and the replica circuit. The reference signal generation circuit generates the first signal and the second signal that change in voltage at between a first voltage level and a second voltage level, based on a clock signal, and outputs the generated first and second signals with respect to the replica circuit.

Abstract: A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.

Abstract: An integrated continuous-time active-RC filter comprises a set of opamp integrators with Operational Transconductance Amplifiers (OTAs), and at least one assistant transconductor connected between an input and an output of each of the integrators of the set; wherein the assistant transconductor comprises a plurality of sets of MOSFETS connected in parallel to each other wherein each set of MOSFETS is formed by a pair of MOSFETs connected in series, with one MOSFET of the pair operating in the triode region and the other MOSFET of the pair operating in the saturation region; and wherein the assistant transconductor is configured to inject an assistant current into the output of each of the integrators in the set to enhance the linearity and speed of the opamp integrators of the set.

Abstract: RF communications circuitry includes a first RF filter structure, which is disclosed. The first RF filter structure includes a first passive group of RF resonators and active loss-reduction circuitry. The active loss-reduction circuitry is coupled to the first passive group of RF resonators. The active loss-reduction circuitry uses self-limiting positive feedback to reduce signal loss in the first passive group of RF resonators. Additionally, the active loss-reduction circuitry limits the self-limiting positive feedback to prevent self-oscillation in the active loss-reduction circuitry.

Abstract: An apparatus includes a biquad filter having first and second lossy integrators and multiple input networks. Each lossy integrator includes an amplifier, and each input network is coupled to an input of the amplifier in one of the lossy integrators. Each input network includes multiple resistors and a capacitor arranged in a T-structure. In a single-ended configuration, each input network includes a grounded capacitor. In a fully-differential configuration, each input network includes one of: a grounded capacitor and a floating capacitor coupled to another input network. The amplifiers and resistors could form a portion of an integrated circuit chip, which also includes multiple input/output pins. A single grounded capacitor could be coupled to a single input/output pin of the integrated circuit chip for an input network. A single floating capacitor could be coupled to two input/output pins of the integrated circuit chip for a pair of input networks.

Abstract: Disclosed herein are embodiments of an active RC filter that has a gain-setting attenuator. An embodiment takes the form of a filter circuit having a filter-circuit input node; a filter-circuit output node; an operational amplifier (op-amp) having first and second inputs and also having an output coupled to the filter-circuit output node; and a passive feedback path extending between the filter-circuit output node and the first op-amp input, the passive feedback path having a gain-setting attenuator segment in series with a signal-filtering segment.

Abstract: A bandpass sense amplifier circuit (FIG. 2A) is disclosed. The circuit includes a capacitor (C0) having a first terminal coupled to receive an input signal (Vin) and a second terminal. A current conveyor circuit (200-206,212) has a third terminal (X) coupled to the second terminal of the capacitor and a fourth terminal (Z) arranged to mirror a current into the third terminal. A voltage follower circuit (214) has an input terminal coupled to the fourth terminal of the current conveyor circuit and an output terminal.

Abstract: A programmable variable admittance circuit may be used in a programmable filter or a variable gain amplifier in a number of different applications including tuners and other RF receiver circuits. A variable admittance circuit and operation is described including a number of switchable admittance elements arranged in parallel branches. The variable admittance circuit requires fewer transitions to change between successive admittance values than a binary weighted circuit and fewer branches for implementation then a thermometry admittance circuit.

Abstract: A transistor-based filter for inhibiting load noise from entering a power supply is disclosed. The filter includes a first transistor having an emitter coupled to a power supply, a collector coupled to a load, and a base. The filter also includes a first capacitor coupled between the base of the first transistor and a ground terminal The filter further includes an impedance coupled between the base and a node between the collector and the load, or a second transistor and second capacitor. The impedance can be a resistor or an inductor.

Abstract: A glitch filter is disclosed herein. The glitch filter includes a high glitch filter circuit, a low glitch filter and a control circuit. The high glitch filter circuit is configured for generating a pull-up control signal in accordance with the input signal. The low glitch filter circuit is configured for generating a pull-down control signal in accordance with the input signal. The control circuit is configured for determining the logic level of the output of the glitch filter in accordance with the pull-up control signal and the pull-down control signal. A filtering method for filtering glitches is disclosed herein as well.

Abstract: A noise-removing circuit includes a first capacitor to charge a first voltage supplied to a first node during a first period in which a first switching control signal is supplied, a second capacitor to charge a second voltage supplied to a third node during the first period, a third capacitor to charge the first voltage during a second period in which a second switching control signal is supplied, and to charge the second voltage charged in the second capacitor as a third voltage during a third period in which a third switching control signal is supplied, a fourth capacitor to charge the second voltage during the second period, and to charge the first voltage charged in the first capacitor as a fourth voltage during the third period, and a differential amplifier to output a voltage difference between the third voltage and the fourth voltage.

Abstract: A method for shielding an electrical signal without substantially degrading the system speed or substantially increasing the bulk of the system is provided. The method includes applying a first signal to a conductor coupled to the electrode, applying a second signal to a shield substantially surrounding the conductor, blocking electrical interference to the first signal, and increasing an effective impedance on the electrode coupled to the conductor. The second signal may be a buffered and compensated version of the first signal.

Abstract: An electronic device includes an adjustable filter with a first filter element, and a second filter element coupled to the first filter element. The second filter element includes a field effect transistor (FET) including a source terminal, a drain terminal, and a gate terminal. The source terminal and the gate terminal are coupled to a reference voltage. A control circuit is coupled to the drain terminal and is configured to apply a control voltage thereto to vary a capacitance between the source and drain terminals to adjust the adjustable filter.

Abstract: The optimal low power complex filter, as a second order complex filter, is based on current amplifiers (CAs) and is utilized to implement a 4th order current-mode filter that can be used for intermediate frequency (IF) applications, such as, for example, low-IF Bluetooth receivers. Fabricated in a standard 0.18 ?m CMOS technology, experimental results show that the present design offers improved characteristics over the existing solutions in terms of power consumption and spurious-free dynamic range (SFDR). The 4th order filter exhibits in-band SFDR of 65.8 dB while consuming only 1 mW.

Abstract: A circuit that provides a rotating coefficient FIR filter with all necessary coefficient sets present at the same time, without the need for delay elements or devices providing for adjustable impedances is described. An input signal is sampled in round robin fashion by a plurality of sample and hold devices. The outputs of the sample and hold devices are connected to sets of impedance devices. Each set of impedance devices implements the coefficients of the desired frequency response of the filter. The impedance devices in each set are connected to the sample and hold devices in a different order from each other set, so that each set of impedance devices will produce the desired frequency response when a different one of the sampling circuits contains a new sample of the input signal. Switches connect the sets of impedance devices to an output, only one switch being closed at a time to provide the output signal.

Abstract: The even order harmonic distortion in a differential circuit is reduced or eliminated by treating the amplitude and phase mismatch sources that cause the distortion as impedance mismatches, and utilizing switched resistor circuitry that adjusts the load resistance to reduce the effects of the amplitude mismatch sources, and switched capacitor circuitry that adds shunt capacitance to reduce the effects of the phase mismatch sources.

Abstract: Methods, devices and algorithms for the linearization of nonlinear time variant systems and the synchronization of a plurality of such systems. An example of such a system would be a transmit path, including the power amplifier, as used in wireless transmit systems. Advances made in CMOS technology, digital to analog converter (DAC) technology make it possible to implement a substantial part of such a system in the digital domain. Another aspect is the integration of a substantial part of such a transmit system in a single integrated circuit (IC). A digital implementation that allows for linearization of a broad range of nonlinear and time variant effects. Since this digital implementations operate a high clock frequency a energy efficient implementation is essential to keep the power consumption under control. Another aspects is the reuse of methods, devices and algorithms used for the linearization a transmit system to synchronize multiple transmit systems.

Abstract: There are provided a noise filter circuit and an operating method thereof. A noise filter circuit includes a first delay circuit, and a second delay circuit connected to the first delay circuit in series, wherein the first delay circuit and the second delay circuit each include at least one inverter and at least one delay element for generating a predetermined delay, and the first delay circuit and the second delay circuit have different filtering characteristics.

Abstract: The present invention provides a semiconductor structure, including a substrate, a first TSV, an inductor and a capacitor. The first TSV is disposed in the substrate and has a first signal. The inductor is disposed in the substrate. The capacitor is electrically connected to the inductor to form an LC circuit to bypass the noise from the first signal. The present invention further provides a method of reducing the signal noise in a semiconductor structure.

Abstract: A common mode noise reduction circuit works with a transmission signal output circuit that has a first and a second output terminals and transmits differential signals from the first and second output terminals. The common mode noise reduction circuit includes: a first generating circuit to generate electric current to input to or receive electric current from the first output terminal; a second generating circuit to generate electric current to input to or output receive electric current from the second output terminal; and a control circuit to control the first and second generating circuits so that in synchronism with a drive control clock of the transmission signal output circuit, the first and second generating circuits generate current pulses to reduce common mode noise of the differential signals to be transmitted.

Abstract: An apparatus includes a biquad filter having first and second lossy integrators and multiple input networks. Each lossy integrator includes an amplifier, and each input network is coupled to an input of the amplifier in one of the lossy integrators. Each input network includes multiple resistors and a capacitor arranged in a T-structure. In a single-ended configuration, each input network includes a grounded capacitor. In a fully-differential configuration, each input network includes one of: a grounded capacitor and a floating capacitor coupled to another input network. The amplifiers and resistors could form a portion of an integrated circuit chip, which also includes multiple input/output pins. A single grounded capacitor could be coupled to a single input/output pin of the integrated circuit chip for an input network. A single floating capacitor could be coupled to two input/output pins of the integrated circuit chip for a pair of input networks.

Abstract: Approaches are described for managing effects such as interference, crosstalk, and other types of noise in an electronic environment using a physical and/or electronic switch to improve antenna performance. For example, in the situation where the connector is connected to the device and no data and/or power is being transferred through the connector, the switch is caused to be open. In this situation, because the connector will be an electrically floating metal instead of a grounded metal due to the open switch, at least a portion of the radiated and/or received antenna signals will not couple to the connector. In the situation where the connector is connected to the device and is being used to transfer data and/or power, the switch is caused to be closed, which will result in the connector being grounded. In such a situation, at least a portion of the noise generated by the connector due to transferring data and/or power will be grounded instead of being coupled to the antenna.

Abstract: A method according to one embodiment includes receiving an increment signal at a first integrator when a second integrator overflows; receiving a decrement signal at the first integrator when the second integrator underflows; and incrementing or decrementing a gain applied to an analog signal based on receipt of the increment or decrement signal. A system according to one embodiment includes a first integrator configured to cause incrementing of a gain applied to an analog signal based on receipt of an increment signal when a second integrator overflows, the first integrator being configured to cause decrementing of the gain applied to the analog signal based on receipt of a decrement signal when the second integrator underflows; and the second integrator.

Abstract: Voltage and current mode reconfigurable nth-order filters (RNOFs) fabricated in a 0.18 ?m CMOS process are disclosed. The RNOFs utilize an inverse-follow-the-leader-feedback (IFLF) signal path with summed outputs, resulting in a follow-the-leader-feedback-summed-outputs (FLF-SO) filter topology. The FLF-SO filter uses multi-output current amplifiers (CAs). Inverse-follow-the-leader-feedback-summed-outputs (IFLF-SO) and inverse-follow-the-leader-feedback-distributed-outputs (IFLF-DI) structures are realized by employing 3n+4 transconductance amplifiers (TCAs) for voltage mode processing and two TCAs for current mode signals. A plurality of programmable current division networks (CDNs) tune a digitally controlled current follower (DCCF). A multi-output Digitally Controlled Current Amplifier (MDCCA) controls gain by providing independent filter coefficient control. Forward path output gains are set to unity. Alternatively, a multi-output digitally controlled CCII block (MDCCCII) uses CCII in the first stage.

Abstract: Embodiments of the present invention may provide an improved apparatus and method for reducing distortion in analog circuits. A circuit in accordance with the present invention may include a main path comprising an analog circuit with an input impedance, a source impedance representing the impedance of an input network driving the analog circuit, and a cancellation path. The cancellation path may be in parallel to the main path and may generate a cancelling non-linear current to substantially cancel a non-linear current drawn to the input impedance, resulting in a decrease of non-liner current flowing through the source impedance.

Abstract: The low frequency filter for biomedical applications scales down the pole frequency while accomplishing a 5-bit reduction in the cut off frequency. This is made possible through adding a passive resistor in the forward path of the op-amp-based integrator, introducing a difference term of the pole frequency. Moreover, the filter topology is modified to avoid changing the quality factor. An exemplary second-order low pass filter is designed and simulated. Simulation results show that the pole frequency is scaled down from 1.43 MHz to 4.97 kHz, while maintaining tuning of 30% around the nominal value by controlling only one resistor.

Abstract: An apparatus for measuring a biological signal of a body, the apparatus including; at least three interfaces which obtain signals from the body, a signal application unit which applies a signal having a frequency which is higher than one of a frequency of interest of the biological signal to one of a first interface from among the at least three interfaces, and one of a plurality of internal elements of the apparatus, a feedback signal generation unit which generates a feedback signal from component signals generated due to the applied signal, wherein the feedback signal generation unit generates the feedback signal using a signal obtained from at least one of a second interface and a third interface from among the at least three interfaces and an input control unit which receives the generated feedback signal and controls a signal input from at least one of the second interface and third interface to an amplifier.

Abstract: The present invention related to an apparatus and method to removing mechanical resonance of a system using internal control loop, and in more particularly, the internal control loop reduces the resonance factor of the system. The approach in the present invention is not sensitive to the system mechanical parameters changes within time and within temperature changes. The approach in the present invention creates mechanical platform with modified equation that have ? greater than 0.5 which eliminate the mechanical resonance from the system response. The system with resonance response can base on platform that includes the following components: MEMS devices, DC/AC motors and more.

Abstract: An active noise cancellation device (2) for a medical device includes an active circuit having a first input connection (8), a second input connection (10), and an output connection (12). The second input connection (10) is connected to at least one predetermined reference signal. The active noise cancellation device (2) further includes a low-impedance body connection electrode (4) adapted to be in electrical contact with a bloodstream of a subject, wherein the low-impedance body connection electrode (4) is connected to said first input connection (8), and a feedback branch (14) connecting the output connection (12) with the first input connection (8). The feedback branch (14) comprises a current limiting circuit (18) to limit a current through said feedback branch (14) to be lower than a predetermined current.

Abstract: An apparatus for active feed forward electromagnetic interference (EMI) filtering, including, a noise detection and current reconstruction circuit that receives EMI noise occurring at a noise source, and noise voltage compensation circuit operatively coupled to the noise detection arid current reconstruction circuits. The active feed forward circuit generates a noise voltage compensation signal based on the EMI noise reconstructed by the noise detection circuit.

Abstract: A decoupling circuit comprises an output buffer that includes a transistor, and a capacitor that has an end thereof connected to an output node of the output buffer and the other end thereof connected to a power supply line, and a logic level outputted by the output node of the output buffer is fixed.