Component Within Printed Circuit Board Patents (Class 361/761)
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Patent number: 7644497Abstract: To provide a component built-in wiring board and a manufacturing method thereof capable of further improving component mounting density without deteriorating-reliability.Type: GrantFiled: January 17, 2008Date of Patent: January 12, 2010Assignee: Dai Nippon Printing Co., Ltd.Inventors: Tatsuro Imamura, Yuji Yamaguchi, Kazuhiro Shinozaki, Satoshi Shibazaki, Yoshitaka Fukuoka, Hiroyuki Hirai, Osamu Shimada, Kenji Sasaoka, Kenichi Matsumura
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Patent number: 7639509Abstract: The present invention is directed to a dimensionally-stable electronic device such as an LED on flexible printed-circuit-board. The device comprises an electrically-conductive flexible substrate and at least one stabilizing component for dimensionally stabilizing the substrate.Type: GrantFiled: May 10, 2006Date of Patent: December 29, 2009Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.Inventors: Tong Fatt Chew, Ak Wing Leong
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Patent number: 7636242Abstract: An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.Type: GrantFiled: June 29, 2006Date of Patent: December 22, 2009Assignee: Intel CorporationInventors: Peter Hazucha, Edward Burton, Trang T. Nguyen, Gerhard Schrom, Fabrice Paillet, Kaladhar Radhakrishnan, Donald S. Gardner, Sung T. Moon, Tanay Karnik
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Patent number: 7630206Abstract: A releasably mountable electronics component is provided. The electronics component comprises a backing having a mounting surface and an electronic module joined to the mounting surface of the backing. The electronic module has electrical contacts disposed on a first side thereof. The electronic module also includes an adhesive covering at least a portion of the mounting surface. The adhesive provides a releasable adhesive for releasably mounting the electronics component to a substrate on which the electronic module is connectable.Type: GrantFiled: December 15, 2005Date of Patent: December 8, 2009Assignee: International Business Machines CorporationInventor: Derek Kwan
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Patent number: 7625222Abstract: According to one embodiment, a printed circuit board includes a wiring board, a through-hole mount device, and a surface mount device. The wiring board has a first surface, a second surface opposite to the first surface, and through holes. The through-hole mount device has leads. The leads are soldered inside the through holes so that the through-hole mount device is mounted on the first surface. The leads have distal ends positioned inside the through holes. An adhesive fills the region between the wiring board and the through-hole mount device. The adhesive fixes the through-hole mount device to the first surface. A surface mount device is soldered to the second surface and closes the through holes in which the leads are inserted.Type: GrantFiled: November 30, 2007Date of Patent: December 1, 2009Assignee: Kabushiki Kaisha ToshibaInventor: Minoru Takizawa
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Patent number: 7626827Abstract: A sensor module having a package substrate, a sensor disposed within and electrically connected to the package substrate, an amplifier disposed within and electrically connected to the package substrate, and electrical traces within the package substrate for routing sensor signals from the sensor to the amplifier, and then from the amplifier to external electrical connectors on the package substrate.Type: GrantFiled: September 5, 2008Date of Patent: December 1, 2009Assignee: KLA-Tencor CorporationInventors: Henrik K. Nielsen, Dan G. Georgesco
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Publication number: 20090284941Abstract: A semiconductor package includes: a circuit board having a passive component embedded therein; and external terminals provided on a back surface of the circuit board. The passive component is provided at a different position from positions of the external terminals in a thickness direction of the circuit board.Type: ApplicationFiled: February 9, 2009Publication date: November 19, 2009Inventor: Kouji OOMORI
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Publication number: 20090284937Abstract: An electric circuitry for a portable electronic device is presented. The electric circuitry includes a first printed circuit board comprising at least one electrical component attached to and extending from a surface of the first printed circuit board. The electric circuitry further comprises a second printed circuit board arranged to be coupled with the first printed circuit board and comprising at least one recess or hole arranged to receive the at least one electrical component extending from the surface of the first printed circuit board when the first circuit board and the second printed circuit board are coupled to each other.Type: ApplicationFiled: April 28, 2009Publication date: November 19, 2009Applicant: POLAR ELECTRO OYInventor: Pekka Rytky
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Publication number: 20090273910Abstract: The present invention relates to a functional unit, containing at least one active or passive electronic component, the functional unit being surrounded by at least one flexible dielectric layer and, on the outer side of the functional unit, contacts are provided for contacting the electrical components for further mounting.Type: ApplicationFiled: May 4, 2009Publication date: November 5, 2009Applicant: FRAUNHOFER-GESELLSCHAFT ZUR FORDERUNG DER ANGEWANDTEN FORSCHUNG E.V.Inventors: Jurgen Wolf, Kai Zoschke, Thorsten Fischer, Michael Topper, Herbert Reichl
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Patent number: 7613007Abstract: The present invention relates to a device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor layer containing at least one embedded singulated capacitor; and at least one planar capacitor laminate; wherein said planar capacitor laminate serves as a low inductance path to supply a charge to said at least one embedded singulated capacitor; and wherein said at least one embedded singulated capacitor is connected in parallel to at least one of the said planar capacitor laminates; and wherein said power core is interconnected to at least one signal layer.Type: GrantFiled: November 30, 2005Date of Patent: November 3, 2009Assignee: E. I. du Pont de Nemours and CompanyInventors: Daniel Irwin Amey, Jr., Sounak Banerji, William J. Borland, Karl Hartmann Dietz, David Ross McGregor, Attiganal N. Sreeram
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Patent number: 7609527Abstract: An electronic module in which an installation base is used, which includes an insulating-material layer (1) and a conductive layer on the surface of the insulating-material layer. The conductive layer also covers the installation cavity of a component (6). The component (6) is set in the installation cavity, in such a way that the contact zones face towards the conductive layer and electrical contacts are formed between the contact zones of the component (6) and the conductive layer. After this, conductive patterns (14) are formed from the conductive layer, to which the component (6) is attached.Type: GrantFiled: October 17, 2007Date of Patent: October 27, 2009Assignee: Imbera Electronics OYInventors: Risto Tuominen, Petteri Palm
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Patent number: 7606047Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.Type: GrantFiled: July 19, 2006Date of Patent: October 20, 2009Assignee: Panasonic CorporationInventors: Masanori Minamio, Hideki Takehara, Yoshiyuki Arai, Toshiyuki Fukuda
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Patent number: 7599192Abstract: The present invention incorporates electronic components into an electronic core structure that may be readily hot laminated by existing processes. The structure may include multiple desired electronic components, such as a display, battery or other power source, integrated circuits, switches, magnetic stripe emulator, antenna, smart chips or other input devices. The structure includes laminated buffer layers to bridge layers and compensate for variation in electronic component dimensions. The structure may also incorporate battery packaging as part of the core layer structure and use printed electronic circuitry as part of the electronic core layers to impart the desired characteristics. A variety of components may be incorporated in the structure.Type: GrantFiled: August 22, 2005Date of Patent: October 6, 2009Assignee: Aveso, Inc.Inventors: Thomas J. Pennaz, Stephen F. Quindlen, David G. Sime, James P. McDougall
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Publication number: 20090237899Abstract: A printed circuit board (PCB) substrate which can be used in a semiconductor package, such as BGA and LGA, has a top surface and a bottom surface. A magnetic component includes a laterally extending bottom plate, two or more vertically extending posts, and a laterally extending top plate, wherein the bottom plate is fully embedded within the PCB substrate and the two or more posts extend in the PCB substrate from the bottom plate toward the upper surface of the PCB substrate. The top plate contacts an end of each of the two or more posts along the top surface of the PCB substrate.Type: ApplicationFiled: March 23, 2009Publication date: September 24, 2009Applicant: ASIC Advantage Inc.Inventor: Courtney R. Furnival
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Patent number: 7593235Abstract: A thermal conduit to extract heat from an electrical component on a circuit board is disclosed. An electronic assembly according to aspects of the present invention includes an integrated circuit mounted on a circuit board and a thermal conduit having a first and a second portion. The first portion of the thermal conduit is thermally coupled to one or more electrical terminals of the integrated circuit through an opening defined in the circuit board while the second portion of the thermal conduit is thermally coupled to a first material of the circuit board.Type: GrantFiled: July 20, 2006Date of Patent: September 22, 2009Assignee: Power Integrations, Inc.Inventor: Marvin C. Espino
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Patent number: 7586755Abstract: Through an improvement of module size increase due to mounting a single passive element on a substrate and an increase in the mounting cost, to provide a highly reliable, high performance and small sized electronic circuit component which permits to integrate a variety of electronic parts such as capacitors, inductors and resistors in a high density with low cost. The electronic circuit component comprises an insulator substrate, a plurality of electrodes having different areas provided on the insulator substrate, one or more elements selected from a capacitor element of dielectric material sandwiched between the electrodes, an inductor element and resistor element, a metal wiring connecting the elements, a metal terminal part of a part of the metal wiring and an organic insulator material covering the elements and the circumference of the metal wiring portion excluding the metal terminal portion.Type: GrantFiled: August 6, 2007Date of Patent: September 8, 2009Assignee: Hitachi, Ltd.Inventors: Toshiya Satoh, Masahiko Ogino, Takao Miwa, Takashi Naitou, Takashi Namekawa, Toshihide Nabatame, Shigehisa Motowaki
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Patent number: 7582834Abstract: A printed circuit board including an opening for receiving a semiconductor package having a plurality of external connections which protrude externally from side surfaces of the semiconductor package. The board also includes a plurality of board connectors electrically interconnected to the plurality of external connections of the package and formed on sidewall of the opening, wiring patterns for electrically interconnect electronic components mounted on the printed circuit board and being electrically interconnected to the plurality of board connectors, a plurality of holes penetrating the printed circuit board, and a fastener inserted into the plurality of holes and for fastening the semiconductor package received in the opening.Type: GrantFiled: December 30, 2005Date of Patent: September 1, 2009Assignee: Dongbu Electronics Co., Ltd.Inventor: Kwan Yul Lee
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Publication number: 20090207574Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.Type: ApplicationFiled: June 20, 2008Publication date: August 20, 2009Applicant: Cyntec Co., LtdInventors: Da-Jung Chen, Chau-Chun Wen, Chun-Tiao Liu
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Publication number: 20090195997Abstract: A mounting region is provided at an approximately center of one surface of an insulating layer. A conductive trace is formed so as to outwardly extend from inside of the mounting region. A cover insulating layer is formed in the periphery of the mounting region so as to cover the conductive trace. A terminal of the conductive trace is arranged in the mounting region, and a bump of an electronic component is bonded to the terminal. A metal layer made of copper, for example, is provided on the other surface of the insulating layer. A slit is formed in the metal layer so as to cross a region being opposite to the electronic component and to divide the metal layer.Type: ApplicationFiled: January 20, 2009Publication date: August 6, 2009Applicant: NITTO DENKO CORPORATIONInventors: Yasuto Ishimaru, Hirofumi Ebe
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Publication number: 20090195999Abstract: A first insulating layer is formed on a suspension body, and a write wiring trace is formed on the first insulating layer. A second insulating layer is formed on the first insulating layer so as to cover the wiring trace. A ground layer is formed on the second insulating layer so as to be positioned above the wiring trace. Moreover, a third insulating layer is formed on the second insulating layer so as to cover the ground layer. A read wiring trace is formed on the third insulating layer. A fourth insulating layer is formed on the third insulating layer so as to cover the wiring trace.Type: ApplicationFiled: January 23, 2009Publication date: August 6, 2009Applicant: NITTO DENKO CORPORATIONInventors: Mitsuru HONJO, Toshiki NAITOU, Katsutoshi KAMEI
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Publication number: 20090195998Abstract: A mounting region having a rectangular shape is provided at an approximately center of one surface of an insulating layer. A plurality of conductive traces are formed so as to outwardly extend from the inside of the mounting region. A cover insulating layer is formed so as to cover the plurality of conductive traces in a periphery of the mounting region. An electronic component is mounted on the insulating layer so as to overlap with the mounting region. A metal layer is provided on the other surface of the insulating layer. Openings having a rectangular shape are formed in the metal layer along a pair of longer sides and a pair of shorter sides of the mounting region. The openings are opposite to part of terminals of the plurality of conductive traces, respectively, with the insulating layer sandwiched therebetween.Type: ApplicationFiled: January 22, 2009Publication date: August 6, 2009Applicant: NITTO DENKO CORPORATIONInventors: Yasuto ISHIMARU, Hirofumi EBE
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Patent number: 7566968Abstract: A biosensor that has a smart card configuration includes a semiconductor chip including a bioactive structure and contact areas disposed on a first side of the semiconductor chip, and a rewiring substrate including contact pads, external contact areas and rewiring lines that electrically connect the contact pads to the external contact areas. The rewiring substrate covers a portion of the first side of the semiconductor chip without covering the bioactive structure, such that the rewiring substrate overlaps the contact areas of the semiconductor chip and the contact pads and the contact areas are aligned with and electrically connect to each other. In addition, a measuring apparatus is configured to receive the biosensor and conduct measurements of a fluid medium that is delivered into the measuring apparatus.Type: GrantFiled: August 4, 2005Date of Patent: July 28, 2009Assignee: Siemens AktiengesellschaftInventors: Michael Bauer, Bernd Goller, Robert-Christian Hagen, Gerald Ofner, Christian Stuempfl, Holger Woerner
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Publication number: 20090175011Abstract: When a package substrate with a built-in capacitor includes a first thin-film small electrode 41aa and a second thin-film small electrode 42aa that are electrically short-circuited to each other via a pinhole P in a high-dielectric layer 43, a power supply post 61a and a via hole 61b are not formed in the first thin-film small electrode 41aa, and a ground post 62a and a via hole 62b are not formed in the second thin-film small electrode 42aa, either. As a result, the short-circuited small electrodes 41aa and 42aa are electrically connected to neither a power supply line nor a ground line, and become a potential independent from a power supply potential and a ground potential. Therefore, in the thin-film capacitor 40, only the portion where the short-circuited small electrodes 41aa and 42aa sandwich the high dielectric layer 43 loses the capacitor function, and portions where other thin-film small electrodes 41a and 42a sandwich the high dielectric layer 43 maintain the capacitor function.Type: ApplicationFiled: March 10, 2009Publication date: July 9, 2009Applicant: IBIDEN CO., LTD.Inventor: Takashi KARIYA
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Publication number: 20090175010Abstract: A repair system which prevents heating of weakly heat resistant devices together and causing deterioration of the quality when preheating a first surface of the circuit board, wherein an electromagnetic induction material is buried in advance inside the circuit board near a specific electronic device envisioned as needed repair when becoming a defective electronic device in a production process and an electromagnetic coil emitting electromagnetic waves to an electromagnetic induction member in the vicinity of the repair device is provided and the heat generated by the electromagnetic induction member due to the electromagnetic waves enables the repair device to be heated and detached from the circuit board.Type: ApplicationFiled: October 9, 2008Publication date: July 9, 2009Applicant: Fujitsu LimitedInventors: Shigeo Iriguchi, Kiyoyuki Hatanaka, Satoshi Watanabe, Nobuo Taketomi, Keiichi Yamamoto, Masaru Sugie
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Patent number: 7557302Abstract: A printed circuit board for preventing electrostatic discharge damage includes several electronic components thereon. The printed circuit board defines a number of through holes therein. The printed circuit board includes a signal layer. The signal layer defines a first copper foil and second copper foil thereon. The first copper foils are disposed around the corresponding through holes and connect with the through holes. The second copper foils are disposed around the first copper foils and extend to two adjacent edges of the printed circuit board. The first copper foil and the second copper foil have a number of saw teeth. A gap between the first copper foil and the second foil is in the range from 0.1-0.125 mm.Type: GrantFiled: December 6, 2005Date of Patent: July 7, 2009Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hong Hai Precision Industry Co., Ltd.Inventor: Yu-Xiang Wang
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Publication number: 20090168380Abstract: A package substrate embedded with a semiconductor component is provided. A semiconductor chip is received in a cavity of a substrate body, and has electrode pads on an active surface thereof. A passivation layer is disposed on the active surface and has openings for exposing the electrode pads. An electroless plating metal layer, a first sputtering metal layer and a second sputtering metal layer are sequentially formed on the electrode pads, the openings of the passivation layer and the passivation layer surface around the openings. Contact pads are formed on the second sputtering metal layer. A first dielectric layer is disposed on the substrate body and the passivation layer. A first circuit layer is formed on the first dielectric layer. First conductive vias are formed in the first dielectric layer and electrically connected to the contact pads. The first circuit layer is electrically connected to the first conductive vias.Type: ApplicationFiled: December 19, 2008Publication date: July 2, 2009Applicant: Phoenix Precision Technology CorporationInventors: Shih-Ping Hsu, Kan-Jung Chia
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Patent number: 7554822Abstract: Power converter for receiving an input current at an input voltage and for providing an output current at an output voltage. The power converter comprises a transformer (133) having a primary (136) and at least one secondary (138) side, wherein the transformer shows a mutual inductivity Ls. The power converter further comprises at least one switching device (124a, 124b) being operated at an operating frequency fop at the primary side of said transformer, and a capacitor CS at the primary side of the transformer. The capacitor forms a resonant circuit with the leakage inductivity LS of said transformer, wherein said operating frequency, said capacitor Cs, said mutual inductivity Lm and said leakage inductivity LS are matched such that the effective value of the output current is substantially constant with respect to variations of a load being traversed by said output current by using resonance principles and operating the power converter in a current source mode.Type: GrantFiled: September 27, 2005Date of Patent: June 30, 2009Assignee: Koninklijke Philips Electronics N.V.Inventors: Eberhard Waffenschmidt, Tom Neubert
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Patent number: 7551454Abstract: A thin-film assembly (1) including a substrate (2) and at least one electronic thin-film component (8) applied on the substrate by thin-film technology, wherein a base electrode (4) is provided on the substrate, on which base electrode thin-film layers (21) forming part of the thin-film component are arranged together with an upper top electrode (9); the substrate (2) is comprised of a printed circuit board (2) known per se and including an insulation-material base body (3) and a metal coating as the conductor layer (5), wherein the conductor layer (5) forms the base electrode (4) and, to this end, is smoothed at least on the location of the thin-film component (8), and wherein a contact layer (18) is applied by thin-film technology between the smoothed, optionally reinforced, conductor layer (5) and the superimposed thin-film layers (21) of the thin-film component (8), which contact layer is physically or chemically adsorbed on the surface of the base electrode (4).Type: GrantFiled: September 9, 2004Date of Patent: June 23, 2009Assignee: AT & S Austria Technologie & Systemtechnik AktiengesellschaftInventors: Markus Wuchse, Nikolai Haslebner, Ronald Frosch, Manfred Riedler, Günther Leising
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Patent number: 7550842Abstract: In an integrated circuit assembly, know good die (KGD) are assembled on a substrate. Interconnect elements electrically connect pads on a die attached to the substrate to traces or other electrical conductors on the substrate or to pads on another die attached to the substrate. The substrate may have one or more openings, exposing pads of the die. The assembly may comprise one or more dice.Type: GrantFiled: December 12, 2002Date of Patent: June 23, 2009Assignee: FormFactor, Inc.Inventors: Igor Y. Khandros, Benjamin N. Eldridge, Charles A. Miller, A. Nicholas Sporck, Gary W. Grube, Gaetan L. Mathieu
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Publication number: 20090154121Abstract: A clock generator includes a printed circuit board, a resonant circuit and a pair of compensating capacitors. The resonant circuit is disposed on the printed circuit board. The compensating capacitors are embedded in the printed circuit board and electrically connected to both terminals of the resonant circuit respectively.Type: ApplicationFiled: December 18, 2007Publication date: June 18, 2009Inventor: Chih-Chien Lee
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Publication number: 20090154122Abstract: A mechanical component-containing board includes a board body and a mechanical component having a part thereof built in and integrated with the board body.Type: ApplicationFiled: February 13, 2009Publication date: June 18, 2009Applicant: FUJITSU LIMITEDInventor: Naoki Makamura
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Publication number: 20090154123Abstract: An information handling system includes a chassis having a guide slot and a printed circuit board placed in guide slot of the chassis. The guide slot includes at least two opposing channels aligned adjacent the printed circuit board with a guide tab formed in one of the opposing channels. A daughter card electrically couples to the printed circuit board when placed in an attached position. The daughter card includes a first edge and a second edge that slides between the opposing channels of the guide slot such that the card aligns to couple to the printed circuit board. The card also includes a first detent formed in either the first edge or the second edge. The first detent releaseably interacts with the guide tab formed in the opposing channels such that the guide tab contacts the first detent when the card is placed in an intermediate position.Type: ApplicationFiled: February 23, 2009Publication date: June 18, 2009Applicant: DELL PRODUCTS L.P.Inventors: Andrew T. Junkins, Brently L. Cooper
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Patent number: 7548432Abstract: An embedded capacitor structure comprising a main body; at least one embedded capacitor, having a first electrode, a dielectric layer, and a second electrode, formed in the main body; and at least one via electrical connection formed in the main body; wherein at least one of the first and second electrodes is free from direct electrical connection to the via electrical connections.Type: GrantFiled: March 24, 2005Date of Patent: June 16, 2009Assignee: Agency for Science, Technology and ResearchInventors: Chee Wai Lu, Boon Keng Lok, Kai Meng Chua, Lai Lai Wai
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Patent number: 7545652Abstract: Provided is a system adopting a differential signaling system including a low frequency signaling line arranged to be adjacent to a pair of differential signaling lines in parallel to each other, for transmitting a signal having a frequency which is smaller than a frequency of a signal to be transmitted through the pair of differential signaling lines, in which a transmission end of the low frequency signaling line is connected to a ground pattern through a first capacitive element, and a reception end of the low frequency signaling line is connected to the ground pattern through a second capacitive element. Thus, it is possible to provide, easily and at a low cost, a differential signaling system in which a common mode noise is eliminated without increasing the number of pins.Type: GrantFiled: July 14, 2006Date of Patent: June 9, 2009Assignee: Canon Kabushiki KaishaInventor: Hiroyuki Yamaguchi
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Patent number: 7542301Abstract: An embossing die, the die comprises one or more protruding features configured to create one or more corresponding recessed regions in a substrate; and a left side edge and a right side edge. Either the left side edge or the right side edge is a gradually sloping edge. The embossing die can be used to form an assembly. The assembly comprises a substrate including a more than one defined frames. Each of the defined frames comprises a plurality of recessed regions and a plurality of functional blocks, each functional block being deposited in one of the recessed regions. Each of the defined frames is separated from another frame by a region. The region can be a flattened region, a sloped region, or a plateau shaped region having a plateau top and two sloped sides, wherein each sloped side forms about 10-15 degree angle to a surface of the substrate.Type: GrantFiled: June 22, 2005Date of Patent: June 2, 2009Assignee: Alien Technology CorporationInventors: Lily Liong, Kenneth D. Schatz, Gordon Craig, Mark A. Hadley, Eric Kanemoto
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Patent number: 7542302Abstract: An apparatus is provided and includes a label layer, disposed in a user visible interface of a front bezel, in which an icon is etched, a multi-layer printed circuit board (PCB), abutting a rear surface of the label layer and being configured to form a light source housing that positionally corresponds to that of the icon, a light source assembly, including a substrate, which is fixedly recessed in a rear portion of the light source housing, and a light emitting portion, supported by the substrate, from which light is emitted toward at least the icon, and solder plating to reflect light emitted by the light source away from the preselected icon toward the preselected icon.Type: GrantFiled: July 14, 2008Date of Patent: June 2, 2009Assignee: International Business Machines CorporationInventors: Michael A. Curnalia, Michael L. Harper, Craig A. Klein, Gregg S. Lucas, Mary Anne J. Marquez, Robert E. Medlin
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Patent number: 7538440Abstract: A printed circuit board having at least one conductive region covered in solder paste has preformed solder elements placed on the solder paste in the conductive region. A component package is placed onto the printed circuit board over the conductive region and the solder is reflowed, forming a wide solder interconnection between the component and the conductive region of the printed circuit board.Type: GrantFiled: April 30, 2003Date of Patent: May 26, 2009Assignee: Intel CorporationInventors: Dudi I. Amir, Damion T. Searls
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Publication number: 20090129037Abstract: The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element.Type: ApplicationFiled: November 28, 2006Publication date: May 21, 2009Inventor: Yutaka YOSHINO
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Patent number: 7535728Abstract: To reduce switching noise, the power supply terminals of an integrated circuit die are coupled to the respective terminals of at least one embedded capacitor in a multilayer ceramic/organic hybrid substrate. In one embodiment, a ceramic portion of the substrate includes at least one capacitor formed of a high permittivity layer sandwiched between conductive planes. An organic portion of the substrate includes suitable routing and fan-out of power and signal conductors. The organic portion includes a build-up of multiple layers of organic material overlying the ceramic portion. Also described are an electronic system, a data processing system, and various methods of manufacture.Type: GrantFiled: August 22, 2006Date of Patent: May 19, 2009Assignee: Intel CorporationInventors: Kishore K. Chakravorty, Paul H. Wermer, David G. Figueroa, Debabrata Gupta
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Patent number: 7531755Abstract: The idea of the invention is to form a cavity in a multilayer substrate at the point of the structure to be trimmed. This enables the embedding of tolerance critical components inside substrates, such as printed circuit boards, modules, and sub-systems. Trimming is done through the cavity using, for example, a laser. After trimming the cavity is easy to fill in with a suitable dielectric material, or to cover otherwise, e.g. by using a lid, or to leave the cavity uncovered.Type: GrantFiled: June 20, 2005Date of Patent: May 12, 2009Assignee: Nokia CorporationInventors: Olli Salmela, Ilpo Kokkonen
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Patent number: 7525814Abstract: A wiring board includes a plurality of via pads disposed on a ceramic sub-core accommodated in a core board. A Cu-plated layer is formed on the surface of a conductor pad and serves as a processed face, i.e., a face to which Cu surface chemical processing is applied in order to improve the adhesion between the surface of the Cu-plated layer and that of an adjacent polymer material. The lowermost dielectric layer of a laminated wiring portion, and a via conductor formed in the dielectric layer, are in electrical contact with the processed face.Type: GrantFiled: June 6, 2006Date of Patent: April 28, 2009Assignee: NGK Spark Plug Co., Ltd.Inventors: Shinji Yuri, Masaki Muramatsu
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Patent number: 7525602Abstract: A liquid crystal television apparatus includes a tuner, a signal processor, a liquid crystal cell, a light source for backlight, an inverter, and a power supply, includes a first circuit board including a single-sided board, a second circuit board including a multilayered board, and a connector that electrically connects the first and second circuit boards. An area of the second circuit board is smaller than the first circuit board. The signal processor is mounted on the second circuit board. On the first circuit board, the tuner is arranged in a lower portion of a left or right side of the first circuit board, the inverter is arranged in an upper portion of an opposite side of the first circuit board to the tuner, the power supply is arranged in a lower portion in the opposite side, and the connector is arranged in an upper portion of the same side.Type: GrantFiled: November 9, 2005Date of Patent: April 28, 2009Assignee: Funai Electric Co., Ltd.Inventor: Kazuhiko Yamamoto
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Patent number: 7523551Abstract: A manufacturing method of a multi-layer circuit board embedded with a passive component includes the steps of: providing a conductive foil which has one or more pairs of metal protruding points; connecting a passive element to the corresponding metal protruding points; providing a board having a core substrate with organic insulation layer on a core substrate; stacking the conductive foil and the board, wherein the passive component is embedded in the organic insulation layer and patterning on the conductive foil.Type: GrantFiled: July 18, 2005Date of Patent: April 28, 2009Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Ching-Fu Horng, Yung-Hui Wang
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Patent number: 7520978Abstract: A system for purifying a fluid uses ultra violet (UV) light to inactivate micro-organisms present in the fluid. The system has an arrangement of UV light emitters on perforated plates. The fluid, while passing through perforations in the perforated plates, is exposed to the UV light emitted by the UV light emitters. Micro-organisms present in the fluid pass very close to the UV light emitters. The UV light absorbed by the micro-organisms causes genetic damage and inactivation. The system has feedback units providing feedback about the physical properties of the fluid to a power unit supplying power to the UV light emitters. The power unit varies the amount of power supplied to the UV light emitters, based on the feedback.Type: GrantFiled: June 17, 2005Date of Patent: April 21, 2009Assignee: Philips Lumileds Lighting Co., LLCInventor: Gerard Harbers
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Patent number: 7521779Abstract: A multi-layer structure including a base insulating layer and a thin metal film layer (seed layer) is prepared. A plating resist layer is formed to have a prescribed pattern on the upper surface of the thin metal film layer. A metal plating layer is formed on the thin metal film layer exposed by electroplating. Then, the plating resist layer is removed, and the thin metal film layer in the region having the plating resist layer is removed. In this way, a conductive pattern including the thin metal film layer and the metal plating layer is formed. The upper surface of the base insulating layer in the region without the conductive pattern is subjected to roughening treatment. A cover insulating layer is formed on the upper surfaces of the base insulating layer and the conductive pattern. In this way, a printed circuit board is completed.Type: GrantFiled: November 16, 2005Date of Patent: April 21, 2009Assignee: Nitto Denko CorporationInventors: Tadao Ookawa, Mitsuru Honjo, Takashi Oda
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Publication number: 20090097218Abstract: There is provided a capacitor-embedded printed wiring board incorporating therein a capacitor having stabilized electrical characteristics. The capacitor-embedded printed wiring board includes: a capacitor having a first electrode 5, a high dielectric constant layer 7 and a second electrode 9 which are sequentially laminated on an insulating substrate 1, the second electrode being electrically connected to a land 6 for electrode contact formed in a wiring layer in which the first electrode is formed; a member 12 having at least one insulating layer and laminated over the capacitor and the wiring layer; and a via 18 having an opening extending through the member and the second electrode to reach the land, the via electrically interconnecting the second electrode and the land in the opening. A method of manufacturing the same is also provided.Type: ApplicationFiled: October 6, 2008Publication date: April 16, 2009Inventor: Garo Miyamoto
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Publication number: 20090091903Abstract: A stack structure of circuit boards embedded with semiconductor chips is proposed. At least two circuit boards are provided. Each of the circuit boards includes circuit layers formed on surfaces thereof and at least one opening embedded with a semiconductor chip, wherein, the circuit layers have a plurality of conductive structures and electrically conductive pads, and the semiconductor chip has a plurality of electrode pads, and the conductive structures of the circuit layers are electrically conductive to the electrode pads of the semiconductor chip. At least one adhesive layer is formed between the two circuit boards and disposed with a conductive material corresponding in position to the electrically conductive pads of the circuit boards. Thus, a conductive path can be formed by the conductive material between the electrically conductive pads of the circuit boards, thereby establishing electrical connection between the two circuit boards.Type: ApplicationFiled: October 27, 2006Publication date: April 9, 2009Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventors: Shih Ping Hsu, Chung Cheng Lien, Chia Wei Chang
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Patent number: 7515435Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.Type: GrantFiled: December 28, 2006Date of Patent: April 7, 2009Assignee: Industrial Technology Research InstituteInventors: Uei-Ming Jow, Chang-Sheng Chen, Chin-Sun Shyu, Min-Lin Lee, Shinn-Juh Lay, Ying-Jiunn Lai
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Patent number: 7515434Abstract: A technique for enhancing circuit density and performance is disclosed. In one particular exemplary embodiment, the technique may be realized as a method for enhancing circuit density and performance of a microelectronic module. The method may comprise forming a discrete package, wherein the discrete package comprises one or more passive devices that are desirable for the performance of the microelectronic module. The method may also comprise coupling the discrete package to the microelectronic module.Type: GrantFiled: December 20, 2004Date of Patent: April 7, 2009Assignee: Nortel Networks LimitedInventors: Aneta Wyrzykowska, Herman Kwong, Kah Ming Soh
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Patent number: 7515448Abstract: In an AC adapter provided with a circuit board having first and second surfaces opposite to each other in a thickness direction, a transformer portion is mounted on the circuit board. A secondary capacitor is connected to an output side of the transformer portion. The secondary capacitor has a low profile and extending in parallel to the circuit board. Thus, the AC adapter as a whole is reduced in external size. Preferably, the transformer portion is mounted on the first surface while the secondary capacitor is mounted on the second surface.Type: GrantFiled: September 29, 2005Date of Patent: April 7, 2009Assignee: NEC TOKIN Corp.Inventors: Masahiko Takahashi, Satoshi Arai