Abstract: The present invention is to provide a printed wiring board in which malconnection or disconnection caused by a difference between coefficients of thermal expansion of a semiconductor chip and a printed wiring board can be decreased even when a highly-integrated semiconductor apparatus is mounted thereon and an electronic device using the same. An electronic device (4) according to the present invention includes a printed wiring board (1) with a component mounting pin (18) and a surface-mounting type semiconductor apparatus (2) with an electrode pad (3), wherein the component mounting pin (18) has elasticity and is urged against the electrode pad (3) to maintain electric connection.

Abstract: A device for integrating LCD monitor circuitry to improve the productivity and reduce the cost of manufacturing LCD monitors are disclosed. The device of the invention comprises: a power converting circuit, providing power required by the LCD monitor circuitry; a back-light driving circuit, providing a driving signal required by a LCD back-light module; and an image processing circuit, processing an image signal for LCD displaying; wherein said power converting circuit, said back-light driving circuit and said image processing circuit are integrated on a single-layered printed circuit board (PCB).

Abstract: A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.

Abstract: A motherboard for a portable notebook computer includes a circuit board, and an extension card module connected with the circuit board. The circuit board defines a cutout in one corner thereof and includes a top layer and a bottom layer. The top layer includes a first area, a second area, a third area, and a fourth area. The first area and the third area are located near one edge of the circuit board. The second area and the fourth area are located near an opposite edge of the circuit board. The first area and the second area are near the cutout. A central processing unit, a graphics processing unit (GPU), a peripheral component interconnect (PCI) card, and a memory are located on the first through fourth areas of the circuit board respectively. The extension card module selectively receives a variety of extension cards.

Abstract: This invention provides a small package board integrated with power supply capable of supplying a low level of voltage and high level of current to an IC while achieving a low height of its power supply. It becomes hard to saturate an inductor magnetically when the surface of a copper wire is coated with a magnetic layer, and the inductor can accordingly be provided with a sufficient degree of inductance. A multiplicity of inductors can be provided within a confined space by arranging a multiplicity of inductors in parallel, and by fixing them with resin so as to form an inductor array, thereby making it possible to divide a power supply. The number of power supply lines is increased by dividing the power supply so as to reduce the level of current in an individual power supply line, so that a high level of current can be supplied to an IC chip.

Abstract: A multilayer substrate having a built-in chip-type electronic component includes a ceramic laminate having a plurality of ceramic layers, a chip-type electronic component disposed in the ceramic laminate and having an external terminal electrode, and a via conductor disposed in the ceramic layers in the lamination direction. The external terminal electrode of the chip-type electronic component is connected to the via conductor, and a connection step is provided in at least one of the upper and lower end surfaces of the via conductor.

Abstract: A ceramic multilayer substrate includes a plurality of laminated ceramic layers and at least one conductor pattern and disposed on at least one of the ceramic layers. The ceramic multilayer substrate has a cavity in at least a first main surface. The ceramic multilayer substrate includes a deformation preventing pattern disposed on at least one of the ceramic layers having an opening forming the cavity. The deformation preventing pattern surrounds the entire perimeter of the opening and is made of the same material as the conductor pattern.

Abstract: An LED chip package structure includes a ceramic substrate, a conductive unit, a hollow ceramic casing, many LED chips, and a package colloid. The ceramic substrate has a main body, many protrusions extended from the main body, many penetrating holes respectively penetrating through the protrusions, and many half through holes formed on a lateral side of the main body and respectively formed between each two protrusions. The conductive unit has many first conductive layers respectively formed on the protrusions, many second conductive layers respectively formed on inner surfaces of the half through holes and a bottom face of the main body, and many third conductive layers respectively filled in the penetrating holes. The hollow ceramic casing is fixed on the main body to form a receiving space. The LED chips is received in the receiving space. The package colloid is filled in the receiving space for covering the LED chips.

Abstract: A first wiring substrate has a first wiring substrate main body and a first wiring pattern provided on a first surface of the first wiring substrate main body. A first electronic component is surface-mounted on the first wiring pattern. A second wiring substrate has a second wiring substrate main body and a second wiring pattern provided on a first surface of the second wiring substrate main body. The second wiring substrate is arranged under the first wiring substrate such that the first surface of the first wiring substrate main body opposes to the first surface of the second wiring substrate main body. A second electronic component is surface-mounted on the second wiring pattern, and arranged to oppose to the first electronic component. A resin member seals a space between the first wiring substrate and the second wiring substrate.

Abstract: Components having different heights are installed in a multilayer substrate using a metal core layer formed by bonding a plurality of metal layers. The metal core layer includes through-holes and a spot-faced portion. Passive components and an active component are disposed in the through-holes and the spot-faced portion, respectively. These components are connected to conductive patterns formed on wiring layers, with connecting vias therebetween. Contact faces of each component with the connecting vias are controlled so as to be disposed at the same level with the metal layers.

Abstract: The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof and provides a chip embedded printed circuit board including: an insulating layer having vias formed therethrough; a first chip and a second chip embedded in the insulating layer and having pads, which are respectively exposed to upper and lower surfaces of the insulating layer, on one surfaces thereof; an upper pattern formed on the upper surface of the insulating layer to be connected to the pads of the first chip and the vias; and a lower pattern formed on the lower surface of the insulating layer to be connected to the pads of the second chip and the vias. Also, the present invention provides a manufacturing method of a chip embedded printed circuit board.

Abstract: The electronic device, which allows inhibiting the breaking-away of the element from the frame member, even if the temperature change of the electronic device is repeated, and the process for manufacturing the electronic device, are achieved. An electronic device includes a photo-sensitive element formed in a wafer, a frame member installed on the wafer to surround a functional unit, and an encapsulating resin layer filling a circumference of the frame member.

Abstract: A process for fabricating a circuit board with an embedded passive component is provided. First, an electrode-patterned layer having electrodes is formed on a surface of a conductive layer. Then, a passive component material is filled in the intervals between the electrodes. Then, the conductive layer and the electrode-patterned layer are laminated to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer. Next, the conductive layer is patterned to form a circuit layer.

Abstract: A multilayer ceramic substrate includes a plurality of ceramic layers laminated each other. The plurality of ceramic layers form a bulge and a cavity having such a shape that an opening area of the cavity gradually becomes smaller toward a bottom of the cavity.

Abstract: A wiring board includes: a semiconductor chip; an insulating layer in which the semiconductor chip is embedded; a wiring connected to the semiconductor chip; and reinforcing layers for reinforcing the insulating layer, the reinforcing layers respectively formed on a front face side of the insulating layer and a rear face side of the insulating layer.

Abstract: A probing apparatus can include a plurality of contact probes, which can be of a type that is disposed along an axis. Each contact probe can include a contact portion, a base portion, and resilient portion. Multiple arms can form the resilient portion, which can be disposed between the contact portion and the base portion. The contact probes can be configured to twist when compressed. The probing apparatus can also include a substrate with through holes, and the contact probes can be inserted into the through holes. The resilient portion of each of the contact probes can bias the contact portion such that at least a portion of the contact portion extends out of a through hole.

Abstract: The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The prevent invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.

Abstract: A circuit device capable of suppressing reduction of reliability resulting from heat generated in a circuit element is obtained. This circuit device comprises a first insulating layer having a first opening and a second opening, a first conductor filling up the first opening of the first insulating layer, a second conductor, formed along the inner side surface of the second opening of the first insulating layer, having a concave upper surface and a circuit element arranged above a region of the first insulating layer formed with the first opening.

Abstract: An electrically connecting terminal structure of a circuit board and a manufacturing method thereof are disclosed.

Abstract: A high-reliability electronic component without reduction in insulation resistance under high-temperature and high-humidity conditions has satisfactory solderability of external electrodes. The electronic component includes a main body and external electrodes disposed on surfaces of the main body, the external electrodes include underlying electrode layers each containing a metal, alloy layers each disposed on the corresponding underlying electrode layer, Ni plating layers each disposed on the corresponding alloy layer, Ni oxide layers each disposed on the corresponding Ni plating layers, and upper plating layers each disposed on the corresponding Ni oxide layer, each Ni oxide layer having a thickness of about 150 nm or less, and each Ni plating layer having an average particle size of Ni particles of about 2 ?m or more. To form the Ni plating layers having reduced grain boundaries, heat treatment is performed at about 500° C. to about 900° C.

Abstract: This publication discloses an electronics module and a method for manufacturing it. The electronics module includes at least one component (6) embedded in an insulating-material layer (1), which has a first contacting surface, in which there are first contact terminals (7), from which the component (6) is connected electrically to the conductor structures contained in the electronics module. In addition, the component (6) has a second contacting surface opposite to the first contacting surface, in which there is at least one second contact terminal (7?), from which the component (6) is connected electrically to the conductor structures contained in the electronics module. With the aid of the invention, it is possible to achieve an electronic-module construction that saves space compared to the prior art.

Abstract: An electronic parts packaging structure including an insulating layer acting as a flexible substrate, an electronic parts buried in the insulating layer in a state that a whole electronic parts is covered with the insulating layer, and a wiring layer buried in the insulating layer and connected electrically to a connection pad of the electronic parts. A structure body in which a plurality of electronic parts are buried in the insulating layer may be folded and electronic parts may be connected electrically.

Abstract: An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.

Abstract: A self-excited inverter circuit, includes: a booster transformer with a secondary coil, a feedback coil, and a primary coil respectively wound thereon, the primary coil including a center tap to which operating power can be supplied; a first N-channel FET having a drain to which is connected one terminal of the primary coil, and having a gate to which is connected one terminal of the feedback coil; and a second N-channel FET having a drain to which is connected the other terminal of the primary coil, and having a gate to which is connected the other terminal of the feedback coil, wherein: using a high voltage drive output generated in the secondary coil when the first and second N-channel FETs are turned on alternately, a discharge tube is driven and turned on; and the first and second N-channel FETs are both formed in a single package.

Abstract: Wiring an IC, using flexible circuits, by relating a circuit board to an IC and using traces on the circuit board as a second set of input to the IC. More specifically, a set of first lands on the circuit board are connected to a first set of lands on the IC. The circuit board and IC are positioned so as to present a second set of lands on the circuit board in close proximity to a second set of lands on the IC. A first flex circuit is connected to the second lands on the circuit board while a second flex circuit is connected to the second lands on the IC. The flex circuits may be connected to signal wires or may serve themselves as the main signal wires.

Abstract: An apparatus is disclosed for a module structure of a mobile communication terminal. The module structure comprises a radio frequency portion for processing communicated radio frequency signals, and a base-band portion commonly used by the radio frequency portion for providing modular replacement of a radio frequency multi-chip module connected to the radio frequency portion. The radio frequency multi-chip module is selected in accordance with a corresponding frequency band of the mobile communication terminal.

Abstract: A metal base circuit board to be used for a hybrid integrated circuit, including circuits provided on a metal plate via an insulating layer, a power semiconductor mounted on the circuit, and a control semiconductor to control the power semiconductor, provided on the circuit. A low capacitance portion is embedded under a circuit portion on which the control semiconductor is mounted, preferably. The low capacitance portion is made of a resin containing an inorganic filler and has a dielectric constant of from 2 to 9.

Abstract: A manufacturing method and an electronic module manufactured according to the method including an assembly with two insulating sheets and an electronic element. A first insulating sheet constituting one of the faces of the module including at least one window in which the electronic element is housed, one face of said element levelling the surface of said first sheet and appearing on the exterior face of the module. The second insulating sheet constitutes the other face of the module. The module includes an adhesive film which extends over a region covering at least the outline of the window of the element and is situated in a region situated between the first sheet and the second sheet. The module can also include at least one electronic circuit placed between the two insulating sheets and connected to the element on the conductive connection areas located on the interior face of the element.

Abstract: A circuit board includes a functional device, a circuit board embedding therein the functional device, and first and second conductive-wiring layers formed on the front and rear surfaces of the circuit board to sandwich therebetween the functional device and each include at least one conductor layer. The surface of each of the outermost patterned interconnections of the first conductive-wiring layer is exposed, and the surface of a first dielectric layer isolating the outermost patterned interconnections from one another protrudes from the surface of the each of the patterned interconnections. The patterned interconnections of the second conductive-wiring layer are connected to respective electrode terminals of the functional device, and the surface of a second dielectric layer isolating the electrode terminals from one another is substrate within the same plane as the surface of the electrode terminals disposed adjacent to the second dielectric layer.

Abstract: A single-layer component package comprising: a single conductive-pattern layer having a first surface; an insulating-material layer on the first surface of the single conductive-pattern layer; in an installation cavity inside the insulating-material layer, a semiconductor component having flat contact zones; and solid contact pillars containing copper and solderlessly, metallurgically and electrically connecting the flat contact zones to the single conductive-pattern layer.

Abstract: A multilayered electronic component that is easy to manufacture and that has excellent electrical characteristics includes end portions of coil wiring patterns that oppose a coil connection electrode that is displaced on the surface of a second ceramic layer due to an increase or decrease in the number of first ceramic layers. A coil connection electrode has a shape in which surface portions of second ceramic layers or opposed second ceramic layers having the first ceramic layers disposed in between are connected to the end portions of the coil wiring patterns that oppose the respective coil connection electrode, which are displaced due to the increase or decrease in the number of the first ceramic layers. A connection wiring pattern has a shape in which one portion of a coil connection electrode is connected to one portion of an external extension electrode connection pattern.

Abstract: In at least one embodiment, a circuit board assembly that includes a printed circuit board is provided. The printed circuit board includes a top surface and a bottom surface for supporting at least one through-hole electrical component. The printed circuit board defines at least one component hole extending from the top surface to the bottom surface for receiving the at least one through-hole electrical component. The at least one component hole includes a first section having a first diameter and a second section having a second diameter. The first diameter is different from the second diameter. Each of the first and the second sections are configured to receive solder paste for forming a solder joint with the at least one through-hole electrical component.

Abstract: The window base material of the present invention is provided with an intermediate layer having a window section composed of transparent resin and a colored section composed of colored resin surrounding the window section, and a transparent first base material and second base material which sandwich the intermediate layer. The card with embedded module of the present invention is provided with a module having a display element, an adhesive layer covering the module, and a paired third base material and fourth base material which sandwich the module with interposition of the adhesive layer, wherein the third base material is composed of the window base material, and the display section of the display element is disposed so as to face the window section of the window base material.

Abstract: A primary memory board is disclosed. The primary memory board comprises a printed circuit board (PCB) having a front side and a back side, a plurality of DIMM surface mount connectors, and at least one component. The plurality of DIMM surface mount connectors are mounted on the front side of the PCB. The at least one component is mounted on the back side of the PCB and is positioned opposite the location of at least one of the plurality of DIMM surface mount connectors mounted on the front side of the PCB.

Abstract: A method of wiring data transmission lines between a CPU including CPU data pins identified by a set of pin numbers and a DRAM including DRAM data pins also identified by the set of pin numbers, the method including connecting the CPU data pins to the DRAM data pins with data transmission lines including unit-bit data transmission lines so that the unit-bit data transmission lines do not cross each other and without matching the pin numbers of the CPU data pins to the pin numbers of the DRAM data pins.

Abstract: A fabricating method of a wiring board provided with passive elements is disclosed. The fabricating method includes coating one or both of resistive paste and dielectric paste on at least any one of first surfaces of a first metal foil and a second metal foil each of which has a first surface and a second surface; arranging an insulating board having thermo-plasticity and thermo-setting properties so as to face the first surface of the first metal foil, and arranging the first surface side of the second metal foil so as to face a surface different from a surface to which the first metal foil faces of the insulating board; forming a double-sided wiring board by stacking, pressurizing and heating the arranged first metal foil, insulating board, and second metal foil, and thereby integrating these; and patterning the first metal foil and/or the second metal foil.

Abstract: In one example embodiment, an adapter module includes a body having a first form-factor and multiple receptacles extending into the body. Each of the receptacles is configured to receive an optoelectronic module having a second form-factor. The second form-factor is smaller than the first form-factor. The first form-factor may substantially conform to the CFP MSA, for example. The second form-factor may substantially conform to the SFP+ or QSFP MSA, for example.

Abstract: A circuit board structure having a capacitor array and an embedded electronic component and a method for fabricating the same are proposed. Two carrier boards and a high dielectric constant material layer are provided, wherein the carrier boards have electronic components embedded therein and one surface of each carrier board has a plurality of electrode plates. The two carrier boards are laminated with the dielectric constant material layer interposed between them. The electrode plates on the surfaces of the carrier boards are opposite to each other across the high dielectric constant material layer to constitute a capacitor array. Therefore, the capacitor assembly for design of electronic devices is provided.

Abstract: In order to prevent stress caused by bending a flexible wiring board from being applied to the connection section between the flexible wiring board and a driving IC, solder is deposited as a reinforcement member, on both sides of the driving IC connected onto the flexible wiring board.

Abstract: A circuit board configuration and method of packaging electronic component embedded into the circuit board in a manner that supports the electronic component thermally, electrically, and mechanically thereof, comprising a circuit board having a first surface and a circuit trace on the first surface; a recess or slot formed on the first surface defined by at least one sidewall that is oblique to the first surface of the circuit board; two or more plated surfaces on the at least one oblique sidewall and electrically connected to the circuit trace; and an electronic component having two or more electrical contact surfaces mounted to the two or more plated surfaces such that the electronic component is physically mounted to the oblique sidewall and in electrical communication with the circuit trace.

Abstract: In a multilayer ceramic substrate having a cavity, base-material layers are arranged on a base side with respect to an interface between the base and a wall defining a cavity, and a constraining interlayer is arranged on the wall side. A conductive film is arranged between the base-material layers and the constraining interlayer, the base-material layers and the constraining interlayer sandwiching the interface. The effect of the first conductive film results in an increase in the adhesion of the constraining interlayer to the substrate layers, thus enhancing a shrinkage-inhibiting effect of the constraining interlayer.

Abstract: In a lead frame board, while a heat radiation wall member formed by a resin having a relatively high thermal conductivity is provided in a low heat-resistance heat generating component mounting region where a low heat-resistance heat generating component is mounted, heat block wall members formed by resins having relatively low thermal conductivities are provided in a high heat-resistance heat generating component mounting region where a high heat-resistance heat generating component is mounted and in a non-heat generating component mounting region where a non-heat generating component is mounted. Thus, heat block is performed between the low heat-resistance heat generating component mounting region and the high heat-resistance heat generating component mounting region and non-heat generating component mounting region, and a heat radiation function is enhanced in the low heat-resistance heat generating component.

Abstract: A driving device including a board on which a timing controller for signal processing and a memory are mounted, the board having a conductive field, in which the conductive field has a non-contact region which is coated with an insulating material, and an exposed contact region which is not covered with the insulating material, the exposed contact region formed adjacent to the timing controlling or the memory, a conductive member disposed in the exposed contact region, and a shield covering the board and electrically connected to the conductive field via the conductive member.

Abstract: A circuit package includes a circuit substrate having a cutout portion defined therein, an interconnect electrically coupled to the circuit substrate and an active circuit component disposed off the circuit substrate within the cutout portion and electrically coupled to the interconnect. An optical circuit includes a lead frame and an optical component electrically coupled to the lead frame. The lead frame includes a first lead portion at a first level having an upper surface and a lower surface, and a second lead portion at a second level lower than the first level and electrically connected to the first lead portion. The lower surface of the first lead portion is arranged to electrically connect to a surface of a circuit substrate. The second lead portion includes an upper surface and a lower surface. The optical component is disposed on the upper surface of the second lead portion.

Abstract: In a module with embedded electronic components, connection electrodes are formed on the component mounting surface of a substrate. The electrode portions of each of the electronic components are placed on the individual connection electrodes and connected in fixed relation thereto by using a solder. The electronic components are encapsulated in an encapsulating resin.

Abstract: A printed circuit board includes a core substrate having an opening portion, an electronic component provided in the opening portion of the core substrate and including a dielectric body, a first electrode formed over the dielectric body, and a second electrode formed over the dielectric body such that the dielectric body is interposed between the first electrode and the second electrode, and a resin filling a gap between the core substrate and the electronic component in the opening portion of the core substrate. The resin filling the gap includes a filler.

Abstract: A multilayer printed wiring board includes a mounting portion supporting a semiconductor device and a layered capacitor portion including first and second layered electrodes and a ceramic high-dielectric layer therebetween. The first layered electrode is connected to a ground line and the second layered electrode is connected to a power supply line. The ratio of number of via holes, each constituting a conducting path part electrically connecting a ground pad to the ground line of a wiring pattern and passing through the second layered electrode in non-contact, to number of ground pads is 0.05 to 0.7. The ratio of number of second rod-shaped conductors, each constituting a conducting path part electrically connecting a power supply pad to the power supply line of the wiring pattern and passing through the first layered electrode in non-contact, to number of power supply pad is 0.05 to 0.7.

Abstract: An IC device has a compact design. Capacitors, resistances and inductances are directly integrated in the IC device without packaging in advance. Thus, the IC device obtained has a slim size and an electric apparatus using the IC device has a big space for use.

Abstract: The invention relates to a method for fabricating electronic cards, that comprises the following steps: A) forming a plurality of card bodies in the form of a thick sheet (36) in which is respectively imbedded a plurality of electronic units or modules (28); B) printing a plurality of first patterns (14) on a first face (21) of said thick sheet in a printing station in which ink is applied on the first face for making said first patterns; C) applying a first at least partially transparent coating (38) on each printed first pattern, that adheres to said card body. In an advanced embodiment, the method also comprises printing a plurality of second patterns (40) on the inner surface of a film (38) forming said first coating. Preferably, the printing of the first patterns is carried out in an offset type station for printing high definition patterns, essentially of the security type. The second patterns define personal data.

Abstract: A capacitor strap that is applied to a security tag coil or antenna to form and properly tune an EAS or an RFID security tag. The capacitor strap is a thin film capacitor formed of two metal foils in between which is a dielectric material having ends that are electrically coupled to different points of a security tag coil or antenna. The capacitor strap may include an RFID integrated circuit, either in series or in parallel with the capacitor, which is then applied to security tag coil at a particular location to tune the tag to a predetermined frequency.