Abstract: A multilayer wiring board assembly, a multilayer wiring board assembly component and a method of manufacture thereof are described in which it is possible to easily laminate together flexible FPCs having highly packing densities by via-on-via and chip-on-via. The multilayer wiring board assembly is laminated by laminating together a plurality of multilayer wiring board assembly components, each of which is made by preparing a copper plated resin film 10 made of a copper plated resin film made of a resin film having adhesivity which is provided with a copper foil bonded to one surface thereof and in which a through hole is opened through said copper foil and said resin film, and a conductive paste filler embedded by screen printing in the through hole of said copper plated resin film from said copper foil with a leading end of said conductive paste filler being projected from said resin film.

Abstract: Metal foil is laminated via an insulating layer so as to cover the first layer circuit wiring formed on a conductive substrate, and a resist layer is formed so as to cover the second layer circuit wiring formed by pattern-etching the metal foil. Using the conductive substrate as a power feeding layer, a conductive material is filled, by electrolytic plating, in interlayer via holes each formed by applying a laser beam to the resist layer, thereby to establish interlayer connection between the first layer circuit wiring and the second layer circuit wiring. Subsequently, the resist layer is removed, and then, using the conductive substrate as a power feeding layer, a conductive material is filled, by electrolytic plating, in hole portions of an insulating layer formed so as to cover the second layer circuit wiring, thereby to form external connection terminals.

Abstract: A coaxial via structure is adapted to transmit high speed signals or high intensity current through conductive layers of an electronic device carrier. The coaxial via structure comprises a central conductive track and an external conductive track separated by a dielectric material and is positioned in a core of the electronic device carrier or in the full thickness of the electronic device. The coaxial via structure can be combined with a stacked via structure so as allow efficient transmission of high speed signals across the electronic device carrier when a manufacturing process limits the creation of a full coaxial via structure across the entire electronic device carrier.

Abstract: Thermally managing high-power IC devices through the use of a circuit assembly comprising a ceramic substrate and an organic substrate. The ceramic substrate has at least one circuit component on a first surface thereof and a periphery defining a lateral surface surrounding the first surface. The organic substrate also comprises a first surface and a periphery defining a lateral surface surrounding the first surface. A portion of the lateral surface of the organic substrate is adjacent a portion of the lateral surface of the ceramic substrate so as to define an interface therebetween. At least one conductor common to both the ceramic and organic substrates and bridging the interface therebetween serves to physically connect the ceramic and organic substrates together.

Abstract: An electronic package and method of formation. A thermally conductive layer having first and second opposing surfaces is provided. A first dielectric layer is laminated under pressurization to the first opposing surface of the thermally conductive layer, at a temperature between a minimum temperature T1MIN and a maximum temperature T1MAX. T1MAX constrains the ductility of the first dielectric layer to be at least D1 following the laminating. T1MAX depends on D1 and on a first dielectric material comprised by the first dielectric layer. A second dielectric layer is laminated under pressurization to the second opposing surface of the thermally conductive layer, at a temperature between a minimum temperature T2MIN and a maximum temperature T2MAX. T2MAX constrains the ductility of the second dielectric layer to be at least D2 following the laminating. T2MAX depends on D2 and on a second dielectric material comprised by the second dielectric layer.

Abstract: The present invention relates to an apparatus for replacing a defective PCB unit formed on a PCB panel with a nondefective PCB unit, in which the location of the nondefective PCB unit disposed on a location correcting table is corrected by a location correcting driver via the location correcting data read by a vision camera, realizing a precise alignment in replacing the defective PCB unit without using a precise mechanical jig.

Abstract: A printed wiring board including a first printed wiring board and at least one second printed wiring board composed of a different material from a material of which the first printed wiring board is composed. The second printed wiring board is fixed to at least a part of the first printed wiring board.

Abstract: The memory module includes a substantially rigid first circuit board having at least one memory chip disposed thereon. The memory module also includes a substantially rigid second circuit board having an array of electrical contact points disposed on a planar surface thereof. A flexible connector electrically couples the first circuit board to the second circuit board, such that the memory chip is electrically connected to the array of electrical contact points. Alternatively, The memory module that a rigid/flex circuit board. The rigid/flex circuit board includes a substantially rigid first section having at least one memory chip disposed thereon, and a substantially rigid second section having an array of electrical contact points disposed on a planar surface thereof. The rigid/flex circuit board also includes a flexible third section in-between the first section to the second section.

Abstract: Driving system with converter control for low voltage three-phase motors, which is provided with a power unit containing transistors and capacitors, a triggering unit for the transistors and a control unit as well as connections for direct and alternating current, the units being disposed in a common casing made of a heat-conductive material, characterised by the following features: the power unit is provided with a first printed circuit board (24) made of fairly heat-conductive material, which is disposed on the fairly heat-conductive bottom of the casing (12) in a plane fitting arrangement, a second printed circuit board (26) contains the triggering unit, the second printed circuit board (26) being electrically and mechanically connected to the first printed circuit board (24) in a spacing to it with the aid of contact pins (30) of metallic material attached on the first printed circuit board (24) by soldering, and terminal pins (22) are connected with contact points (38) of the first printed circuit board

Abstract: A controller includes a circuit board on which an electronic component is mounted to control operations of a recording apparatus. An electromagnetic wave shielding member having electric conductivity and thermal conductivity covers the electronic component. The electromagnetic wave shielding member is formed with a contact portion which is brought into contact with the electronic component.

Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26 which have improved solder-wetting characteristics.

Abstract: A method for preparing a non-thermal plasma reactor substrate includes disposing electrical vias on green stage first and second ceramic plates; filling the electrical vias with conductive material; and forming electrical contact via cover pads; disposing conductive material on the first ceramic plate to form an electrode plate having a main electrode portion and a terminal lead for electrically connecting the main electrode portion to the electrical vias; laminating the electrode plate and the second ceramic plate together, embedding the electrode therebetween; co-firing the plates to form a laminated co-fired embedded-conductor element; stacking a plurality of the laminated co-fired embedded-conductor elements to form a multi-cell stack, the filled electrical vias aligning in the stack to provide an electrical bus for connecting alternating elements in the stack; and disposing spacers with matching vias and via cover pads between adjacent pairs of elements to form exhaust gas passages.

Abstract: An electronic control device for controlling electric units of motor vehicle doors which have different equipment. The control device is formed by at least one printed circuit board, including electronic components which are arranged in a housing and can be contacted to a cable assembly using plug-in connectors. The device includes at least one zone of the printed circuit board with an identical assembly of components that can be used for at least two variants of the motor-vehicle-door equipment, the printed circuit board having a reduced component assembly for at least one of the equipment variants. The printed circuit board of one equipment variant is spatially integrated into a housing of a unit which is to be controlled, while the printed circuit board of another equipment variant is located in a separate housing.

Abstract: A method for manufacture of a circuit board and the board formed by the novel method. The method comprises selective plating of metallic reinforcing members, solder mount pads, signal and interconnections sequentially. The resultant board is desirably free of glass fiber reinforcement.

Abstract: Trace configurations for carrying high-speed digital differential signals provide for reduced conduction loss and improved signal integrity. In one embodiment, a circuit board has a first set of conductive traces disposed on non-conductive material, and a second set of conductive traces parallel to the first set and disposed within the conductive material. The second set is separated from the first set by non-conductive material. Corresponding traces of the first and second sets may be in a stacked configuration. In other embodiments, conductive material may be provided between corresponding traces of the first and second sets resulting in an “I-shaped” or “U-shaped” cross-section. In yet other embodiments, the trace configurations have “T-shaped” and “L-shaped” cross-sections.

Abstract: A multilayer wiring board assembly, a multilayer wiring board assembly component, and a method of manufacture thereof. The multilayer wiring board assembly is formed by laminating together a plurality of multilayer wiring board assembly components having a flexible resin film with a copper foil bonded to one surface and an adhesive layer bonded to the other surface, opening a through hole in the copper plated resin film through the copper foil, resin film, and the adhesive layer, filling the through hole with a conductive paste projecting from the adhesive layer and laterally extending beyond through hole opening of the copper foil.

Abstract: The invention relates to a printed circuit board comprising capacitive and inductive elements. To arrange such a printed circuit board so that it has a smaller thickness and can be manufactured cost effectively, a printed circuit board is proposed having at least one dielectric layer, on the two side faces of which capacitor electrodes arranged opposite each other are positioned in a first area and two planar windings opposite each other are arranged in at least a second area next to the first area on the side faces of the electric layer.

Abstract: A printed circuit board structure for a scope unit of an electronic endoscope system, which is provided with a first printed circuit board formed with a first circuit section, and a second printed circuit board formed with a second circuit section. The first printed circuit board is piled on the second printed circuit board. The second printed circuit board having an area covered with the first printed circuit board and at least one area which is not covered with the first circuit board. The at least one area is used for electrically connecting the second circuit section with an electrical unit other than the second circuit section.

Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).

Abstract: An electrical connector for conveying signals between two circuit boards includes a first connector portion including a first array of board contacts for connection to a first corresponding footprint on a first circuit board. The connector also includes a second connector portion including a second array of board contacts for connection to a second corresponding footprint on a second circuit board. The signals include a plurality of signal groups each including a different plurality of related signals. Each of the signal groups is assigned to a grouping of related board contacts of the first array and to a corresponding grouping of related board contacts of the second array. When the first connector portion and the second connector portion are mated, each grouping of board contacts of the first array is electrically coupled to the corresponding grouping of board contacts in a transposed location in the second array.

Abstract: A multi-layer printed wiring board having via holes is characterized by having the outer copper wifing circuit lines on a layer of an alkaline refractory metal which is adjacent to a thermosetting resin layer. An alkaline refractory metal which is insoluble is alkaline etching solutions, is electrodeposited on the surface of copper foil, then a thermosetting resin is applied to the surface and semi-cured to obtain a coated copper foil. The coated copper foil is bonded to one or both faces of an inner layer board having wirings on one or both of its faces. Then, the copper foil on a surface of this laminate is removed by alkaline etching, while selectively leaving the alkaline refractor metal layer. A laser beam is used to form via holes in both the alkaline refractory metal layer and the thermosetting resin layer simultaneously.

Abstract: A method and structure for forming an electronic structure that comprises a redistribution structure on a circuitized substrate. The redistribution structure includes N dielectric layers (N ?2) and N metal planes formed in the following sequence: dielectric layer 1 on a metallic plane that exists on a surface of the substrate, metal plane 1 on dielectric layer 1, dielectric layer 2 on dielectric layer 1 and metal plane 1, metal plane 2 on the dielectric layer 2, . . . , dielectric layer N on dielectric layer N-1 and metal plane N-1, and metal plane N on the dielectric layer N. Metal planes or metallic planes may include signal planes, power planes, ground planes, etc. A microvia structure, which is formed through the N dielectric layers and electrically couples metal plane N to the metallic plane, includes a microvia or a portion of a microvia through each dielectric layer.

Abstract: An information handling system (e.g., computer, server, etc.) Utilizing at least one circuitized substrate assembly of robust construction and possessing enhanced operational capabilities. The substrate assemblies include a substrate having at least one opening which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

Abstract: A fabricating method of a wiring board provided with passive elements is disclosed. The fabricating method includes coating one or both of resistive paste and dielectric paste on at least any one of first surfaces of a first metal foil and a second metal foil each of which has a first surface and a second surface; arranging an insulating board having thermo-plasticity and thermo-setting properties so as to face the first surface of the first metal foil, and arranging the first surface side of the second metal foil so as to face a surface different from a surface to which the first metal foil faces of the insulating board; forming a double-sided wiring board by stacking, pressurizing and heating the arranged first metal foil, insulating board, and second metal foil, and thereby integrating these; and patterning the first metal foil and/or the second metal foil.

Abstract: The present embodiments and associated methods provide for an integrated EMI shield for effective shielding not only from emissions perpendicular to the integrated circuit (IC) chip carrier but also parallel (edgewise) to the carrier. In one embodiment, a method includes forming at least a portion of an internal ground layer along at least a portion of a chip carrier edge, applying an electrically conductive layer to at least a portion of the chip carrier edge, the conductive layer being applied over the exposed portion of the ground layer and in electrical contact with said ground layer, and forming at least one cavity within the top surface of the chip carrier, where the at least one cavity configured to hold one or more integrated circuit chips therein.

Abstract: A multilayer circuit board, in which a plurality of insulating layers and a plurality of conductive layers, each of which includes a conductive pattern, have been laminated, includes an insulating layer, a conductive compound, and a conductive pattern. The insulating layer has a trench. The conductive compound is located in the trench. The conductive pattern adjoins the trench and is electrically connected to the conductive compound. The conductive pattern and the conductive compound make up a conductive wire that has a higher current-carrying capacity than the conductive pattern.

Abstract: A method for making electrical interposers which includes the use of a stencil which is thicker than designated lower contact pads and which defines a stencil passage corresponding to each lower contact pad of each interposer. The stencil is attached to a bottom surface of an insulative layer and a conductive elastomeric material is applied to the stencil, so that the stencil passages are filled with said conductive elastomeric material. When this material has been adequately placed within the stencil passages the stencil is removed thus leaving each lower conductive pad with an attached conductive elastomeric pad.

Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26, and which includes grooves or troughs 20, 22 which are effective to selectively entrap liquefied adhesive material, thereby substantially preventing the adhesive material from entering the apertures 26.

Abstract: A printed circuit board is by formed by laminating an interlaminar insulating layer on a conductor circuit of a substrate, in which the conductor circuit is comprised of an electroless plated film and an electrolytic plated film and a roughened layer is formed on at least a part of the surface of the conductor circuit.

Abstract: A multilayer wiring board assembly, a multilayer wiring board assembly component, and a method of manufacture thereof. The multilayer wiring board assembly is formed by laminating together a plurality of multilayer wiring board assembly components, having a flexible resin film with a copper foil bonded to one surface and an adhesive layer bonded to the other surface, opening a through hole in the copper plated resin film through the copper foil, resin film, and the adhesive layer, and filling the through hole with a conductive paste projecting from the adhesive layer and laterally extending beyond through hole opening of the copper foil.

Abstract: An integrated circuit substrate having embedded wire conductors provides high-density interconnect structure for integrated circuits. Wires are shaped to form a conductive pattern and placed atop a dielectric substrate layer. Additional dielectric is electro-deposited over the wires to form an insulating layer that encapsulates the wires. One or more power planes may be embedded within the substrate and wires within the conductive pattern may be laser-welded to vertical wire stubs previously attached to a power plane. Vias may be formed by mechanically or laser drilling (or plasma or chemical etching) through any power planes and screening a copper paste into the drilled holes to form conductive paths through the holes. Via conductors may then be exposed by a plasma operation that removes dielectric, leaving the ends of the via conductors exposed. Wires within the conductive pattern may then be laser-welded to the via conductor ends.

Abstract: An interconnection substrate comprises an uppermost interconnection layer having a plurality of terminal pads located at positions corresponding to a plurality of solder bumps (external connection terminals) provided on a semiconductor element which is to be mounted on the interconnection substrate. The interconnection substrate also has a metal column formed on each of the terminal pads and has a resin film covering a side surface of the metal column. The interconnection substrate further has an insulating layer formed on the uppermost interconnection layer so that a gap is formed between the insulating layer and an outer peripheral surface of the resin film.

Abstract: A metal layer 18 is sandwiched between insulating layers 14 and 20 so that required strength is maintained. Hence it follows that the thickness of a core substrate 30 can be reduced and, therefore, the thickness of a multi-layer printed circuit board can be reduced. Formation of non-penetrating openings 22 which reach the metal layer 18 in the insulating layers 14 and 20 is simply required. Therefore, small non-penetrating openings 22 can easily be formed by applying laser beams. Thus, through holes 36 each having a small diameter can be formed.

Abstract: A substrate and a method of making the substrate is provided. The substrate includes a layer of metal with at least one through hole therein, the layer of metal having an adhesion promoting layer thereon. A layer of a partially cured low-loss polymer or polymer precursor is positioned on the adhesion promoting layer and a plurality of conductive circuit lines are positioned on a portion of the partially cured dielectric layer. The substrate can be used as a building block in the fabrication of a multilayered printed circuit board.

Abstract: Improved termination features for multilayer electronic components are disclosed. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed internal electrode tabs and additional anchor tab portions which may optionally extend to the cover layers of a multilayer component. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. External anchor tabs positioned on top and bottom sides of a monolithic structure can facilitate the formation of wrap-around plated terminations.

Abstract: A multi-layer wiring board is produced by laminating a plurality of insulating layers having conductor circuits, wherein the conductor circuits of the insulating layers are electrically connected together through via-holes in insulating connection layers having no conductor circuit, and the regions other than the conductor circuits of the insulating layers and the regions other than the via-holes of the connection layers are directly joined together by press-adhering the insulating resins that constitute the respective layers.

Abstract: A circuitized substrate assembly and method for making same wherein the assembly includes individual circuitized substrates bonded together. The substrates each include at least one opening, only one of which is substantially filled with a conductive paste prior to bonding. Once bonded, the paste is also partially located within the other opening to provide an effective electrical connection therewith.

Abstract: A printed circuit board of the present invention is formed of an electrical insulating base material with through holes that are formed in a thickness direction of the electrical insulating base material and are filled with an electrical conductor; the electrical insulating base material including a core layer formed by impregnating a holder with a resin and resin layers formed on both sides of the core layer; and wiring layers that are formed on both surfaces of the electrical insulating base material into a predetermined pattern and are electrically connected to each other by the electrical conductor. The wiring layer is embedded in at least one of the resin layers. The resin layers on the both sides have different thicknesses from each other, and a thinner layer out of the resin layers has a thickness equal to or smaller than a mean particle diameter of an electrically conductive filler contained in the electrical conductor.

Abstract: A high frequency module device of a thin type, high precision and high functions in which the size and the cost of the package may be diminished. The module device includes a base substrate (2) and a high frequency device layer (4). The base substrate (2) is formed by forming a patterned wiring layer (9) on a first major surface (5a) of a core substrate (5) molded of an organic material exhibiting thermal resistance and high frequency characteristics. The uppermost layer of the base substrate (2) is planarized to form a high frequency device layer forming surface (3). The high frequency device layer portion (4) is formed on the high frequency device layer forming surface (3) by a thin film or thick film forming technique and includes intra-layer passive elements, made up of a resistor (27) and a capacitor (26). The passive elements are supplied with power or signals from the side base substrate.

Abstract: A method includes the steps of forming a first metal foil (82) on a surface of an insulator substrate (1a), drilling, with a thermosetting resin film (84) temporarily fixed to an opposite surface of the substrate, a through hole (86) simultaneously in the first foil, the substrate, and the resin film, simultaneously heating and vacuum-pressing the first foil, the substrate, the resin film, and a second metal foil (87) brought into contact with the resin film to obtain an intermediate board in which a bottom of the through hole is covered with the second foil and has a corner with a corner rounded portion (93) formed by the resin film, and forming a metal plating layer (95) on the first and the second foils, on the bottom and an inner wall of the through hole, and on the corner rounded portion to obtain a final printed wiring board.

Abstract: A rectangular heating section is so shaped as to touch the electronic component except corners of the rectangle when the surface of the electronic component does not parallel the heating section. For example, the heating section is formed to be smaller than the electronic component surface, to be a rectangle which is smaller than the electronic component surface and comprises rounded corners, to be an octagon which is smaller than the electronic component surface and is formed by cutting off corners of the rectangle, or to be an octagon which is larger than the electronic component surface and is formed by cutting off corners of the rectangle. A die is prevented from being damaged due to a contact with the heating section of a cooling module at a given point of the die according to a mounting error or a usage state.

Abstract: In holes formed in a multi-layer wiring board for transmitting differential signals, a first hole is formed, an insulating portion is formed by filling the first hole with an insulating resin, a pair of second holes is formed for transmitting the differential signals to the formed insulating portion, and the pair of second holes is arranged symmetrically each other with respect to a center axis of the first hole for forming a coaxial structure.

Abstract: A computer-aided design (CAD) tool is used to create a preliminary design of a mulit-layered printed circuit board, comprising a layout of electrical components on a main region of a printed circuit board and a routing of signal traces among the lectical components within the main region. An extended region is then added to the design on the CAD tool that comprises a layout of selected debug connectors on the extended region and at least one additional signal layer. Traces connecting the debug connectors to selected vias of the main region of the printed circuit board are then routed on the added signal layer only. A prototype board is then created and tested. Once testing is complete, the extended region and the at least one additional layer are removed from the design in the CAD tool without disturbing the layout of components and routing of signal traces on the main region of the printed circuit board.

Abstract: A substrate of the present invention includes pads which are provided on the surface of said substrate; and surface layers which are kept to the ground potential and cover the surface of said substrate except said pads and their peripheral. Another substrate of the present invention includes a part of circuit which is provided on the surface of said substrate; and a surface layers which are kept to the ground potential and cover the surface of said substrate except said part of circuit and its peripheral.

Abstract: A fixture assembly for holding printed circuit boards (PCBAs) during processing such as wave soldering. The fixture assembly consists of multiple plates which are assembled to define protective cavities and recesses for masking components such as surface mount devices and define apertures so that pass-through leads are exposed at the bottom or secondary side of the bottom plate. An optional weighting member may be used to firmly secure the PCBA during processing. The multi-plate structure is cost effective reducing milling and machining operations normally attendant to the fabrication of a fixture assembly.

Abstract: A multilayered PCB including two multilayered portions, one of these able to electrically connect electronic components mounted on the PCB to assure high frequency connections therebetween. The PCB further includes a conventional PCB portion to reduce costs while assuring a structure having a satisfactory overall thickness for use in the PCB field. Coupling is also possible to the internal portion from these components. Methods of making these structures have also been provided.

Abstract: A multilayer circuit board that has electrodes only on one surface is manufactured as follows. A plurality of conductor layers are formed on a resin film made of thermoplastic resin to form a single-sided conductor layer film. Then, a plurality of via-holes 24, which are bottomed by the conductor layers, are formed in the resin film. Then interlayer connecting material is packed in the via-holes 24 to form a single-sided conductor layer film having the interlayer connecting material. A plurality of single-sided conductor layer films are formed and stacked such that surfaces having the conductor layers face in the same direction. Then, the single-sided conductor layer films are pressed and heated to complete the multilayer circuit board. The multilayer circuit board is formed by using only the single-sided conductor layer films and pressing once, so the manufacturing process is simplified.

Abstract: A packaged die (112) for an integrated circuit (62) that eliminates the wire bonds required in the prior art, and provides integrated circuit packaging while the circuit (62) is still in a wafer format. A wafer substrate (64) on which the integrated circuits (62) have been fabricated is patterned and etched to form signal and ground vias (74, 72) through the substrate (64). A back-side ground plane (82) is deposited in contact with the ground vias (72). A protective layer (90) is formed on the top surface (76) of the substrate (64), and a protective layer (98) is formed on the bottom surface (84) of the substrate (64), where the bottom protective layer (98) fills in removed substrate material between the integrated circuits (62). Vias (106) are formed through the bottom protective layer (98), and the wafer substrate (64) is diced between the integrated circuits (62).

Abstract: A multilayer ceramic substrate includes a glass ceramic body, a conductive pattern, and a via conductor. The conductive pattern is formed in the glass ceramic body and on at least one principal surface of the glass ceramic body. The via conductor makes a connection between the predetermined conductive patterns. The via conductor includes a conductive material and a Mo compound or a Mo metal. The conductive material includes at least one selected from the group consisting of Ag, Au, Pt and Pd as a main component. The amount of Mo compound or Mo metal is in the range of 0.05 to 10 parts by weight in terms of Mo metal with respect to 100 parts by weight of the conductive material. This multilayer ceramic substrate can achieve sufficient flatness and high dimensional accuracy, while preventing defects that occurs in the vicinity of electrodes after firing.

Abstract: A printed circuit board having contacts in a contact array of rows and columns. Groups of n columns of the contacts are electrically connected to n−1 columns of vias disposed interstitially in a via array between the n columns of the contacts. A major vertical routing channel is formed between adjacent groups of n columns of the contacts and the n−1 columns of vias. First electrical traces are electrically connected to a first number of the vias. The first electrical traces are routed to an outside edge of the via array through the major vertical routing channel.