Abstract: A receiving apparatus according to the present invention comprises: a first board including a mount surface whose outer edge is substantially quadrilateral; and a board installation member including a plate portion that has an installation surface whose outer edge is substantially quadrilateral, the first board is installed on the installation surface (called a front surface) side and the surface (called a rear surface) of the rear side of the installation surface is installed on a given second board, the apparatus applies a predetermined processing to a received broadcast signal using a circuit disposed on the first board, and the board installation member includes a connecting terminal to electrically connect the first board with the second board and a leg portion used for the installation on the second board, the connecting terminal protrudes from the plate portion in the direction substantially perpendicular to the plate portion on the front surface side and on the rear surface side, and comes into contac

Abstract: The through holes in an array manner in the signal layer within the chip-interposed region on a substrate of a BGA package comprise a ball pads array having a plurality of ball pads and a vias array. The vias array has a plurality of vias located interlaces with the ball pads array. The outermost portions of the chip-interposed region are designed in such a manner to have at least two rings of vias for signal transmission and power connection. The interval between every two adjacent vias in the ring is not less than twice of the distance of two ball pads. Upon such an arrangement, the BGA package can have a plurality of dissipation channels that can increase dissipation space, dissipate quickly the heat generated from the IC, and transmit well for signal and power.

Abstract: An electrical circuit structure for a light may comprise: at least first and second circuit portions disposed in different planes; the first circuit portion having a shape corresponding to the shape of a mounting surface adjacent to which it is adapted to be mounted, the first circuit portion having an opening therein for receiving a light source; a light source mounted in the opening of the first circuit portion for receiving electrical energy; and a switch mounted to the second circuit portion for selectively applying electrical energy for selectively energizing the light source.

Abstract: A device for damping cavity resonance effects in a multilayer carrier device, having a first conductive device for making available a reference potential layer of the carrier device; a second conductive device that is electrically insulated from the first conductive device for making available a voltage supply layer of the carrier device; and at least one discrete, lossy circuit component, which is connected between the first and the second conductive device and is dimensioned as a function of at least one cavity resonance of the carrier device. Also provides a method for damping cavity resonance effects in a multilayer carrier device.

Abstract: An inductor and multiple inductors embedded in a substrate (e.g., IC package substrate, board substrate, and/or other substrate) is provided herein.

Abstract: A Subsea Electronics Module for a well installation, comprising: a housing; at least two printed circuit boards having control circuitry provided thereon; and a communications component for enabling communication between the control printed circuit boards; wherein the module further comprises a communications handling board operatively connected to the printed circuit boards, the communications component being mounted on the communications handling board.

Abstract: This invention discloses a method for electroplating nickel/gold on electrically connecting pads on a substrate for chip package and structure thereof. The method comprises: forming a conductive film on a substrate circuit-patterned and defined with a circuit layer; forming on the substrate a resist with an opening for exposing a portion of the conductive film in an electrically connecting pad area intended for the circuit layer; removing a portion of the conductive film not covered with the resist; forming another resist on the substrate to cover a portion of the conductive film residually exposing from the resist; electroplating nickel/gold on at least one electrically connecting pad on the substrate such that the electrically connecting pad is electroplated with a nickel/gold layer; removing the resists and the conductive film thereunder; and forming a solder mask on the substrate, wherein the electrically connecting pad electroplated with the nickel/gold layer is exposed from the solder mask.

Abstract: According to one embodiment, a multilayer printed circuit board having a plurality of wiring layers and an electronic component mounted thereon, includes a spiral wire including a path in a substantial spiral shape configured with a printed wire section of a substantial loop shape provided on each of at least two wiring layers of the plurality of wiring layers, and a plug provided on each wiring layer arranged between a top wiring layer which is a wiring layer on a top on which the printed wire section of a substantial loop shape is provided and a bottom wiring layer which is a wiring layer on a bottom on which the printed wire section of a substantial loop shape is provided.

Abstract: A printed wiring board includes a first substrate having a recess portion and multiple conductors, a second substrate having multiple conductors and inserted in the recess portion of the first substrate such that the first substrate has a surface exposing at least a portion of a surface of the second substrate. The multiple conductors in the first substrate is electrically connected to the multiple conductors in the second substrate, and the second substrate has density of the conductors which is higher than density of the conductors of the first substrate.

Abstract: Apparatus and method for communicating high-speed signals between a primary printed circuit board and one or more secondary printed circuit boards. The high-speed signals are communicated between the primary printed circuit boards and the secondary printed circuit boards through multi-layer flexible conductors.

Abstract: The present invention incorporates electronic components into an electronic core structure that may be readily hot laminated by existing processes. The structure may include multiple desired electronic components, such as a display, battery or other power source, integrated circuits, switches, magnetic stripe emulator, antenna, smart chips or other input devices. The structure includes laminated buffer layers to bridge layers and compensate for variation in electronic component dimensions. The structure may also incorporate battery packaging as part of the core layer structure and use printed electronic circuitry as part of the electronic core layers to impart the desired characteristics. A variety of components may be incorporated in the structure.

Abstract: A microelectronic assembly includes units superposed on one another to form at least one stack having a vertical direction. Each unit includes one or more microelectronic devices and has top and bottom surfaces. Top unit terminals are exposed at the top surfaces and bottom unit terminals are exposed at the bottom surfaces. The top and bottom unit terminals are provided at a set of ordered column positions. Each top unit terminal of the set, except the top unit terminals at the highest ordered column position, is connected to a respective bottom unit terminal of the same unit at a next higher ordered column position. Each bottom unit terminal of the set, except the bottom unit terminals of the lowest unit in the stack, is connected to a respective upper unit terminal of the next lower unit in the stack at the same column position.

Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.

Abstract: A device includes a plane metallization layer, and a plane plated through hole attached to the plane metallization layer and terminating at the at a major exterior surface with a plurality of component mounting pads. The plated through hole is attached to the plane metallization layer. The plane plated through hole is electrically isolated from the plurality of component mounting pads at the exterior surface. A method for testing the device includes contacting the signal carrying through hole, and contacting the plane through hole, and checking for current flow between the signal carrying through hole and the plane through hole. If current flows between the signal carrying through hole and the plane through hole the device fails. If no current flows between the signal carrying through hole and the plane through hole the device passes.

Abstract: A system, method and apparatus for providing a printed circuit board having optimized power delivery planes and signal routing regions are disclosed. In one aspect, the present disclosure teaches a printed circuit board having two or more cores coupled together using a prepreg sheet having selected regions of increased permittivity. In combining the cores with the prepreg sheet, the regions of increased permittivity are preferably aligned with power delivery planes defined between respective cores. By increasing the permittivity within the power delivery planes, the greater the reduction in area of the cores needed for power delivery and the greater the area retained on the cores for providing signal routing. As a result, a printed circuit board incorporating teachings of the present disclosure may support more advanced and complex information handling system implementations.

Abstract: An upper board having an opening and forming a circuit on a surface layer, a connection sheet between boards having an opening and forming conductive holes filled with conductive paste in through-holes, and a lower board forming a circuit on a surface layer are stacked up, heated and pressed. In particular, the connection sheet between boards is made of a material different from the upper board and the lower board. A multi-layer circuit board having a cavity structure, and a full-layer IVH structure with high interlayer connection reliability can be manufactured.

Abstract: A technique is provided for improvement in convenience and in cost reduction of a fixing part of a printed board unit. A printed board unit includes a plurality printed board including a first printed board and a second printed board; and at least one fixing part, interposed between the first printed board and the second printed board, fixing the first printed board and the second printed board such that the first printed board and the second printed board overlap and keep a predetermined space between the first printed board and the second printed board, and the fixing part variably determines the predetermined space.

Abstract: A multifunctional apparatus includes a first circuit board which is installed on a low surface of a main body, receives a current from an external power source and supplies the current to other circuit boards and devices; a second circuit board which is installed on a surface of the main body and includes a controller to control the other circuit boards and devices; and a third circuit board which is installed on an upper surface of the main body and supplies the current or transfers control signals to a scanning unit.

Abstract: A multilayer substrate, comprising a first substrate, a connector and a second substrate, is disclosed. The first substrate has a circuit pattern. The connector, coupling onto the first substrate, has a ring structure, in which a plurality of holes are separated a predetermined distance from one another. The second substrate, coupling onto the second substrate by inserting the connector, has a circuit pattern, which is electrically connected to a circuit pattern formed on the first substrate using the plurality of holes formed on the connector. A multilayer substrate and a method for producing it in accordance with the present invention can shield the EMI generated by a high-speed switching element.

Abstract: A stackable semiconductor package includes a top package, a bottom package, an adhesive layer, a plurality of wires and a molding compound. A part of a surface of a chip of the bottom package is exposed. The top package is inverted, and is adhered to the chip of the bottom package with the adhesive layer. The wires electrically connect a substrate of the bottom package and a substrate of the top package. The molding compound encapsulates the top package, the bottom package, the adhesive layer,and the wires, and exposes a part of a surface of the substrate of the top package. Thus, the stackable semiconductor package includes at least two chips, thereby increasing the chip density and improving the applicability.

Abstract: An embedded capacitor structure comprising a main body; at least one embedded capacitor, having a first electrode, a dielectric layer, and a second electrode, formed in the main body; and at least one via electrical connection formed in the main body; wherein at least one of the first and second electrodes is free from direct electrical connection to the via electrical connections.

Abstract: A printed circuit board (PCB) includes first and second signal layers sandwiching a dielectric layer therebetween, and a differential pair having two differential traces respectively disposed within the first and second signal layers. Two ground parts are respectively arranged at opposite sides of each of the two differential traces.

Abstract: A device and a method of reducing electromagnetic interference resulting from a harmonic wave produced by a signal transmitted through a harness. The method includes winding a conductive wire at least once around the harness, and grounding at least one end of the conductive wire. Accordingly, the electromagnetic interference reducing method is capable of reducing electromagnetic interference without any side effects by using a low cost and a simple ground line.

Abstract: A shielded stacked integrated circuit package system is provided including forming a first integrated circuit structure having a first substrate and a first integrated circuit die; mounting a shield over the first substrate and the first integrated circuit die; mounting a second integrated circuit structure having a second substrate and a second integrated circuit die over the shield; and forming a package encapsulation for covering the first integrated circuit die, the shield, and the second integrated circuit structure.

Abstract: A printed circuit board (PCB) edge connection structure formed by a first PCB having one or more electronic components and printed circuitry provided thereon and a second PCB, having one or more edge contact pads provided thereon, attached to the first PCB and covering an area on the first PCB into which a portion of the printed circuitry extends. The resulting structure maximizes the utilization of the surface area on the first PCB for printed circuitry, thus, reducing the overall size of the end product.

Abstract: A method of connecting signal lines between an integrated circuit (IC) die and a carrier or external circuit, and corresponding apparatus. Techniques for adjusting magnetic coupling between terminated signal lines include splitting a return path for termination current and disposing one nearby on either side of the terminated signal line, creating two small termination current loops conducting in opposite directions; using separate terminating impedances, which may be unequal, to control current in each of the loops; and arranging major axes of the termination current loops for a signal to be perpendicular to those of the isolation-target signal. Capacitive coupling adjustments include routing ground potential termination current return connections nearby the signal connection to shield it from the isolated signal line, using dual overlapping connections to shield each return path, and adjusting dielectric material proximity to the signal paths.

Abstract: A printed circuit board includes a first layer including a first power portion and a first ground portion isolated from each other, and a second layer including a second power portion and a second ground portion isolated from each other. The second layer is spaced from the first layer. The second ground portion is arranged below the first power portion. The second power portion is arranged below the first ground portion. One portion of the first power portion overlaps one portion of the second power portion, and one portion of the first ground portion overlaps one portion of the second ground portion to provide a zero-intensity electric field between the first layer and the second layer. The first power portion is coupled to the second power portion via a first via. The first ground portion is coupled to the second ground portion via a second via.

Abstract: Methods of manufacturing printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s). Aspects of embodiments of the present invention are directed to a method of manufacturing a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.

Abstract: The present invention provides a wiring board including a first board provided with a first wiring pattern and a second board provided with a second wiring pattern while the first wiring pattern and the second wiring pattern are electrically connected, wherein the first board includes: a board insertion opening in which the second board is inserted; and a first connection pattern provided inside the board insertion opening and electrically connected to the first wiring pattern, and the second board includes: an inserting portion to be inserted into the board insertion opening of the first board; and a second connection pattern provided at a position opposed to the first connection pattern and electrically connected to the second wiring pattern in the case where the inserting portion of the second board is inserted into the board insertion opening of the first board, and further comprising: solder or brazing filler metal applied at least to a surface of one of the first connection pattern and second connection

Abstract: Provided is a circuit device that allows a plurality of circuit boards, which are stacked each other and arranged in a case member, to be sealed with a resin effectively, and a method of manufacturing the same. In a hybrid integrated circuit device, a first circuit board is overlaid with the second circuit board and both of the boards are fitted into the case member. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, an opening is provided in a side wall part of the case member, and an internal space of the case member communicates with the outside through this opening. Accordingly, in the resin sealing step, a sealing resin can be injected into the internal space of the case member from the outside through this opening.

Abstract: A semiconductor module and a method of manufacturing a semiconductor module including at least one chip package, at least one module board, at least one conductive element provided between the first chip package and the module board and a protector for applying pressure to the conductive element, the module board, and the first chip package and/or acting as a heat sink for the first chip package.

Abstract: Mesh holes 35a and 59a of upper solid layers 35 and upper solid layers 59 are formed to overlie on one another, so that the insulating properties of interlayer resin insulating layers 50 are not lowered. Here, the diameter of each mesh hole is preferably 75 to 300 ?m. The reason is as follows. If the diameter of the mesh hole is less than 75 ?m, it is difficult to overlay the upper and lower mesh holes on one another. If the diameter exceeds 300 ?m, the insulating properties of the interlayer resin insulating layers deteriorate. In addition, the distance between the mesh holes is preferably 100 to 2000 ?m. The reason is as follows. If the distance is less than 100 ?m, the solid layer cannot function. If the distance exceeds 2000 ?m, the deterioration of the insulating properties of the interlayer resin insulating film occurs.

Abstract: An electrically conductive shock mount system for electrical subassemblies is provided. The shock mount system includes a first assembly having a housing containing a hook member for a hook and loop fastener. The second assembly has a housing containing a loop member for a hook and loop fastener. A plurality of holes in the housings of the first and second assemblies allows the hook member to engage the loop member. In one embodiment, the housings are made from a conductive fabric and include a plurality of conductive columns that extend through the housings.

Abstract: In the preferred embodiment, there is disclosed a printed circuit board having a surface providing a mating interface to which is electrically connected an electrical connector having signal conductors and ground conductors. The printed circuit board includes a plurality of stacked dielectric layers, with a conductor disposed on at least one of the plurality of dielectric layers. The mating interface includes a plurality of conductive vias aligned in a plurality of rows, with the plurality of conductive vias extending through at least a portion of the plurality of dielectric layers, at least one of the plurality of conductive vias intersecting the conductor. The plurality of conductive vias includes signal conductor connecting conductive vias and ground conductor connecting conductive vias.

Abstract: A multilayered printed circuit board and a fabricating method thereof are disclosed. A method that includes repeating processes of forming at least one circuit pattern, and at least one insulation layer that covers the circuit pattern, over a carrier and interconnecting circuit patterns on different layers with vias; stacking a metal stiffener over the insulation layer; repeating processes of forming at least one insulation layer and at least one circuit pattern over the stiffener and interconnecting circuit patterns on different layers with vias; and removing the carrier, can be used to reduce warpage in the board and improve workability.

Abstract: A structure for connecting substrates to each other, which is capable of thinning an electronic device on which a plurality of circuit boards is mounted, saving a space of the electronic device, and detaching a circuit board from the electronic device. The circuit board unit includes a first substrate including, on a surface thereof, a first group of electrode terminals arranged in a matrix, a second substrate including, on a surface thereof, a second group of electrode terminals arranged in a matrix in alignment with the first group of electrode terminals, and an anisotropic electrical conductor sandwiched between the first and second substrates. The first and second substrates and the anisotropic electrical conductor are pressurized by means of a pressurizer to electrically connect the electrode terminals to each other through the anisotropic electrical conductor.

Abstract: A method and apparatus for improving printed circuit board signal layer transitions are described. In one embodiment, the method includes the formation of a first via within a printed circuit board (PCB). A second via is formed concurrently within the PCB. In one embodiment, the second via is positioned proximate the first via to enable electromagnetic coupling between the first and second vias. Following formation of the second via, the first and second vias are connected to provide a series connection between the first and second vias. In one embodiment, the series connection between the first and second vias reduces a stub length with respect to the first via to reduce and potentially eliminate stub resonance for, for example, short signal layer transitions. Other embodiments are described and claimed.

Abstract: A structural printed wiring board panel includes a multilayer printed wiring board having opposing, outer faces and interlayer interconnects that route RF, power and control signals. Connection areas are formed in or on at least on one face for connecting the interlayer interconnects and any electrical components. A metallic face sheet is secured onto at least one outer face, adding structural rigidity to the multilayer printed wiring board. A metallic face sheet can have apertures positioned to allow access to connection areas. RF components can be carried by a face sheet and operatively connected to connection areas. Antenna elements can be positioned on the same or an opposing face sheet and operatively connected to RF components to form a phased array printed wiring board (PWB) panel.

Abstract: A printed wiring board manufacturing process comprises forming a conductive metal layer on at least one surface of an insulating film with a sputtered metal layer in between, selectively etching the conductive metal layer and the sputtered metal layer to produce a wiring pattern, treating the laminated film with a first treatment liquid capable of dissolving nickel of the sputtered metal layer, and treating with a second treatment liquid capable of dissolving chrome of the sputtered metal layer and also capable of eliminating the sputtered metal layer in the insulating film to remove a superficial surface of the insulating film exposed from the wiring pattern together with the residual sputtered metals in the superficial surface. A printed wiring board comprises an insulating film and a wiring pattern, wherein the insulating film in an area exposed from the wiring pattern has a thickness smaller by 1 to 100 nm than that of an area under the wiring pattern.

Abstract: A power plane including a supply power pin receptacle, a first connector power pin receptacle, and a second power pin receptacle, where a first electrical resistance between the supply power pin receptacle and the first connector power pin receptacle is substantially equal to a second electrical resistance between the supply power pin receptacle and the second connector power pin receptacle.

Abstract: The multilayer substrate includes a plurality of layers. Located within the plurality of layers are a number of vias. Conductive traces connect the vias to form trace/via paths having various topologies, geometries, and/or properties.

Abstract: A multi-conducting through hole structure is provided. The multi-conducting through hole structure has a substrate, at least two signal lines and at least a reference line. The substrate has a through hole passing therethrough. The signal lines are disposed on a portion of an inner surface of the through hole and extended through the through hole. The reference line is disposed on a portion of the inner surface of the through hole and extended through the through hole, wherein the reference line is disposed between the lines for signal. Because the signal lines are separated by the reference line, the electromagnetic coupling generated by signals can be reduced to lower the cross-talk interference between signals passing through the through hole, so as to promote the signal-transmission quality.

Abstract: Signal line conductors passing through vertical vias in an insulative substrate for supporting and interconnecting integrated circuit chips are provided with shielding conductors in adjacent vias that link respective power and ground planes. The shielding conductors' presence in positions around a signal via is made possible through the employment of power plane and ground plane conductive grids that are laid out in rhomboid patterns. The power plane and ground plane grids possess a left-right mirror relation to one another and are displaced to place the rhomboid's corners to avoid overlapping any of the grid lines.

Abstract: An information processing apparatus designed for miniaturization, having a chassis, and including a motherboard; an expansion slot exchange device electronically connected to the motherboard and configured to hold an expansion card; and a memory device electronically connected to the motherboard and located within the chassis primarily in a first plane orthogonal to a primary plane of the motherboard. An expansion card can be added, occupying a plane parallel to the primary plane of the motherboard.

Abstract: A module for transferring a PCB including a first transfer body that is translatable along a first moving path to transfer a first PCB and a second transfer body that is translatable along a second moving path to transfer a second PCB with the second transfer body being formed with an aperture therein. Additionally the first transfer body is adjustable from a first position where the first transfer body does not fit through the aperture to a second position wherein the first transfer body can fit within the aperture.

Abstract: An insulating resin layer 50 is formed on a surface of a conductor portion 2 by performing a plating pretreatment to the conductor portion 2 that has been formed on a surface of a wiring board substrate 1, and forming numerous dendrites 3 on the surface of the conductor portion 2 using an electroplating or chemical plating method. The insulating resin layer 50 is then formed by stacking an insulating resin plate 50 that has a semi-cured adhesive layer 40 formed thereon in advance on the conductor portion 2 and the dendrites 3, and then applying pressure and raising temperature for laminate bonding.

Abstract: A protective layer for an electronic device and devices with a protective layer. In one exemplary embodiment, the protective layer includes two different layers which can be etched by the same etchant as which are at least one of optically or RF transparent.

Abstract: According to embodiments, small holes or openings may be cut on or through the ground plane(s) adjacent to a selected trace line, so that C and L will be changed accordingly. Then phase velocity will also be changed. As a result, the flying time from one location or point to a different location or point of the transmission line will also be changed. This concept applies to a single trace. Similarly, this concept may be applied to one trace of a differential pair of traces (e.g., so that the two parts of the differential signal transmitted at one point in time at a location on the pair arrive at the same time at another location of the pair).

Abstract: An improved printed circuit board (PCB) includes first and second substrates, which are disposed being distanced or spaced mutually and in which at least one or more semiconductor chips are mounted, and a signal transmission part for providing a signal transmission path between the first and second substrates, the signal transmission part being extended out of a region having a size smaller than a maximum size of the first substrate within the first substrate, and being extended in the second substrate. In disposing two substrates in a spaced-apart structure of upper and lower positions, a length of flexible printed circuit (FPC) connecting the two substrates can be reduced, and an impedance mismatching caused in use of the FPC can be reduced.

Abstract: A printer circuit board for mounting electrical components such as LEDs has outward edge protrusion on which an electrically conductive material is deposited such that the board itself can be used to make electrical contact in a pre-existing, commercially available fitting, such as a screw-in or base fitting designed to receive incandescent light bulbs. For a screw-in fitting the board can optionally be made slightly wider than the inner diameter of the fitting but be provided with at least one axially extending slit; the board is then compressed slightly but biased outward to provide better electrical contact when inserted into fitting.