Abstract: An apparatus has a plurality of photonic elements. At least two photonic elements forming a cavity. At least one photonic element receives first electromagnetic radiation from outside the cavity and transmits the first electromagnetic radiation into the photonic cavity. At least one photonic element receives second electromagnetic radiation from outside the cavity and transmits the second radiation into the photonic cavity. A photonic memory disposed in the cavity comprises an atomic system that: receives a photon field of first radiation; receives second radiation; stores at least a portion of the field of the photon in the atomic system via an atomic transition using the photon and the received second radiation; emits the stored portion of the photon upon receiving third electromagnetic radiation. The apparatus directs the photon into the photonic memory, after being reflected into the photonic cavity by at least one of the photonic elements; and outputs the emitted portion of the field into the cavity.

Abstract: A silicon wafer forming method includes: a block ingot forming step of cutting a silicon ingot to form block ingots; a planarizing step of grinding an end face of the block ingot to planarize the end face; a separation layer forming step of applying a laser beam of such a wavelength as to be transmitted through silicon to the block ingot, with a focal point of the laser beam positioned in the inside of the block ingot at a depth from the end face of the block ingot corresponding to the thickness of the wafer to be formed, to form a separation layer; and a wafer forming step of separating the silicon wafer to be formed from the separation layer.

Abstract: Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a gate disposed on a quantum well stack; an insulating material disposed on the gate; and a conductive via extending through the insulating material and in conductive contact with the gate.

Abstract: A brush seal may comprise a bristle pack including at least one bristle made of a shape memory alloy. The bristle may be used in a sealing system. The brush seal may be disposed in a seal cavity. The brush seal may further comprise backing plate and a retention structure coupled to the bristle pack. The brush seal may be configured for passive clearance control during operation of a gas-turbine engine.

Abstract: A device includes an optic in an at least partially rigid scaffold. The scaffold is permeated, at least temporarily during a writing process, by writable media. The optic may be written into a writable volume in the scaffold defined by the writable media. The optic may be written by exposing the writable media to incident light to cause a material property change in the writable media within the writable volume.

Abstract: Systems and methods for an optical ternary content addressable memory (TCAM) is provided. In various embodiments, one or more search words can be encoded in a multi-wavelength input signal. Each bit position associated with a set of wavelengths of the input signal, each wavelength corresponding to a logic value. A plurality of copies of the input signal can be coupled to an optical search engine comprising a plurality of rows of stored words. In various embodiments, the search word may be encoded in the amplitude of a single wavelength. Each bit position can be associated with a set input waveguides, and a logic value can be encoded based on whether amplitude of the associated wavelength is detected on a respective input waveguide of the set of waveguides. A mismatch of at least one bit is indicated if light is detected on an output of the optical TCAM.

Abstract: A random bit cell includes a random bit cell. The random bit cell includes a volatile memory unit, a first non-volatile memory unit, a second non-volatile memory unit, a first select transistor, and a second select transistor. The first non-volatile memory unit is coupled to a first data terminal of the volatile memory unit, and the second non-volatile memory unit is coupled to a second data terminal of the volatile memory unit. The first select transistor has a first terminal coupled to the first data terminal of the volatile memory unit, a second terminal coupled to a first bit line, and a control terminal coupled to a word line. The second select transistor has a first terminal coupled to the second data terminal of the volatile memory unit, a second terminal coupled to a second bit line, and a control terminal coupled to a word line.

Abstract: Techniques that facilitate hybrid memory access frequency are provided. In one example, a system stores access frequency data for storage class memory and volatile memory in a translation lookaside buffer. The access frequency data is indicative of a frequency of access to the storage class memory and the volatile memory. The system also determines whether to store data in the storage class memory or the volatile memory based on the access frequency data stored in the translation lookaside buffer.

Abstract: A system includes a data storage medium comprising layers, an excitation circuit, and an emitter. Each layer comprises cells arranged in a horizontal plane. Cells in different layers are arranged in a vertical plane of the data storage medium. The excitation circuit excites a layer during excitation period. Exciting the layer changes an optical property of the layer during the excitation period. The emitter emits a first and a second beam onto a first and a second cell of the layer being excited during the excitation period to orient electrical charges within the first and the second cell to a first and second oriented values and their intensity to a first and second intensity values respectively. The first and second cells maintain the first and second oriented values and the first and second intensity values after the excitation period is over or in absence of the layer being excited.

Abstract: An image sensor includes a first semiconductor chip having a first surface and a second surface, the first semiconductor chip a including an array of unit pixels configured to capture light corresponding to an image and to generate image signals based on the captured light; and a second semiconductor chip having a first surface and a second surface, the second semiconductor chip including first peripheral circuits configured to control the array of pixels and receive the generated image signals, the first peripheral circuits including a vertical scanning circuit, a horizontal scanning circuit, and a signal read-out circuit, the first semiconductor chip being stacked on the second semiconductor chip, the first semiconductor chip not being smaller than the second semiconductor chip.

Abstract: A memory device may include an access transistor, and a memory cell configured to store an item of information. The memory cell may include first and second electrodes configured to have different optoelectronic states corresponding respectively to two values of the item of information, and to switch between the different optoelectronic states based upon a control signal external to the memory cell, the different optoelectronic states being naturally stable in an absence of the control signal. The memory cell may also include a solid electrolyte between the first and second electrodes.

Abstract: A three-dimensional scene sensor comprises: a deformable optical system modifying focal distance by control signal, optics imaging the scene by analog image sensor for depths corresponding to distances; the image sensor comprising a matrix of pixels grouped into sub-matrices of macro-pixels being a sub-assembly of pixels, each macro-pixel operating independently for acquisition and reading of data; a matrix of elementary processors, each macro-pixel directly connected to a dedicated processor wherein pixel data for the macro-pixel are transmitted and processed by the processor, each processor carries out, for each pixel, local processing operations calculating depth information for macro-pixel, the processors operating in parallel and independently such that the depth information is processed and calculated in parallel over all macro-pixels of the image sensor, the processors connected to at least one processing unit allowing calculations using high-level input data, calculated starting from the pixel data di

Abstract: A memory device may include an access transistor, and a memory cell configured to store an item of information. The memory cell may include first and second electrodes configured to have different optoelectronic states corresponding respectively to two values of the item of information, and to switch between the different optoelectronic states based upon a control signal external to the memory cell, the different optoelectronic states being naturally stable in an absence of the control signal. The memory cell may also include a solid electrolyte between the first and second electrodes.

Abstract: Embodiments of imaging systems and methods of autofocusing are disclosed, for example, using a folded optics configuration. One system includes at least one camera configured to capture a target image scene, including an image sensor comprising an array of sensor elements, a primary light folding surface configured to direct a portion of received light in a first direction, and an optical element having a secondary light folding surface directing light in a second direction. The system can also include a lens assembly having at least one stationary lens positioned between the secondary light folding surface and the image sensor, the at least one stationary lens having a first surface mechanically coupled to the optical element and a second surface mechanically coupled to the image sensor, and at least one movable lens positioned between the primary light folding surface and the optical element.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell which stores data with two or more levels. The memory cell includes a structure includes a first electrode layer, a first semiconductor layer, a phase change film, an electrical insulating layer, a second semiconductor layer, and a second electrode layer arranged in order thereof, and the first semiconductor layer and the second semiconductor layer have carrier polarities different from each other.

Abstract: Disclosed herein is a method of changing characteristics of an electronic device, including the steps of: applying light to an electronic device through a plurality of media having different refractive indexes from each other, the electrical characteristics of the electronic device being changed depending on the amount of incident light; and changing an incident angle of light applied the electronic device to adjust the amount of incident light. There is provided a method of providing light incident angle dependency by a simple procedure of accumulating additional media in various electronic devices. In the method, the light incident angle selectivity of the electronic device can be maintained even when the inclination angle of the device is changed depending on the axis parallel to the incident direction of light even though the incident direction thereof is fixed.

Abstract: A quantum memory and method are proposed. The quantum memory includes an ensemble of atoms embedded in a storage medium and at least one light source for emitting towards the storage medium first, second and third light pulses, the first light pulse carrying information to be stored. The at least one light source is adapted for emitting second and third light pulses which are such that a photon echo substantially carrying information stored by the first light pulse is emitted by the ensemble of atoms after emission of the third light pulse.

Abstract: A memory cell includes a light emitting unit, a phosphorescent layer, a polarization filter and a light detecting unit. The light emitting unit selectively generates a first light signal in response to a write data. The phosphorescent layer generates a second light signal using an energy absorbed from the first light signal. The polarization filter either passes the second light signal to output the passed second light signal as a third light signal or blocks out the second light signal in response to the write data. The light detecting unit generates a read data by detecting the third light signal.

Abstract: An integrated circuit device (20, 60) includes a plurality of memory cells (22), which are configured to store data. Multiple P-N junctions (24) are arranged so that a single, respective P-N junction is disposed in proximity to each memory cell and is configured to emit optical radiation during readout from the memory cell with a wavelength matching an emission wavelength of the memory cell.

Abstract: A photonic quantum memory is provided. The photonic quantum memory includes entanglement basis conversion module configured to receive a first polarization-entangled photon pair and to produce a second entangled photon pair. The second polarization-entangled photon pair can he a time-bin entangled or a propagation direction-entangled photon pair. The photonic quantum memory further includes a photonic storage configured to receive the second entangled photon pair from the basis conversion module and to store the second entangled photon pair.

Abstract: A quantum memory and method are proposed. The quantum memory includes an ensemble of atoms embedded in a storage medium and at least one light source for emitting towards the storage medium first, second and third light pulses, the first light pulse carrying information to be stored. The at least one light source is adapted for emitting second and third light pulses which are such that a photon echo substantially carrying information stored by the first light pulse is emitted by the ensemble of atoms after emission of the third light pulse.

Abstract: An optically-controlled memory resistor includes (1) a memory resistor having a first electrode, a second electrode, and a photo-responsive active layer disposed between the first and second electrodes and (2) a light source in cooperation with the memory resistor. The light source is configured to controllably illuminate the memory resistor for affecting a resistance state exhibited by the memory resistor. Also, a method for operating a memory resistor includes changing a resistance state of the memory resistor in response to an application of photons to the memory resistor.

Abstract: A memory device automatically correcting the effect of collisions of high-energy particles, comprising at least one memory cell, and further comprising: retention means for retaining, for a determined period, a single copy of the stored value stored in said memory cell; detection means for detecting a change of state of said memory cell, by comparing the stored value stored in said memory cell with the value in retention in said retention means; and management means suitable for determining whether a detected change of state of said memory cell is due to a high-energy particle and, in which case, to automatically command a reloading of the stored value stored in said retention means into said memory cell.

Abstract: A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device (1) comprises: a superconducting ring member (10) having a ?-junction (6) and a 0-junction (7); and a quantum state detecting member (20) constituted by a superconducting quantum interference device arranged outside of the superconducting ring member, wherein a bonding and an antibonding state brought about by a tunneling effect between a |?> and a |?> state as two states degenerate in energy of the superconducting ring member (10) are regarded as quantum bits. The bonding and antibonding states as the quantum bits are read out by the quantum state detecting member (20). The two bit controlled NOT gate operation can be performed by the two quantum bits comprising said quantum bits.

Abstract: An electronic device comprising a heat transfer structure and a phase change structure which is convertible between two phase states by heating, wherein the phase change structure is electrically conductive in at least one of the two phase states, wherein the heat transfer structure is arranged to be heated by radiation impinging on the heat transfer structure, wherein the phase change structure is thermally coupled to the heat transfer structure so that the phase change structure is convertible between the two phase states when the radiation impinges on the heat transfer structure.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: A Josephson quantum computing device and an integrated circuit using Josephson quantum computing devices which can realize a NOT gate operation controlled with 2 bits will be provided. The Josephson quantum computing device (1) comprises: a superconducting ring member (10) having a ?-junction (6) and a 0-junction (7); and a quantum state detecting member (20) constituted by a superconducting quantum interference device arranged outside of the superconducting ring member, wherein a bonding and an antibonding state brought about by a tunneling effect between a |?> and a |?> state as two states degenerate in energy of the superconducting ring member (10) are regarded as quantum bits. The bonding and antibonding states as the quantum bits are read out by the quantum state detecting member (20). The two bit controlled NOT gate operation can be performed by the two quantum bits comprising said quantum bits.

Abstract: A memory cell includes a light emitting unit, a phosphorescent layer, a polarization filter and a light detecting unit. The light emitting unit selectively generates a first light signal in response to a write data. The phosphorescent layer generates a second light signal using an energy absorbed from the first light signal. The polarization filter either passes the second light signal to output the passed second light signal as a third light signal or blocks out the second light signal in response to the write data. The light detecting unit generates a read data by detecting the third light signal.

Abstract: A non-volatile electrochemical memory cell formed of a stack of thin films comprising at least one first active layer, suited to releasing and accepting, in a reversible manner, at least one ion species, at least one second active layer, suited to releasing and accepting said ion species, in a reversible manner, the active layers being based on materials having different compositions and electrochemical potential profiles.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: A system, device and method for electrically addressing an element include providing a thermoelectric layer in proximity with an area to be addressed and positioning a probe in proximity of the thermoelectric layer. Electrical activity is induced in the thermoelectric layer by applying heat from the probe. A response is caused in the area to be addressed.

Abstract: In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel region; and a drain region on an opposing side of the channel region from the source region. The channel region has phase change material adjacent the drain region. In some embodiments, the phase change material may be adjacent both the source region and the drain region. Some embodiments include methods of programming a memory cell that has phase change material adjacent a drain region. An inversion layer is formed within the channel region adjacent the gate dielectric, with the inversion layer having a pinch-off region within the phase change material adjacent the drain region. Hot carriers (for instance, electrons) within the pinch-off region are utilized to change a phase within the phase change material.

Abstract: In a system having a memory device, an event is detected during system operation. The memory device is heated to reverse use-incurred degradation of the memory device in response to detecting the event. In another system, the memory device is heated to reverse use-incurred degradation concurrently with execution of a data access operation within another memory device of the system. In another system having a memory controller coupled to first and second memory devices, data is evacuated from the first memory device to the second memory device in response to determining that a maintenance operation is needed within the first memory device.

Abstract: To produce a memory which resists ion or photon attack, a memory structure is chosen whose memory point behaves asymmetrically with regard to these attacks. It is shown that in this case, it is sufficient to have a reference cell for an identical and periodic storage structure in order to be able to correct all the memory cells assailed by an attack. An error correction efficiency of ½ is thus obtained, with a simple redundancy, whereas the conventional methods make provision, for the same result, to triple the storage, to obtain a less beneficial efficiency of ?.

Abstract: Using a synthetic molecular spring device in a system for dynamically controlling a system property, such as momentum, topography, and electronic behavior. System features (a) the synthetic molecular spring device having (i) at least one synthetic molecular assembly each featuring at least one chemical unit including at least one: (1) atom; (2) complexing group complexed to at least one atom; (3) axial ligand reversibly physicochemically paired with at least one complexed atom; and (4) substantially elastic molecular linker; and, (ii) an activating mechanism directed to at least one atom-axial ligand pair; and, (b) a selected unit operatively coupled to synthetic molecular assembly, and exhibiting the system property.

Abstract: The present invention provides a quantum optical data storage protocol, whose storage time is lengthened by spin population decay time from several minutes to several hours.

Abstract: A mass storage device that utilizes one or more solid-state memory components to store data for a host system, and a method for increasing the write endurance of the memory components. The memory components are periodically heated above an intrinsic operating temperature thereof to a preselected temperature that is sufficient to thermally recondition the memory component in a manner that increases the write endurance of the memory component.

Abstract: Provided are a photonic memory device, a method of storing data using the photonic memory device, and a photonic sensor device. The photonic memory device comprises a signal line through which a photon is input; a ring resonator receiving a photon through an input gap that is adjacent to the signal line and storing the photon; and a detect line outputting the photon stored in the ring resonator through an output gap that is adjacent to the ring resonator, wherein data is read/written and stored/deleted by the input/output of the photon.

Abstract: Synthetic molecular spring device featuring: (a) a synthetic molecular assembly, SMA, each scalable chemical module including: (i) at least one atom, M, (ii) at least one complexing group, CG, complexed to an atom, M, (iii) at least one axial ligand, AL, reversibly physicochemically paired with at least one atom, M, complexed to a complexing group, CG, (iv) at least one substantially elastic molecular linker, ML, having body and two ends with at least one chemically bonded to another component of SMA; (b) activating mechanism, AM, operatively directed to an atom-axial ligand pair, whereby following activating mechanism, AM, sending activating signal, AS/AS?, to an atom-axial ligand pair for physicochemically modifying the atom-axial ligand pair, there is activating at least one cycle of spring-type elastic reversible transitions between contracted and expanded linear conformational states of molecular linker, ML. Optionally includes (v) chemical connectors, CC, and/or, (vi) binding sites, BS.

Abstract: A capacitive operation method for quantum computing is disclosed where providing a sequence of write pulses above a threshold voltage induces a single charge population, forming a quantum dot (Q-dot). Determining if the single charge population was induced in the Q-dot occurs by monitoring capacitance changes while the writing is performed. Q-bits (Q-dot pairs) are formed without requiring a separate transistor for each Q-dot by multiplexing the calibration. A device which is able to perform the above method is also disclosed. The device utilizes the ability of cryogenic capacitance bridge circuits to measure the capacitance change caused by the introduction of a single charge population to a Q-dot. The device also permits swapping of Q-dot and Q-bit pairs utilizing a signal multiplexed with the voltage pulses that write (e.g. change the charge population) to the Q-dots.

Abstract: The method of and apparatus for testing a floating gate non-volatile memory semiconductor device comprising an array of cells including floating gates for storing data in the form of electrical charge. The method includes applying a test pattern of said electrical charge to the floating gates, exposing the device to energy to accelerate leakage of the electrical charges out of the cells, and subsequently comparing the remaining electrical charges in the cells to the test pattern. The energy is applied in the form of electromagnetic radiation of a wavelength such as to excite the charges in the floating gates to an energy level sufficient for accelerating charge loss from the floating gates of defective cells relative to charge loss from non-defective cells. The wavelength is preferably in the range of 440 to 560 nm.

Abstract: A method for a film transfer device includes receiving a digital image in the film transfer device, wherein the digital image comprises a plurality of square pixels, wherein the digital image comprises a first number of pixels in a horizontal direction and a second number of pixels in a vertical direction, and wherein the digital image comprises a non-anamorphic version of an image, and optically converting the digital image into an optical output image to film media in the film transfer device, wherein the optical output image is associated with a plurality of non-square pixels, wherein the optical output image is associated with the first number of pixels in the horizontal direction and the second number of pixels in the vertical direction, and wherein the optical output image comprises an anamorphic version of the image.

Abstract: A memory cell stores a data bit value despite atomic radiation. The memory cell includes two inverters, an access circuit, and two switch circuits. Each inverter has an input and an output. The access circuit is arranged to write and read the data bit value in the memory cell. The switch circuits cross couple the outputs of the two inverters to the inputs of the two inverters. The switch circuits are arranged to alternately decouple and couple the inputs of the two inverters to limit corruption from atomic radiation of the data bit value in the memory cell.

Abstract: Provided are a photonic memory device, a method of storing data using the photonic memory device, and a photonic sensor device. The photonic memory device comprises a signal line through which a photon is input; a ring resonator receiving a photon through an input gap that is adjacent to the signal line and storing the photon; and a detect line outputting the photon stored in the ring resonator through an output gap that is adjacent to the ring resonator, wherein data is read/written and stored/deleted by the input/output of the photon.

Abstract: A method for creating a logic state for teleporting quantum information using a single photon is described. The method includes receiving a photon with an initial polarization and causing a first semiconductor crystal to have a first spin orientation. The photon interacts with the first semiconductor crystal for producing a resulting polarization dependent upon the first spin orientation. Causing the photon to interact with the first semiconductor crystal generates a maximally entangled state.

Abstract: The present invention provides a quantum optical data storage protocol, whose storage time is lengthened by spin population decay time from several minutes to several hours.

Abstract: A memory device includes a bit cell including an adjustable transmittance component having a first side and a second side. The adjustable transmittance component has an adjustable transmittance state representative of a bit value of the bit cell. The memory device further includes a photon detector optically coupled to a second side of the adjustable transmittance component. A technique related to the memory device includes determining a transmittance state of the adjustable transmittance component and providing a bit value for the bit cell based on the transmittance state. Another technique related to the memory device includes determining a bit value to be stored at the bit cell and configuring the adjustable transmittance component to have a transmittance state corresponding to the bit value.

Abstract: A switching mechanism is used for altering the operation of an electronic device. The switching mechanism has a memory comprising a plurality of memory cells. Each memory cell undergoes a change in binary data upon receiving more than a specific amount of light having a specific wavelength. The operation is altered when the binary data of at least one memory cell of the plurality of memory cells is changed by the light.

Abstract: Optical breakdown by predetermined laser pulses in transparent dielectrics produces an ionized region of dense plasma confined within the bulk of the material. Such an ionized region is responsible for broadband radiation that accompanies a desired breakdown process. Spectroscopic monitoring of the accompanying light in real-time is utilized to ascertain the morphology of the radiated interaction volume. Such a method and apparatus as presented herein, provides commercial realization of rapid prototyping of optoelectronic devices, optical three-dimensional data storage devices, and waveguide writing.

Abstract: A manufacturing method for sapphire crystal material is disclosed, including a laser-etched bar code formed into the interior of the sapphire crystal material. The laser-etched bar code may be associated with one or more manufacturing parameters or other manufacturing data. The sapphire crystal may be used to create a cover sheet for use with a display screen of a portable electronic device.