Inorganic Oxygen, Sulfur, Selenium, Or Tellurium (i.e., Chalcogen) Containing Coating (e.g., Phosphosilicate, Silicon Oxynitride, Etc.) Patents (Class 427/255.29)
- Plural metal containing coating (e.g., indium oxide/tin oxide, titanium oxide/aluminum oxide, etc.) (Class 427/255.32)
- Zinc (Zn), cadmium (Cd), or mercury (Hg), containing (Class 427/255.33)
- Gallium (Ga), aluminum (Al), or indium (In) containing (Class 427/255.34)
- Germanium (Ge), tin (Sn), or lead (Pb) containing (Class 427/255.35)
- Titanium (Ti) or zirconium (Zr) containing (Class 427/255.36)
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Patent number: 7208196Abstract: The present invention relates to oxides on suitable substrates, as converted from nitride precursors.Type: GrantFiled: November 10, 2003Date of Patent: April 24, 2007Assignee: Applied Thin Films, Inc.Inventors: Sankar Sambasivan, Scott A. Barnett, Ilwon Kim, John Rechner
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Patent number: 7200460Abstract: A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.Type: GrantFiled: February 25, 2003Date of Patent: April 3, 2007Assignee: Applied Materials, Inc.Inventors: Francimar Campana, Srinivas Nemani, Michael Chapin, Shankar Venkataraman
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Patent number: 7192625Abstract: In manufacturing a barrier-forming film, a vapor-deposited inorganic oxide film is provided on a face of a substrate film. An annealing treatment is applied to the substrate film having said vapor-deposited inorganic film. The substrate film is a resinous film which selected from a group consisting of polyesters, polyamides and polypropylenes. The annealing treatment includes a heating treatment carried out at a temperature within the range from 55° C. to 150° C. in order to cause thermal shrinkage of the substrate film and to increase density of the vapor-deposited inorganic oxide film. The vapor-deposited inorganic oxide film includes a vapor-deposited silicon oxide film or a vapor-deposited aluminum oxide film.Type: GrantFiled: February 24, 2004Date of Patent: March 20, 2007Assignee: Dai Nippon Printing Co., Ltd.Inventors: Koujiro Ohkawa, Atsuo Tsuzuki, Kuniaki Yoshikata
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Patent number: 7189431Abstract: A method for forming a passivated metal layer that preserves the properties and morphology of an underlying metal layer during subsequent exposure to oxygen-containing ambients. The method includes providing a substrate in a process chamber, exposing the substrate to a process gas containing a rhenium-carbonyl precursor to deposit a rhenium metal layer on the substrate in a chemical vapor deposition process, and forming a passivation layer on the rhenium metal layer to thereby inhibit oxygen-induced growth of rhenium-containing nodules on the rhenium metal surface.Type: GrantFiled: September 30, 2004Date of Patent: March 13, 2007Assignees: Tokyo Electron Limited, International Business Machines Corp.Inventors: Hideaki Yamasaki, Kazuhito Nakamura, Yumiko Kawano, Gert J. Leusink, Fenton R. McFeely, Paul Jamison
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Patent number: 7163719Abstract: A method of depositing a thin film using a hafnium compound includes depositing a primary thin film and depositing a secondary thin film. The depositing of the primary thin film and the depositing of the secondary thin film are repeated once or more. The depositing of the primary thin film includes feeding a first reactive gas, purging the first reactive gas, feeding a third reactive gas, and purging the third reactive gas, and repeating the aforementioned steps a first plurality of (N) times. The feeding of the first reactive gas includes feeding a second reactive gas, purging the second reactive gas, feeding the third reactive gas, and purging the third reactive gas, and repeating the aforementioned steps a second plurality of (M) times.Type: GrantFiled: November 12, 2003Date of Patent: January 16, 2007Assignee: IPS, Ltd.Inventors: Young Hoon Park, Cheol Hyun Ahn, Sang Jin Lee, Byoung Cheol Cho, Sang Kwon Park, Hong Joo Lim, Sang Kyu Lee, Jang Ho Bae
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Patent number: 7141278Abstract: A method for forming thin films of a semiconductor device is provided. The thin film formation method presented here is based upon a time-divisional process gas supply in a chemical vapor deposition (CVD) method, where the process gases are supplied and purged sequentially, and additionally plasma is generated in synchronization with the cycle of pulsing reactant gases. A method of forming thin films that possess a property of gradient composition profile is also presented.Type: GrantFiled: June 8, 2001Date of Patent: November 28, 2006Assignee: ASM Genitech Korea Ltd.Inventors: Won-yong Koh, Chun-soo Lee
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Patent number: 7122222Abstract: Processes for precursors for silicon dielectric depositions of silicon nitride, silicon oxide and silicon oxynitride on a substrate using a hydrazinosilane of the formula: [R12N—NH]nSi(R2)4?n where each R1 is independently selected from alkyl groups of C1 to C6; each R2 is independently selected from the group consisting of hydrogen, alkyl, vinyl, allyl, and phenyl; and n=1–4. Some of the hydrazinosilanes are novel precursors.Type: GrantFiled: October 27, 2003Date of Patent: October 17, 2006Assignee: Air Products and Chemicals, Inc.Inventors: Manchao Xiao, Arthur Kenneth Hochberg, Kirk Scott Cuthill
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Patent number: 7117064Abstract: A method of forming a silicon carbide layer for use in integrated circuit fabrication processes is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a dopant in the presence of an electric field. The as-deposited silicon carbide layer has a compressibility that varies as a function of the amount of dopant present in the gas mixture during later formation.Type: GrantFiled: February 21, 2006Date of Patent: October 3, 2006Assignee: Applied Materials, Inc.Inventors: Srinivas D Nemani, Li-Qun Xia, Dian Sugiarto, Ellie Yieh, Ping Xu, Francimar Campana-Schmitt, Jia Lee
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Patent number: 7022378Abstract: A nitrided oxide layer on a silicon carbide layer is processed by annealing the nitrided oxide layer in a substantially oxygen-free nitrogen containing ambient. The anneal may be carried out at a temperature of greater than about 900° C., for example, a temperature of about 1100° C., a temperature of about 1200° C. or a temperature of about 1300° C. Annealing the nitrided oxide layer may be carried out at a pressure of less than about 1 atmosphere, for example, at a pressure of from about 0.01 to about 1 atm or, in particular, at a pressure of about 0.2 atm. The nitrided oxide layer may be an oxide layer that is grown in a N2O and/or NO containing ambient, that is annealed in a N2O and/or NO containing ambient or that is grown and annealed in a N2O and/or NO containing ambient.Type: GrantFiled: August 14, 2003Date of Patent: April 4, 2006Assignee: Cree, Inc.Inventors: Mrinal Kanti Das, Adam William Saxler
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Patent number: 7011867Abstract: A coated cutting tool is composed of one or more layers of refractory compounds of which at least one layer is single-phase ?-alumina with a pronounced columnar grain-structure and strong texture in the [300]-direction. The alumina layer is preferably deposited by CVD (Chemical Vapor Deposition) and the preferred microstructure and texture are achieved by adding a second metal halide, and a texture modifying agent, to the reaction gas. When coated cemented carbide cutting tools according to the invention are used in the machining of steel or cast iron, several important improvements compared to prior art have been observed, particularly in the machining of nodular cast iron.Type: GrantFiled: April 14, 2004Date of Patent: March 14, 2006Assignee: Sandvik AktiebolagInventor: Per M{dot over (a)}rtensson
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Patent number: 7008551Abstract: A method for forming optical devices on-planar substrates, as well as optical devices formed by the method are described. The method uses a linear injection APCVD process to form optical waveguide devices on planar substrates. The method is performed at approximately atmospheric pressure. According to the method, a wafer with a lower cladding layer already formed by either CVD or oxidation is placed on a conveyer, which may include a heating element. The heated wafer is transported underneath a linear injector such that the chemicals from the linear injector react on the wafer surface to form a core layer. After the core layer is formed, photoresist is spun on the surface of the wafer, and then standard lithography is used to pattern the optical devices. Next, reactive ion etching (RIE) is used to form waveguide lines. The remaining photoresist is then removed. An upper cladding layer is formed to substantially cover the core regions.Type: GrantFiled: April 30, 2003Date of Patent: March 7, 2006Assignee: Andevices, Inc.Inventors: C. Jacob Sun, James K. Eu
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Patent number: 6969539Abstract: Metal silicates or phosphates are deposited on a heated substrate by the reaction of vapors of alkoxysilanols or alkylphosphates along with reactive metal amides, alkyls or alkoxides. For example, vapors of tris-(ter-butoxy)silanol react with vapors of tetrakis(ethylmethylamido)hafnium to deposit hafnium silicate on surfaces heated to 300° C. The product film has a very uniform stoichiometry throughout the reactor. Similarly, vapors of diisopropylphosphate react with vapors of lithium bis(ethyldimethylsilyl)amide to deposit lithium phosphate films on substrates heated to 250° C. supplying the vapors in alternating pulse produces these same compositions with a very uniform distribution of thickness and excellent step coverage.Type: GrantFiled: September 28, 2001Date of Patent: November 29, 2005Assignee: President and Fellows of Harvard CollegeInventors: Roy G. Gordon, Jill Becker, Dennis Hausmann, Seigi Suh
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Patent number: 6962728Abstract: A method for making a silicon oxide/silicon nitride/silicon oxide structure includes forming a tunnel oxide layer and a silicon nitride layer over a substrate; annealing the silicon nitride layer; forming a silicon oxide layer over the annealed silicon nitride layer by high temperature low pressure chemical vapor deposition; depositing a first gate layer over the silicon oxide layer; patterning to form a silicon oxide/silicon nitride/silicon oxide (ONO) structure; forming bit lines in the substrate adjacent the ONO structure; and annealing to form a thermal oxide over the bit lines.Type: GrantFiled: May 16, 2003Date of Patent: November 8, 2005Assignee: Macronix International Co., Ltd.Inventors: Hsian Lan Lung, Ching Tang Wang
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Patent number: 6954350Abstract: A ceramic layered product 10 includes a plurality of ceramic layers 12 including a metallic element and a plurality of metal layers 14a, 14b, each of which is arranged between the ceramic layers 12. The metallic layers 14a, 14b include at least one element selected from the group consisting of Ni, Cu, Ag, and Pd in a total content of not less than 50 atm % as a main component, and at least one element selected from the metallic elements of the ceramic layers 12 in a content of not less than 1 atm % and less than 50 atm % as an additive component. This ceramic layered product can be less susceptible to fracture in the metal layers caused by firing.Type: GrantFiled: September 16, 2003Date of Patent: October 11, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Honda, Yoriko Takai, Atsuo Nagai, Masako Murao, Keiji Kobayashi
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Patent number: 6933053Abstract: In accordance with one aspect of the present invention, a process for forming a specific reactive element barrier on a titanium and aluminum containing substrate is provided. The process includes creating a dry air atmosphere with a concentration of water vapor below about 750 ppm at a temperature above about 550° C. contiguous to a surface of the substrate on which the barrier layer is to be formed. The temperature is maintained above 550° C. and the water vapor concentration is maintained below about 100 ppm while the water vapor in the dry air atmosphere is reacted with specific reactive elements at the substrate surface. The reaction forms a specific reactive element oxide barrier layer which is strongly bonded to the substrate surface. The barrier layer includes an aluminum oxide layer at the substrate/barrier layer interface and a second oxide layer at a barrier layer/atmosphere interface.Type: GrantFiled: March 18, 2003Date of Patent: August 23, 2005Inventor: Donald L. Alger
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Patent number: 6919101Abstract: A method for improving the adhesion of an impermeable film on a porous low-k dielectric film in an interconnect structure is disclosed. The method provides an in-situ annealing step before the deposition of the impermeable film to release the volatile trapped molecules such as water, alcohol, HCl, and HF vapor, inside the pores of the porous low-k dielectric film. The method also provides an in-situ deposition step of the impermeable film right after the deposition of the porous low dielectric film without exposure to an atmosphere containing trappable molecules. The method further provides an in-situ deposition step of the impermeable film right after the removal a portion of the porous low-k dielectric film without exposure to an atmosphere containing trappable molecules. By the removal of all trapped molecules inside the porous low-k dielectric film, the adhesion between the deposited impermeable film and the low-k dielectric film is improved.Type: GrantFiled: February 4, 2003Date of Patent: July 19, 2005Assignee: Tegal CorporationInventors: Zhihong Zhang, Tai Dung Nguyen, Tue Nguyen
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Patent number: 6887588Abstract: An article protected by a thermal barrier coating system includes a substrate having a substrate surface, and a thermal barrier coating system overlying the substrate. The thermal barrier coating system has a thermal barrier coating formed of a thermal barrier coating material arranged as a plurality of columnar grains extending generally perpendicular to the substrate surface and having grain surfaces. A sintering inhibitor is within the columnar grains, either uniformly distributed or concentrated at the grain surfaces. The sintering inhibitor is lanthanum oxide, chromium oxide, and/or yttrium chromate, mixtures thereof, or mixtures thereof with aluminum oxide.Type: GrantFiled: September 21, 2001Date of Patent: May 3, 2005Assignee: General Electric CompanyInventors: John Frederick Ackerman, Venkat Subramaniam Venkataramani, Irene Spitsberg, Ramgopal Darolia
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Patent number: 6884464Abstract: A silicon comprising film and its method of fabrication is described. The silicon comprising film is grown on a substrate. A hexachlorodisilane (HCD) source gas is one of the reactant species used to form the silicon comprising film. The silicon comprising film is formed under a pressure between 10 Torr and 350 Torr.Type: GrantFiled: November 4, 2002Date of Patent: April 26, 2005Assignee: Applied Materials, Inc.Inventors: Lee Luo, R. Suryanarayanan Iyer, Janardhanan Anand Subramony, Errol Antonio C. Sanchez, Xiaoliang Jin, Aihua Chen, Chang-Lian Yan, Nobuo Tokai, Yuji Maeda, Randhir P. Singh Thakur
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Patent number: 6878406Abstract: A process for reacting a gaseous species with a substrate includes placing the substrate in a space, heating the space, introducing the gaseous species into the space, and cooling the space. Introducing the gaseous species into the space includes introducing the gaseous species into the space before the substrate reaches a steady state temperature and/or reacting the gaseous species with the substrate includes reacting the gaseous species with the substrate while cooling the space.Type: GrantFiled: April 5, 2002Date of Patent: April 12, 2005Assignee: LSI Logic CorporationInventor: Alfred A. Badowski
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Patent number: 6855484Abstract: A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.Type: GrantFiled: February 25, 2003Date of Patent: February 15, 2005Assignee: Applied Materials, Inc.Inventors: Francimar Campana, Srinivas Nemani, Michael Chapin, Shankar Venkataraman
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Patent number: 6852406Abstract: An anti-static, anti-reflection, transparent coating for a transpatent substrate, the coating including at least one electrically conductive layer, wherein the sheet resistance of the coating is less than about 1010 ohm/square. The coating is preferably higher transparent.Type: GrantFiled: January 3, 2001Date of Patent: February 8, 2005Assignee: Sola International Holdings, Ltd.Inventors: Nadine Genevieve Marechal, Richard Simon Blacker
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Patent number: 6852373Abstract: A method for depositing a dielectric material on copper apparent on the surface of a structure, by placing the structure in a depositing chamber of CVD type (Chemical Vapor Deposition), adding to the chamber a first gas forming a precursor for the formation of the dielectric material and containing an element able to contaminate copper, adding to the chamber a second gas containing a chemical element intended, together with the element contained in the first gas and able to contaminate copper, to form said dielectric material, the second gas being able to react with the first gas to give the deposit of dielectric material, performing the deposit of dielectric material from the first gas and the second gas, characterized in that the method comprises a step for adding a third gas able to prevent the contamination of copper by said element contained in the first gas.Type: GrantFiled: July 3, 2000Date of Patent: February 8, 2005Assignees: Commissariat a l'Energie Atomique, STMicroelectronics SAInventors: Pascale Motte, Joaquim Torres, Brigitte Descouts, Jean Palleau
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Patent number: 6846515Abstract: A method for providing a porous organosilica glass (OSG) film that consists of a single phase of a material represented by the formula SivOwCxHyFz, v+w+x+y+z=100%, v is from 10 to 35 atomic %, w is from 10 to 65 atomic %, x is from 5 to 30 atomic %, y is from 10 to 50 atomic % and z is from 0 to 15 atomic %, wherein the film has pores and a dielectric constant less than 2.6 is disclosed herein. In one aspect of the present invention, the film is provided by a chemical vapor deposition method in which a preliminary film is deposited from organosilane and/or organosiloxane precursors and pore-forming agents (porogens), which can be independent of, or alternatively bonded to, the precursors. The porogens are subsequently removed to provide the porous film. In another aspect of the present invention, porogenated precursors are used for providing the film.Type: GrantFiled: May 17, 2002Date of Patent: January 25, 2005Assignee: Air Products and Chemicals, Inc.Inventors: Raymond Nicholas Vrtis, Mark Leonard O'Neill, Jean Louise Vincent, Aaron Scott Lukas, Manchao Xiao, John Anthony Thomas Norman
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Patent number: 6838124Abstract: There is provided an array of fluoro-substituted silsesquioxane thin film precursors having a structure wherein fluoro groups are bonded to the silicon atoms of a silsesquioxane cage. In a first aspect, the present invention provides a composition comprising a vaporized material having the formula [F—SiO1.5]x[H—SiO1.5]y, wherein x+y=n, n is an integer between 2 and 30, x is an integer between 1 and n and y is a whole number between 0 and n. Also provided are films made from these precursors and objects comprising these films.Type: GrantFiled: May 16, 2002Date of Patent: January 4, 2005Assignee: Honeywell International Inc.Inventor: Nigel P. Hacker
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Patent number: 6835417Abstract: The ALD process chamber has heating radiation sources and the process sequence includes rapid temperature changes on a substrate surface of a substrate arranged in the ALD process chamber. The temperature changes are controlled and the ALD and CVD processes are optimized by in situ temperature steps, for example in order to produce nanolaminates.Type: GrantFiled: February 27, 2003Date of Patent: December 28, 2004Assignee: Infineon Technologies AGInventors: Annette Saenger, Bernhard Sell, Harald Seidl, Thomas Hecht, Martin Gutsche
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Patent number: 6827978Abstract: A method of forming a composite tungsten film on a substrate is described. The composite tungsten film comprises sequentially deposited tungsten nucleation layers and tungsten bulk layers. Each of the tungsten nucleation layers and the tungsten bulk layers have a thickness less than about 300 Å. The tungsten nucleation layers and the tungsten bulk layers are formed one over the other until a desired thickness for the composite tungsten film is achieved. The resulting composite tungsten film exhibits good film morphology. The tungsten nucleation layers may be formed using a cyclical deposition process by alternately adsorbing a tungsten-containing precursor and a reducing gas on the substrate. The tungsten bulk layers may be formed using a chemical vapor deposition (CVD) process by thermally decomposing a tungsten-containing precursor.Type: GrantFiled: February 11, 2002Date of Patent: December 7, 2004Assignee: Applied Materials, Inc.Inventors: Hyungsuk A. Yoon, Hongbin Fang, Michael X. Yang
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Patent number: 6821825Abstract: Chemical vapor deposition processes utilize chemical precursors that allow for the deposition of thin films to be conducted at or near the mass transport limited regime. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional chemical precursors. In preferred embodiments, a higher order silane is employed to deposit thin films containing silicon that are useful in the semiconductor industry in various applications such as transistor gate electrodes.Type: GrantFiled: February 11, 2002Date of Patent: November 23, 2004Assignee: ASM America, Inc.Inventors: Michael A. Todd, Mark Hawkins
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Patent number: 6821566Abstract: A method of forming an insulating film containing silicon oxy-nitride includes a loading step, temperature raising step, oxidation step, cycle purge step, and annealing step, in this order. The temperature raising step is performed while supplying nitrogen gas and oxygen gas for preventing a silicon layer surface from being nitrided, at a supply ratio 100:1 to 1000:1. The oxidation step is performed at a temperature of 700 to 950° C. while supplying a gas that contains 1 to 5 vol % of water vapor and 95 to 99 vol % of nitrogen gas, to form a silicon oxide film. The annealing step is performed at a temperature of 800 to 950° C. while supplying a gas that contains 10 to 100 vol % of nitrogen monoxide gas, to convert a portion of the silicon oxide film into silicon oxy-nitride.Type: GrantFiled: November 20, 2002Date of Patent: November 23, 2004Assignee: Tokyo Electron LimitedInventors: Genji Nakamura, Yoshihide Tada, Masayuki Imai, Asami Suemura, Shingo Hishiya
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Patent number: 6821641Abstract: An article protected by a thermal barrier coating system includes a substrate having a substrate surface, and a thermal barrier coating system overlying the substrate. The thermal barrier coating system has a thermal barrier coating formed of a thermal barrier coating material arranged as a plurality of columnar grains extending generally perpendicular to the substrate surface and having grain surfaces. A sintering inhibitor is within the columnar grains, either uniformly distributed or concentrated at the grain surfaces. The sintering inhibitor is lanthanum oxide, lanthanum chromate, chromium oxide, and/or yttrium chromate, mixtures thereof, mixtures thereof with aluminum oxide, modifications thereof wherein cobalt or manganese is substituted for chromium, precursors thereof, and reaction products thereof.Type: GrantFiled: October 22, 2001Date of Patent: November 23, 2004Assignee: General Electric CompanyInventors: Robert William Bruce, Nicholas Hamilton Burlingame
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Patent number: 6818257Abstract: Systems to achieve both more uniform and particle free DLC deposition is disclosed which automatically cycles between modes to effect automatic removal of carbon-based buildups or which provides barriers to achieve proper gas flow involves differing circuitry and design parameter options. One ion source may be used in two different modes whether for DLC deposition or not through automatic control of gas flow types and rates and through the control of the power applied to achieve maximum throughput or other desired processing goals. Arcing can be controlled and even permitted to optimize the overall results achieved.Type: GrantFiled: September 17, 2002Date of Patent: November 16, 2004Assignee: Advanced Energy Industries, Inc.Inventors: Michael S. Amann, Michael Kishinevsky, Andrew Shabalin, Colin Quinn
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Patent number: 6815014Abstract: A process for creating plasma polymerized deposition on a substrate by a corona discharge is described. The corona discharge is created between an electrode and a counterelectrode supporting a substrate. A mixture of a balance gas and a working gas is flowed rapidly through the electrode, plasma polymerized by corona discharge, and deposited onto the substrate as an optically clear coating or to create surface modification. The process, which is preferably carried out at or near atmospheric pressure, can be designed to create an optically clear powder-free or virtually powder free deposit of polymerized plasma that provides a substrate with properties such as surface modification, chemical resistance, and barrier to gases.Type: GrantFiled: February 3, 2003Date of Patent: November 9, 2004Assignee: Dow Global Technologies Inc.Inventors: Aaron M. Gabelnick, Richard T. Fox, Ing-Feng Hu, Dmitry P. Dinega
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Patent number: 6797323Abstract: A method of forming a silicon oxide layer comprising initiating formation of a silicon oxide layer on a surface of a silicon layer by an oxidation method using wet gas at an ambient temperature at which no silicon atom is eliminated from the surface of the silicon layer, and then, forming the silicon oxide layer up to a predetermined thickness by an oxidation method using wet gas.Type: GrantFiled: November 26, 1997Date of Patent: September 28, 2004Assignee: Sony CorporationInventors: Akihide Kashiwagi, Kazuhiko Tokunaga, Toshihiko Suzuki, Hideki Kimura, Toyotaka Kataoka, Atsushi Suzuki, Shinji Tanaka
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Patent number: 6797334Abstract: In order to deopsit a high-grade and extra-thin film without causing damage to the substrate at a relatively low temperature, the present invention provides a method for forming a cluster which is a lumpy group of atoms or molecules of a reactive substance at the room temperature under the atmospheric pressure, irradiating electrons onto clusters, irradiating the resulting cluster ions onto a substrate surface by accelerating by an acceleration voltage, and at the same time or alternately, irradiating one or more component gases of the deposit film onto the substrate surface, thereby depositing a thin film on the substrate surface through reaction.Type: GrantFiled: August 27, 2003Date of Patent: September 28, 2004Assignees: Research Development Corporation of Japan, Sanyo Electric Co., Ltd.Inventors: Makoto Akizuki, Mitsuaki Harada, Satoru Ogasawara, Atsumasa Doi, Isao Yamada, Jiro Matsuo
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Patent number: 6797336Abstract: The present invention is a method and apparatus for the synthesis of multi-component substances, comprising entities of at least two elements, molecules, grains, crystals, structural units, or phases of matter, in which the scale of the distribution of the elements, molecules, or phases of matter may range from on the order of nanometers or less, to about one millimeter, depending upon the specific materials and process conditions that are chosen. The method and apparatus of the present invention further provides processes for preparing these compositions of matter as thin films or particles.Type: GrantFiled: July 1, 2002Date of Patent: September 28, 2004Assignee: AMBP Tech CorporationInventors: James F. Garvey, Gary S. Tompa, Stuart G. MacDonald, Robert L. DeLeon
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Patent number: 6787181Abstract: A method of forming a Bi-layered superlattice material on a substrate using chemical vapor deposition of a precursor solution of trimethylbismuth and a metal compound dissolved in an organic solvent. The precursor solution is heated and vaporized prior to deposition of the precursor solution on an integrated circuit substrate by chemical vapor deposition. No heating steps including a temperature of 650° C. or higher are used.Type: GrantFiled: October 26, 2001Date of Patent: September 7, 2004Assignees: Symetrix Corporation, Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoshi Uchiyama, Narayan Solayappan, Carlos A. Paz de Araujo
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Patent number: 6773750Abstract: A process for chemical vapor deposition includes depositing a film using a metal &bgr;-diketonate complex and an &agr;, &bgr;-unsaturated alcohol. The metal &bgr;-diketonate complex and the &agr;, &bgr;-unsaturated alcohol is contacted on the substrate at the same time, at different times or alternately.Type: GrantFiled: April 25, 2003Date of Patent: August 10, 2004Assignee: Tri Chemical Laboratory Inc.Inventors: Hiroshi Funakubo, Yasushi Murakami, Hideaki Machida
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Patent number: 6756085Abstract: Low dielectric constant materials with improved elastic modulus and material hardness. The process of making such materials involves providing a dielectric material and ultraviolet (UV) curing the material to produce a UV cured dielectric material. UV curing yields a material with improved modulus and material hardness. The improvement is each typically greater than or about 50%. The UV cured dielectric material can optionally be post-UV treated. The post-UV treatment reduces the dielectric constant of the material while maintaining an improved elastic modulus and material hardness as compared to the UV cured dielectric material. UV cured dielectrics can additionally exhibit a lower total thermal budget for curing than for furnace curing processes.Type: GrantFiled: July 21, 2003Date of Patent: June 29, 2004Assignee: Axcelis Technologies, Inc.Inventors: Carlo Waldfried, Qingyuan Han, Orlando Escorcia, Ivan L. Berry, III
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Patent number: 6749905Abstract: A method for creating an optical structure includes forming a layer of chalcogenide material upon a substrate, and applying a patterned stamper to the layer of chalcogenide material, in the presence of heat, the patterned stamper causing the layer of chalcogenide material to reflow such that stamped features of the patterned stamper are transferred onto the layer of chalcogenide material. The stamped features onto the layer of chalcogenide material are used to form one of an optical waveguide, an optical mirror, digital video disk data, compact disk data and combinations comprising at least one of the foregoing.Type: GrantFiled: February 19, 2003Date of Patent: June 15, 2004Assignee: General Electric CompanyInventors: Eric Breitung, John Reitz, George Dalakos
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Patent number: 6746709Abstract: The invention relates to a method for manufacture of a semiconductor component by the formation of a hydrogenous layer containing silicon on a substrate comprising or containing silicon such as a wafer or film. In order to achieve a good surface and volume passivation, it is proposed that during formation of the siliceous layer in the form of SiNxOy with 0<x≦1.5 and 0≦y≦2 one or more catalytically acting dopants are selectively added into the layer which release hydrogen from the SiNxOy layer. The concentration C of the dopants is 1×1014 cm3≦C≦1021 cm3.Type: GrantFiled: October 18, 2002Date of Patent: June 8, 2004Assignee: RWE Schott Solar GmbHInventors: Thomas Lauinger, Ingo Schwirtlich, Jens Moschner
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Patent number: 6733830Abstract: Chemical vapor deposition processes result in films having low dielectric constants when suitable chemical precursors are utilized. Preferred chemical precursors include siloxanes, (fluoroalkyl)fluorosiloxanes, (fluoroalkyl)silanes, (alkyl)fluorosilanes, (fluoroalkyl)fluorosilanes, alkylsiloxysilanes, alkoxysilanes, alkylalkoxysilanes, silylmethanes, alkoxysilylmethanes, alkylalkoxysilylmethanes, alkoxymethanes, alkylalkoxymethanes, and mixtures thereof. The precursors are particularly suited to thermal CVD for producing low dielectric constant films at relatively low temperatures, particularly without the use of additional oxidizing agents. Such films are useful in the microelectronics industry.Type: GrantFiled: February 7, 2001Date of Patent: May 11, 2004Assignee: ASM Japan K.K.Inventor: Michael A. Todd
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Patent number: 6726954Abstract: In a method and a system for forming a copper thin film in which a raw material gas is introduced into a substrate processing chamber storing a substrate and being under a reduced pressure to form a copper thin film on the substrate, an addition gas is introduced into the substrate processing chamber in addition to the raw material gas at the initial stage of deposition. Thereafter, the introduction of the addition gas is stopped, while the introduction of the raw material gas is continued. Alternatively, an addition gas is introduced into the substrate processing chamber before the start of the deposition process, and the addition gas is introduced into the substrate processing chamber in addition to the raw material gas at the initial stage of deposition. Thereafter, the introduction of the addition gas is stopped, while the introduction of the raw material gas is continued.Type: GrantFiled: June 6, 2001Date of Patent: April 27, 2004Assignee: ANELVA CorporationInventors: Minjuan Zhang, Akiko Kobayashi, Toshiaki Sasaki, Susumu Akiyama, Atsushi Sekiguchi
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Patent number: 6723389Abstract: A coated cemented carbide excellent in peel strength includes a cemented carbide substrate comprising a hard phase containing tungsten carbide and a binder phase, and a hard film being provided on a surface of the substrate with a single layer or two or more laminated layers, wherein (1) at least part of the surface of the substrate is subjected to machining, and (2)(i) substantially no crack is present in particles of the hard phase existing at an interface of the surface of the substrate subjected to machining and the hard film and/or (2)(ii) peak intensities of crystal surfaces satisfy hs(001)wc/hs(101)wc≧1.1×hi(001)wc/hi(101)wc wherein hs(001)wc and hs(101)wc each represent a peak intensity of (001) crystal face and that of (101) crystal face at the surface of the substrate subjected to machining processing, respectively, and hi(001)wc and hi(101)wc each represent a peak intensity of (001) crystal face and that of (101) crystal face in the substrate, respectively.Type: GrantFiled: December 20, 2001Date of Patent: April 20, 2004Assignee: Toshiba Tungaloy Co., Ltd.Inventors: Masaki Kobayashi, Hiroshi Kitada
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Patent number: 6716484Abstract: A method and device of treating an irregularly shaped article to prepare the article for painting is provided. The device includes a burner which can produce an adjustable flame tongue which can fit into crevices, openings and other irregular topographical features of an item to be painted or otherwise coated. The burner device further provides means to apply a grafting chemical on a freshly oxidized surface. Further, the invention provides means to colorize treated objects so that they may be recognized as having been treated. In another embodiment, the grafting chemicals may be enhanced with electrolytic solutions such that electrostatic methods of painting may be subsequently employed on the item. In an alternate embodiment, the burner is adapted to spray a powder inside of a generally enclosed flame, and is used in conjunction with chop guns to manufacture glass or carbon fiber preforms.Type: GrantFiled: November 26, 2002Date of Patent: April 6, 2004Assignee: Patent Holding CompanyInventors: Russell Brynolf, Michael D. Elberson
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Publication number: 20040038068Abstract: A multi-layer coating including a polymeric basecoat layer wherein the polymer of the basecoat layer is cured at subatmospheric pressure.Type: ApplicationFiled: August 26, 2002Publication date: February 26, 2004Inventors: John G. Finch, Joseph A. Elmer, Daniel E. Ford, Patrick A. Sullivan, Robert C. Bishop
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Patent number: 6676994Abstract: Thin films are produced by a method wherein a material is heated in a furnace placed inside a vacuum system. An inert gas is flown over/through the heated material. The vapors of the material are entrained in the carrier gas which is then directed onto a substrate heated to a temperature below that of the furnace temperature and placed in close proximity to the exit of the furnace.Type: GrantFiled: March 28, 2001Date of Patent: January 13, 2004Assignee: University of DelawareInventors: Robert W. Birkmire, Erten Eser, Gregory M. Hanket, Brian E. McCandless
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Patent number: 6669989Abstract: The invention relates to a method and apparatus for the production of protective coatings on parts. A coating formed in accordance with the invention has a chemical composition and structure gradient across its thickness. The coating is obtained by heating of a composite ingot including a body and at least one insert disposed within the body. As the composite ingot is heated it sequentially evaporates to produce a vapor with a chemical composition varying over the evaporation time period. The composition of the body and composition and location of the insert within the body function to determine the chemical composition of the vapor at any time. Condensation and/or deposition of the vapor onto a substrate forms the inventive coating.Type: GrantFiled: November 7, 2001Date of Patent: December 30, 2003Assignee: International Center for Electron Beam Technologies of E. O. Paton Electric Welding InstituteInventors: Boris A. Movchan, Leonila M. Nerodenko, Jury E. Rudoy
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Patent number: 6660656Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.Type: GrantFiled: September 19, 2001Date of Patent: December 9, 2003Assignee: Applied Materials Inc.Inventors: David Cheung, Wai-Fan Yau, Robert P. Mandal, Shin-Puu Jeng, Kuo-Wei Liu, Yung-Cheng Lu, Michael Barnes, Ralf B. Willecke, Farhad Moghadam, Tetsuya Ishikawa, Tze Wing Poon
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Patent number: 6660341Abstract: A liquid crystal display device includes an alignment layer with constituent materials. The constituent materials have a stoichiometric relationship configured to provide a given pretilt angle. Liquid crystal material is provided in contact with the alignment layer. A method for forming an alignment layer for liquid crystal displays includes forming the alignment layer on a substrate by introducing an amount of material to adjust a stoichiometric ratio of constituent materials wherein the amount is determined to provide a given pretilt angle to the alignment layer. Ions are directed at the alignment layer to provide uniformity of the pretilt angle.Type: GrantFiled: June 7, 2001Date of Patent: December 9, 2003Assignee: International Business Machines CorporationInventors: Paul S. Andry, Praveen Chaudhari, James P. Doyle, Eileen A. Galligan, James A. Lacey, Shui-Chih A. Lien, Minhua Lu
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Patent number: 6660375Abstract: A thin-film magnet formed from a gas-phase reaction of tetracyanoetheylene (TCNE) OR (TCNQ), 7,7,8,8-tetracyano-P-quinodimethane, and a vanadium-containing compound such as vanadium hexcarbonyl (V(CO)6) and bis(benzene)vanalium (V(C6H6)2) and a process of forming a magnetic thin film upon at least one substrate by chemical vapor deposition (CVD) at a process temperature not exceeding approximately 90° C. and in the absence of a solvent. The magnetic thin film is particularly suitable for being disposed upon rigid or flexible substrates at temperatures in the range of 40° C. and 70° C. The present invention exhibits air-stable characteristics and qualities and is particularly suitable for providing being disposed upon a wide variety of substrates.Type: GrantFiled: November 27, 2002Date of Patent: December 9, 2003Assignee: University of Utah Research FoundationInventors: Joel S. Miller, Kostyantyn I. Pokhodnya
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Patent number: 6635310Abstract: A thermal processing method of the invention includes; a loading step of loading an object to be processed into a processing container, the object having a surface provided with a silicon film having a minutely irregular profile; and a doping step of introducing phosphorus atoms in the silicon film as impurities, by using PH3 gas as a doping gas while maintaining a temperature of 550 to 750° C.Type: GrantFiled: April 26, 2001Date of Patent: October 21, 2003Assignee: Tokyo Electron LimitedInventors: Hitoshi Kato, Yoshiyuki Fujita, Yukio Tojo, Toshitake Tsuda