Coating Formed From Vaporous Or Gaseous Phase Reaction Mixture (e.g., Chemical Vapor Deposition, Cvd, Etc.) Patents (Class 427/255.28)
  • Patent number: 11075059
    Abstract: A deposition apparatus includes a deposition gas supply unit including an opening and closing valve. The deposition gas supply unit is configured to selectively supply a source gas or a mixture gas into a chamber. A cleaning gas supply unit is configured to supply a cleaning gas into the chamber. A deposition head includes a first deposition head including a first nozzle configured to supply the source gas and the cleaning gas and a second deposition head including a second nozzle configured to supply the source gas, the mixture gas, and the cleaning gas. An exhaust unit is configured to discharge the cleaning gas and remaining source and mixture gases from the chamber. A cleaning gas valve unit is configured to be selectively opened and closed to supply the cleaning gas to at least any one of the first deposition head and the second deposition head.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: July 27, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junggon Kim, Sunghun Key, Choelmin Jang, Myungsoo Huh
  • Patent number: 11060184
    Abstract: Ferroelectric barium titanate (BaTiO3) epitaxial films grown by metal-organic chemical vapor deposition using a barium precursor having a low melting point and a stable vapor pressure.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: July 13, 2021
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Bruce W. Wessels, Young Kyu Jeong
  • Patent number: 11000879
    Abstract: Provided is a method and apparatus for treating a substrate with a liquid. The substrate treating method comprises a pre-treating step for supplying the treatment liquid containing hydrogen fluoride (HF) to the substrate and treating the substrate before the surface modification step and a surface modification step for supplying an alkene-based chemical onto a substrate to change the surface of the substrate to a hydrophobic state. As a result, the surface of the substrate is uniform, and generation of particles can be reduced when the substrate is removed.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: May 11, 2021
    Assignee: SEMES CO., LTD.
    Inventor: Byungsun Bang
  • Patent number: 10984991
    Abstract: Described herein is a technique capable of capable of managing a substrate processing apparatus efficiently. According to one aspect of the technique of the present disclosure, there is provided a substrate processing apparatus including: process performing parts configured to process a substrate based on a program; a first controller configured to process the program; and a second controller configured to control the process performing parts based on data received from the first controller, wherein the first controller is further configured to determine whether or not a first controller provided in an additional substrate processing apparatus is malfunctioning based on operation data of the first controller provided in the additional substrate processing apparatus, and to perform an alternative control for the first controller provided in the additional substrate processing apparatus when it is determined that the first controller provided in the additional substrate processing apparatus is malfunctioning.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: April 20, 2021
    Assignee: KOKUSAI ELECTRIC CORPORATION
    Inventors: Yasuhiro Mizuguchi, Shun Matsui
  • Patent number: 10964512
    Abstract: Exemplary semiconductor processing systems may include a processing chamber, and may include a remote plasma unit coupled with the processing chamber. Exemplary systems may also include a mixing manifold coupled between the remote plasma unit and the processing chamber. The mixing manifold may be characterized by a first end and a second end opposite the first end, and may be coupled with the processing chamber at the second end. The mixing manifold may define a central channel through the mixing manifold, and may define a port along an exterior of the mixing manifold. The port may be fluidly coupled with a first trench defined within the first end of the mixing manifold. The first trench may be characterized by an inner radius at a first inner sidewall and an outer radius, and the first trench may provide fluid access to the central channel through the first inner sidewall.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: March 30, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Mehmet Tugrul Samir, Dongqing Yang, Dmitry Lubomirsky
  • Patent number: 10875101
    Abstract: A surface-coated cutting tool includes a substrate and a coating film that coats the substrate, wherein the coating film includes a hard coating layer constituted of a domain region and a matrix region, the domain region is a region having a plurality of portions divided and distributed in the matrix region, the domain region has a structure in which a first layer composed of a first Alx1Ti(1-x1) compound and a second layer composed of a second Alx2Ti(1-x2) compound are layered on each other, the matrix region has a structure in which a third layer composed of a third Alx3Ti(1-x3) compound and a fourth layer composed of a fourth Alx4Ti(1-x4) compound are layered on each other, the first AlTi compound and the second AlTi compound have a cubic crystal structure, the third AlTi compound and the fourth AlTi compound have a cubic crystal structure.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: December 29, 2020
    Assignee: Sumitomo Electric Hardmetal Corp.
    Inventors: Anongsack Paseuth, Yasuki Kido, Susumu Okuno, Shinya Imamura
  • Patent number: 10859745
    Abstract: The vehicle mirror includes a high-Re retardation film and a reflective layer. The high-Re retardation film has a front retardation of 5,000 nm or more, and the reflective layer is a reflective layer that is reflective in an unpolarized manner, such as a reflective metal layer. The vehicle mirror may be a vehicle mirror further including an image display device, wherein the high-Re retardation film, the reflective layer, and the image display device are disposed in this order, and the reflective layer is transflective.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: December 8, 2020
    Assignee: FUJIFILM Corporation
    Inventors: Takao Taguchi, Kazuhiro Oki, Mitsuyoshi Ichihashi
  • Patent number: 10850324
    Abstract: Disclosed herein are structures comprising a titanium, zirconium, or hafnium powder particle with titanium carbide, zirconium carbide, or hafnium carbide (respectively) nano-whiskers grown directly from and anchored to the powder particle. Also disclosed are methods for fabrication of such structures, involving heating the powder particles and exposing the particles to an organic gas.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: December 1, 2020
    Assignees: Consolidated Nuclear Security, LLC, UT-Battelle, LLC
    Inventors: Roland D. Seals, Paul A. Menchhofer, James O. Kiggans, Jr.
  • Patent number: 10847463
    Abstract: Methods for forming a copper seed layer having improved anti-migration properties are described herein. In one embodiment, a method includes forming a first copper layer in a feature, forming a ruthenium layer over the first copper layer in the feature, and forming a second copper layer on the ruthenium layer in the feature. The ruthenium layer substantially locks the copper layer there below in place in the feature, preventing substantial physical migration thereof.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: November 24, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zhiyuan Wu, Meng Chu Tseng, Mehul B. Naik, Ben-Li Sheu
  • Patent number: 10832904
    Abstract: Disclosed are methods and systems for providing oxygen doped silicon carbide. A layer of oxygen doped silicon carbide can be provided under process conditions that employ one or more silicon-containing precursors that have one or more silicon-hydrogen bonds and/or silicon-silicon bonds. The silicon-containing precursors may also have one or more silicon-oxygen bonds and/or silicon-carbon bonds. One or more radical species in a substantially low energy state can react with the silicon-containing precursors to form the oxygen doped silicon carbide film. The one or more radical species can be formed in a remote plasma source.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: November 10, 2020
    Assignee: Lam Research Corporation
    Inventor: Bhadri N. Varadarajan
  • Patent number: 10790188
    Abstract: Methods for filling a substrate feature with a seamless ruthenium gap fill are described. The methods include depositing a ruthenium film, oxidizing the ruthenium film to form an oxidized ruthenium film, reducing the oxidized ruthenium film to a reduced ruthenium film and repeating the oxidation and reduction processes to form a seamless ruthenium gap fill.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: September 29, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Nasrin Kazem, Jeffrey W. Anthis, David Thompson
  • Patent number: 10760159
    Abstract: Methods for depositing a yttrium-containing film through an atomic layer deposition process are described. Some embodiments of the disclosure utilize a plasma-enhanced atomic layer deposition process. Also described is an apparatus for performing the atomic layer deposition of the yttrium containing films.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: September 1, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Lakmal C. Kalutarage, Mark Saly, Thomas Knisley, Benjamin Schmiege, David Thompson
  • Patent number: 10724140
    Abstract: A thermal chemical vapor deposition (CVD) system includes a bottom chamber, an upper chamber, a workpiece support, a heater and at least one shielding plate. The upper chamber is present over the bottom chamber. The upper chamber and the bottom chamber define a chamber space therebetween. The workpiece support is configured to support a workpiece in the chamber space. The heater is configured to apply heat to the workpiece. The shielding plate is configured to at least partially shield the bottom chamber from the heat.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Chan Lo, Yi-Fang Lai, Po-Hsiung Leu, Ding-I Liu, Si-Wen Liao, Kai-Shiung Hsu, Jheng-Uei Hsieh, Shian-Huei Lin, Jui-Fu Hsu, Cheng-Tsung Wu
  • Patent number: 10723749
    Abstract: Metal complexes containing substituted allyl ligands and methods of using such metal complexes to prepare metal-containing films are provided.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: July 28, 2020
    Assignee: MERCK PATENT GMBH
    Inventors: Bin Xi, Joby Eldo, Charles Dezelah, Ravi Kanjolia, Guo Liu
  • Patent number: 10727070
    Abstract: A low resistance middle-of-line interconnect structure is formed without liner layers. A contact metal layer is deposited on source/drain regions of field-effect transistors and directly on the surfaces of trenches within a dielectric layer using plasma enhancement. Contact metal fill is subsequently provided by thermal chemical vapor deposition. The use of low-resistivity metal contact materials such as ruthenium is facilitated by the process. The process further facilitates the formation of metal silicide regions on the source/drain regions.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: July 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Praneet Adusumilli, Alexander Reznicek, Oscar van der Straten, Chih-Chao Yang
  • Patent number: 10593871
    Abstract: Methods for forming tunnel barrier layers are provided, including a method comprising exposing a surface of a material, the surface free of oxygen, to an initial water pulse for a pulse time and at a pulse temperature, the pulse time and pulse temperature selected to maximize hydroxylation of the surface; and exposing the hydroxylated surface to alternating, separated pulses of precursors under conditions to induce reactions between the hydroxylated surface and the precursors to form a tunnel barrier layer on the surface of the material via atomic layer deposition (ALD), the tunnel barrier layer having an average thickness of no more than 1 nm and being formed without an intervening interfacial layer between the tunnel barrier layer and the surface of the material.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: March 17, 2020
    Assignee: UNIVERSITY OF KANSAS
    Inventors: Judy Z. Wu, Jamie Wilt, Ryan Goul, Jagaran Acharya
  • Patent number: 10577691
    Abstract: Disclosed are methods of depositing films of material on multiple semiconductor substrates in a multi-station processing chamber. The methods may include loading a first set of one or more substrates into the processing chamber at a first set of one or more process stations and depositing film material onto the first set of substrates by performing N cycles of film deposition. Thereafter, the methods may further include transferring the first set of substrates from the first set of process stations to a second set of one or more process stations, loading a second set of one or more substrates at the first set of process stations, and depositing film material onto the first and second sets of substrates by performing N? cycles of film deposition, wherein N? is not equal to N. Also disclosed are apparatuses and computer-readable media which may be used to perform similar operations.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: March 3, 2020
    Assignee: Lam Research Corporation
    Inventors: Romuald Nowak, Hu Kang, Adrien LaVoie, Jun Qian
  • Patent number: 10566610
    Abstract: A method of manufacturing a negative electrode for a non-aqueous electrolyte secondary battery includes the following. A negative electrode composite material layer including a planar region and a side-surface region is formed. An application material is prepared by mixing heat-resistant particles, thermoplastic resin particles, and a solvent. A planar coating film is formed by applying the application material to the planar region and a side-surface coating film is formed by applying the application material to the side-surface region. At least some of the thermoplastic resin particles are molten into a melt by heating the planar coating film at a temperature not lower than a melting point of the thermoplastic resin particles. A negative electrode is manufactured by drying the planar coating film containing the melt and the side-surface coating film containing the thermoplastic resin particles at a temperature lower than the melting point of the thermoplastic resin particles.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: February 18, 2020
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Atsushi Sugihara
  • Patent number: 10541142
    Abstract: A plasma processing apparatus includes a support structure configured to support a workpiece and a first drive device configured to rotate the support structure about a first axis extending in a direction orthogonal to a vertical direction. The support structure includes a holding unit including an electrostatic chuck and a container provided under the holding unit. The container includes a tubular container body, and a bottom cover configured to close a bottom side opening of the container body and to be detachable from the container body. A maintenance method includes: rotating a support structure about a first axis such that the bottom cover is positioned above an electrostatic chuck, removing the bottom cover from the container body, and maintaining a component provided in the container body.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: January 21, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Kazuya Matsumoto, Yuki Hosaka, Mitsunori Ohata, Takashi Yamamoto
  • Patent number: 10522467
    Abstract: There is provided a ruthenium wiring, including: a TiON film formed as a base film in a recess formed in a predetermined film on a surface of a substrate; and a ruthenium film formed on the TiON film so as to fill the recess.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: December 31, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Tadahiro Ishizaka, Toshiaki Fujisato, Cheonsoo Han
  • Patent number: 10520768
    Abstract: A novel display panel that is highly convenient or reliable is provided. A novel input/output panel that is highly convenient or reliable is provided. A novel data processing device that is highly convenient or reliable is provided. The display panel includes a layer containing a liquid crystal material, a first pixel, a second pixel, and an anti-reflection structure. The layer containing a liquid crystal material includes a first region, a second region, and a third region. The first pixel includes the first region. The second pixel includes the second region. The anti-reflection structure includes a region overlapping with the third region. The anti-reflection structure has a function of reducing reflectance of visible light which enters through the layer containing a liquid crystal material.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: December 31, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daisuke Kubota, Masaru Nakano, Hiroyuki Miyake
  • Patent number: 10472714
    Abstract: Provided are methods and systems for providing silicon carbide class of films. The composition of the silicon carbide film can be controlled by the choice of the combination of precursors and the ratio of flow rates between the precursors. The silicon carbide films can be deposited on a substrate by flowing two different organo-silicon precursors to mix together in a reaction chamber. The organo-silicon precursors react with one or more radicals in a substantially low energy state to form the silicon carbide film. The one or more radicals can be formed in a remote plasma source.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: November 12, 2019
    Assignee: Novellus Systems, Inc.
    Inventor: Bhadri N. Varadarajan
  • Patent number: 10392701
    Abstract: The present disclosure relates to a superhydrophobic coating material and a method for manufacturing the superhydrophobic coating material. The superhydrophobic coating material according to the present disclosure includes a substrate provided with a three-dimensional nano structure; and a coating layer comprising a rare earth metal oxide formed on the three-dimensional nano structure. The method for manufacturing the superhydrophobic coating material according to the present disclosure includes preparing a substrate provided with a three-dimensional nano structure; and forming a coating layer comprising a rare earth metal oxide on the three-dimensional nano structure by supplying a precursor including a rare earth metal and an oxidant one by one onto the substrate, and the temperature of the substrate is controlled in the forming step so that an atomic ratio of a carbon element in the coating layer is less than 1% to form the coating layer with superhydrophobic property.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: August 27, 2019
    Assignee: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Hyungjun Kim, Il-Kwon Oh, Han-Bo-Ram Lee
  • Patent number: 10319862
    Abstract: Described herein are apparatus comprising one or more silicon-containing layers and a metal oxide layer. Also described herein are methods for forming one or more silicon-containing layers to be used, for example, as passivation layers in a display device. In one particular aspect, the apparatus comprises a transparent metal oxide layer, a silicon oxide layer and a silicon nitride layer. In this or other aspects, the apparatus is deposited at a temperature of 350° C. or below. The silicon-containing layers described herein comprise one or more of the following properties: a density of about 1.9 g/cm3 or greater; a hydrogen content of about 4×1022 cm?3 or less, and a transparency of about 90% or greater at 400-700 nm as measured by a UV-visible light spectrometer.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: June 11, 2019
    Assignee: VERSUM MATERIALS US, LLC
    Inventors: Robert Gordon Ridgeway, Andrew David Johnson, Anupama Mallikarjunan, Raymond Nicholas Vrtis, Xinjian Lei, Mark Leonard O'Neill, Manchao Xiao, Jianheng Li, Michael T. Savo
  • Patent number: 10283404
    Abstract: Provided are methods of forming diffusion barriers and adhesion layers for interconnects such as cobalt (Co) interconnects or ruthenium (Ru) interconnects. The methods involve selective deposition of tungsten carbon nitride (WCN) films on the oxide surfaces of a feature including a Co surface. The selective growth of WCN on oxide allows the contact resistance at an interface such as a Co—Co interface or a Co—Ru interface to be significantly reduced while maintaining good film coverage, adhesion, and/or barrier properties on the sidewall oxide surfaces.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: May 7, 2019
    Assignee: Lam Research Corporation
    Inventors: Jeong-Seok Na, Megha Rathod, Chiukin Steven Lai, Raashina Humayun
  • Patent number: 10249489
    Abstract: Low dielectric organosilicon films are deposited by a process comprising the steps of: providing a substrate within a vacuum chamber; introducing into the vacuum chamber a gaseous silicon containing precursor composition comprising at least one organosilicon precursor selected from the group consisting of Formula (I) and Formula (II): wherein, R1, R2, R3, R4, R5, and R6 are as defined herein, and applying energy to the gaseous structure forming composition in the vacuum chamber to induce reaction of the at least one organosilicon precursor to deposit a film on at least a portion of the substrate.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: April 2, 2019
    Assignee: VERSUM MATERIALS US, LLC
    Inventors: Raymond Nicholas Vrtis, Robert Gordon Ridgeway, Jennifer Lynn Anne Achtyl, William Robert Entley, Dino Sinatore, Kathleen Esther Theodorou, Andrew J. Adamczyk
  • Patent number: 10161040
    Abstract: A showerhead is provided. The showerhead includes a body and a plurality of first dispersion pins. The body has one side having a plurality of injection holes penetrated therethrough and the other side facing the one side. The plurality of first dispersion pins protruding from the plurality of spray holes of the one side to the other side such that end portions thereof support the other side. The first dispersion holes have first gas inlet holes on one side and first passages connected to the first gas inlet holes therein. Gas introduced between the one side and the other side is immediately discharged to the outside of the body through the plurality of spray holes by passing the first gas inlet holes and the first passages.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: December 25, 2018
    Assignee: Korea Institute of Industrial Technology
    Inventors: Chul Soo Byun, Il Yong Chung
  • Patent number: 10156014
    Abstract: A gas treatment apparatus includes: a mounting part of a substrate; a gas diffusion plate of a processing gas; gas dispersion parts forming a diffusion space of the processing gas between the gas dispersion parts and the gas diffusion plate; and a flow path having an upstream side forming a common flow path of the gas dispersion parts and a downstream side connected to each of the gas dispersion parts, lengths from the common flow path to respective of the gas dispersion parts being aligned, wherein centers of the gas dispersion parts are located around a central portion of the diffusion space, and the gas dispersion parts are arranged along first circles with two or more of the gas dispersion parts arranged on each of the first circles and distances from the central portion of the diffusion space to the centers of gas dispersion parts being different from one another.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 18, 2018
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takashi Kakegawa, Yuichi Furuya, Daisuke Toriya
  • Patent number: 10131680
    Abstract: The present disclosure provides a Group 4 metal element-containing novel alkoxy compound, a method of preparing the Group 4 metal element-containing alkoxy compound, a precursor composition including the Group 4 metal element-containing alkoxy compound for depositing a film, and a method of depositing a Group 4 metal element-containing film using the precursor composition.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: November 20, 2018
    Assignee: UP CHEMICAL CO., LTD.
    Inventors: Won Seok Han, Wonyong Koh, Myeong-Ho Park
  • Patent number: 10118940
    Abstract: An alkoxide compound represented by the following formula (I), and a raw material for thin film formation containing the alkoxide compound. In the formula, R1 represents a linear or branched alkyl group having 2 to 4 carbon atoms, and R2 and R3 each represent a linear or branched alkyl group having 1 to 4 carbon atoms. In the formula (I), R1 is preferably an ethyl group. It is also preferred that one or both of R2 and R3 be an ethyl group. The raw material for thin film formation including an alkoxide compound represented by general formula (I) is preferably used as a raw material for chemical vapor deposition.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: November 6, 2018
    Assignee: ADEKA CORPORATION
    Inventors: Senji Wada, Akio Saito, Tomoharu Yoshino
  • Patent number: 10060031
    Abstract: Provided is a deposition apparatus including a connection channel connecting a gas inflow channel and a gas outflow channel so as to increase cleaning efficiency by providing a portion of cleaning gas to the dead space of the gas inflow channel and controlling a flow of a cleaning gas.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: August 28, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Dae Youn Kim, Sang-Jin Jeong, Hyun Soo Jang, Young Hoon Kim, Jeong Ho Lee
  • Patent number: 10040960
    Abstract: There are provided a silver ink composition which is capable of forming metallic silver having sufficient electrical conductivity without carrying out a heat treatment at high temperatures; and a conductor and communication device which are obtained using this silver ink composition.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: August 7, 2018
    Assignee: TOPPAN FORMS CO., LTD.
    Inventors: Takuya Sekiguchi, Keiko Omata
  • Patent number: 10008576
    Abstract: A method of controlling the facet height of raised source/drain epi structures using multiple spacers, and the resulting device are provided. Embodiments include providing a gate structure on a SOI layer; forming a first pair of spacers on the SOI layer adjacent to and on opposite sides of the gate structure; forming a second pair of spacers on an upper surface of the first pair of spacers adjacent to and on the opposite sides of the gate structure; and forming a pair of faceted raised source/drain structures on the SOI, each of the faceted source/drain structures faceted at the upper surface of the first pair of spacers, wherein the second pair of spacers is more selective to epitaxial growth than the first pair of spacers.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: June 26, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: George Robert Mulfinger, Xusheng Wu
  • Patent number: 10008381
    Abstract: Some embodiments include methods of forming rutile-type titanium oxide. A monolayer of titanium nitride may be formed. The monolayer of titanium nitride may then be oxidized at a temperature less than or equal to about 550° C. to convert it into a monolayer of rutile-type titanium oxide. Some embodiments include methods of forming capacitors that have rutile-type titanium oxide dielectric, and that have at least one electrode comprising titanium nitride. Some embodiments include thermally conductive stacks that contain titanium nitride and rutile-type titanium oxide, and some embodiments include methods of forming such stacks.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: June 26, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Nik Mirin, Tsai-Yu Huang, Vishwanath Bhat, Chris M. Carlson, Vassil N. Antonov
  • Patent number: 9997364
    Abstract: A method for etching a layer in a processing chamber is provided. A plurality of cycles is provided, where each cycle comprises a deposition phase, a clearing phase, and an etching phase. The deposition phase comprises flowing a deposition gas comprising a fluorocarbon or hydrofluorocarbon gas into the processing chamber, maintaining a deposition phase pressure of at least 50 mTorr, transforming the deposition gas into a plasma, and stopping the deposition phase. The clearing phase comprises flowing a clearing gas comprising a halogen containing gas into the processing chamber, maintaining a clearing phase pressure of less than 40 mTorr, transforming the clearing gas into a plasma, and stopping the clearing phase. The etching phase comprises flowing an etching gas comprising a halogen containing gas into the processing chamber, maintaining an etching phase pressure of at least 30 mTorr, transforming the etching gas into a plasma, and stopping the etching phase.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: June 12, 2018
    Assignee: Lam Research Corporation
    Inventors: William Thie, Jisoo Kim
  • Patent number: 9997405
    Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. Pre-inhibition and post-inhibition treatments are used to modulate the inhibition effect, facilitating feature fill using inhibition across a wide process window. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate and wordline fill, and 3-D integration using through-silicon vias.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: June 12, 2018
    Assignee: Lam Research Corporation
    Inventors: Anand Chandrashekar, Esther Jeng, Raashina Humayun, Michal Danek, Juwen Gao, Deqi Wang
  • Patent number: 9970103
    Abstract: The present invention relates to a film composed of a carbon-containing silicon oxide formed by CVD using, as the raw material, an organosilicon compound having a secondary hydrocarbon group directly bonded to at least one silicon atom and having an atomic ratio of 0.5 or less oxygen atom with respect to 1 silicon atom, which is used as a sealing film for a gas barrier equipment and materials, an FPD device, a semiconductor device and the like.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: May 15, 2018
    Assignee: TOSOH CORPORATION
    Inventors: Daiji Hara, Masato Shimizu
  • Patent number: 9938622
    Abstract: Methods for depositing ruthenium by a PECVD process are described herein. Methods for depositing ruthenium can include positioning a substrate in a processing chamber, the substrate having a barrier layer formed thereon, heating and maintaining the substrate at a first temperature, flowing a first deposition gas into a processing chamber, the first deposition gas comprising a ruthenium containing precursor, generating a plasma from the first deposition gas to deposit a first ruthenium layer over the barrier layer, flowing a second deposition gas into the processing chamber to deposit a second ruthenium layer over the first ruthenium layer, the second deposition gas comprising a ruthenium containing precursor, depositing a copper seed layer over the second ruthenium layer and annealing the substrate at a second temperature.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: April 10, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tae Hong Ha, Sang Ho Yu, Kiejin Park
  • Patent number: 9911593
    Abstract: A method for fabricating an NAND flash memory includes providing a semiconductor substrate with a core region and a peripheral region, forming a plurality of discrete gate stack structures in the core region with neighboring gate stack structures separated by a first dielectric layer. The method further includes forming a flowable dielectric layer on the first dielectric layer and the gate stack structures, and forming a solid dielectric layer through a solidification treatment process performed on the flowable dielectric layer. Voids and seams formed in the top portion of the first dielectric layer are filled by the solid dielectric layer. The method also includes removing the solid dielectric layer and a portion of the first dielectric layer to expose a top portion of the gate stack structures, and forming a metal silicide layer on each gate stack structure.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: March 6, 2018
    Assignees: SEIMCONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Erhu Zheng, Shiliang Ji, Yiying Zhang
  • Patent number: 9893283
    Abstract: The present invention relates to a vapor deposition device for forming a film on a substrate, including: a vapor deposition chamber; a vapor deposition unit including a vapor deposition mask provided with an opening for pattern formation; and a transport mechanism that is configured to transfer at least one of the substrate and the vapor deposition unit relative to the other in a first direction perpendicular to the normal direction of the vapor deposition mask and that is configured to cause the substrate to rest temporarily at a resting position relative to the vapor deposition unit. The substrate includes a vapor-deposition-target region, and the region does not overlap the opening of the vapor deposition mask when the substrate is at the resting position. The vapor deposition chamber is provided with a first vent and a second vent.
    Type: Grant
    Filed: November 27, 2014
    Date of Patent: February 13, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yuhki Kobayashi, Katsuhiro Kikuchi, Shinichi Kawato, Takashi Ochi, Satoshi Inoue, Kazuki Matsunaga, Eiichi Matsumoto, Masahiro Ichihara
  • Patent number: 9873662
    Abstract: Provided are a metal precursor containing an oxime group, which is represented by general formula 1, and a metal precursor ink containing same. The metal precursor ink according to the present invention enhance metal content, induce intramolecular and/or intermolecular complexation, thereby enabling low temperature sintering with excellent solubility and stability. The metal precursor ink according to the present invention can be used to form a metal wire with a desired shape. Therefore, the metal precursor ink can find applications in the field of printed electronics, particularly various electrodes, such as mesh type transparent electrodes.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: January 23, 2018
    Assignee: PESOLVE CO., LTD.
    Inventors: Hyun Nam Cho, Hyun Ju Kim
  • Patent number: 9850571
    Abstract: The invention belongs to the technical field of inorganic compounds, and particularly, relates to a method for directly preparing graphene by taking CBr4 as a source material and using methods such as molecular-beam epitaxy (MBE) or chemical vapor deposition (CVD). A method for preparing graphene comprises the following steps: selecting a proper material as a substrate; directly depositing a catalyst and CBr4 on a surface of the substrate; and performing annealing treatment on the sample obtained through deposition. Compared with other technologies, an innovative point of the method in the invention is that the catalyst and CBr4 source can be quantitatively and controllably deposited on any substrate, and the catalyst and CBr4 source react on the surface of the substrate to form the graphene, so that the dependence of the graphene growth on a substrate material can be reduced to a great extent, and different substrate materials can be selected according to different application backgrounds.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: December 26, 2017
    Assignee: SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCES
    Inventors: Shumin Wang, Qian Gong, Xiaoming Xie, Hailong Wang, Zengfeng Di, Guqiao Ding, Qingbo Liu
  • Patent number: 9803278
    Abstract: A vapor phase growth method is disclosed. The method includes a step of preparing a substrate in a chamber, a first step of absorbing only a first element to the substrate by supplying a first source material into the chamber, a second step of suspending supply of the first source material into the chamber, a third step of absorbing a second element to the substrate by supplying a second source material into the chamber, wherein the supply of the second source material is started while the first source material remains in an atmosphere of the chamber, a fourth step of suspending supply of the second source material into the chamber, and a fifth step of repeating from the first step to the fourth step.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: October 31, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Chihoko Mizue
  • Patent number: 9783887
    Abstract: The invention is related to an apparatus and a method for processing a surface of a substrate by exposing the surface of the substrate to alternating surface reactions of at least a first starting material and a second starting material according to the principles of atomic layer deposition method. According to the invention a first starting material is fed on the surface of the substrate locally by means of a source by moving the source in relation to the substrate, and the surface of the substrate processed with the first starting material is exposed to a second starting material present in the atmosphere surrounding the source.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: October 10, 2017
    Assignee: BENEQ OY
    Inventors: Pekka Soininen, Sami Sneck
  • Patent number: 9711370
    Abstract: A method of processing a substrate is provided. A substrate is placed on a turntable provided in a process chamber. The process chamber includes a process area for supplying an etching gas and a purge area for supplying a purge gas. The process area and the purge area are arranged along a rotational direction of the turntable and divided from each other. The etching gas is supplied into the process area. The purge gas is supplied into the purge area. The turntable rotates to cause the substrate placed on the turntable to pass through the process area and the purge area once per revolution, respectively. A film deposited on a surface of the substrate is etched when the substrate passes the process are. An etching rate of the etching or a surface roughness of the film is controlled by changing a rotational speed of the turntable.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: July 18, 2017
    Assignee: Tokyo Electron Limited
    Inventors: Shigehiro Miura, Hitoshi Kato, Jun Sato, Hiroyuki Kikuchi
  • Patent number: 9704971
    Abstract: A method of controlling the facet height of raised source/drain epi structures using multiple spacers, and the resulting device are provided. Embodiments include providing a gate structure on a SOI layer; forming a first pair of spacers on the SOI layer adjacent to and on opposite sides of the gate structure; forming a second pair of spacers on an upper surface of the first pair of spacers adjacent to and on the opposite sides of the gate structure; and forming a pair of faceted raised source/drain structures on the SOI, each of the faceted source/drain structures faceted at the upper surface of the first pair of spacers, wherein the second pair of spacers is more selective to epitaxial growth than the first pair of spacers.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: July 11, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: George Robert Mulfinger, Xusheng Wu
  • Patent number: 9601533
    Abstract: A method of manufacturing a solid-state imaging apparatus, comprising preparing a semiconductor substrate including a photoelectric conversion portion and a structure which includes an insulating member formed on the photoelectric conversion portion and a wiring pattern formed in the insulating member, forming a film made of SiC and/or SiCN on the structure, forming an opening immediately above the photoelectric conversion portion by removing part of the film and part of the insulating member, and depositing a member in the opening and on the film, and forming a light-guide portion by polishing the member so as to expose the film.
    Type: Grant
    Filed: June 3, 2014
    Date of Patent: March 21, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Tsukagoshi, Shunsuke Nakatsuka, Takayasu Kanesada
  • Patent number: 9561523
    Abstract: The present invention is directed to a method of forming a polymer coating on a substrate. The method comprising the steps of providing in an evacuated reaction chamber a substrate having a surface to be coated; and providing a first source of polymer forming material and a second source of radicals. According to the invention the first source and the second source are separated from each other and from the reaction chamber, and the polymer forming material as well as the radicals are, at least temporarily, conducted contemporaneously but spatially separated to the substrate's surface, so that a reaction of the polymer forming material with the radicals is avoided before they reach the substrate's surface. Further, the present invention is directed to a device for carrying out the method according to the invention.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: February 7, 2017
    Assignee: Luxembourg Institute of Science and Technology (LIST)
    Inventor: Damien Lenoble
  • Patent number: 9543517
    Abstract: Described herein is a method and precursor composition for depositing a multicomponent film. In one embodiment, the method and composition described herein is used to deposit a germanium-containing film such as Germanium Tellurium, Antimony Germanium, and Germanium Antimony Tellurium (GST) films via an atomic layer deposition (ALD) and/or other germanium, tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. In this or other embodiments, the Ge precursor used trichlorogermane.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: January 10, 2017
    Assignee: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Xinjian Lei, Moo-Sung Kim
  • Patent number: 9508543
    Abstract: A thin film having a low dielectric constant and a high resistance to HF at a low temperature range is formed with high productivity. A film containing a predetermined element, oxygen and at least one of carbon and nitrogen is formed on a substrate by performing, a predetermined number of times, a cycle comprising: (a) supplying a source gas containing the predetermined element to the substrate; and (b) supplying a reaction gas containing nitrogen, carbon and oxygen to the substrate.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: November 29, 2016
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Yugo Orihashi, Yoshiro Hirose