Making Electrical Device Patents (Class 430/311)
  • Patent number: 9341469
    Abstract: A continuous scan type measuring apparatus includes a continuous scan type optical application measuring instrument, a single-axis measuring instrument scanning stage and two carrier stages. The continuous scan type optical application measuring instrument performs a surface shape measurement of a measuring object. The single-axis measuring instrument scanning stage carries the optical application measuring instrument and causes the optical application measuring instrument to perform continuous scanning along a predetermined direction. The two carrier stages are detachably mount respective measuring objects thereon and move independently of each other. The two carrier stages are positioned independently at one of a measurement position within a scanning range of the optical application measuring instrument and a replacement position of the measuring objects.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: May 17, 2016
    Assignee: TAKAOKA TOKO CO., LTD.
    Inventor: Mitsuhiro Ishihara
  • Patent number: 9304399
    Abstract: A resist composition includes: a crosslinking material that is crosslinked in the presence of an acid; an acid amplifier; and a solvent.
    Type: Grant
    Filed: May 16, 2014
    Date of Patent: April 5, 2016
    Assignee: SONY CORPORATION
    Inventors: Nobuyuki Matsuzawa, Isao Mita, Koji Arimitsu
  • Patent number: 9295162
    Abstract: A non-deleterious method for producing a continuous conductive circuit upon a non-conductive substrate can begin with the application of a metallic base layer upon a surface of a non-conductive substrate. A circuit pattern can be created within the metallic base layer based upon a circuit design. The metallic base layer comprising the circuit pattern can be physically separated from the remainder of the metallic base layer on the non-conductive substrate. The region of the non-conductive substrate surface that encloses the circuit pattern can be called the plating region. The remainder of the non-conductive substrate surface can be called the non-plating region. A first metal layer can be added upon the metallic base layer. A second metal layer can be added upon the first metal layer of the plating region. The second metal layer can be electrically conductive and restricted from forming on the first metal layer of the non-plating region.
    Type: Grant
    Filed: January 7, 2014
    Date of Patent: March 22, 2016
    Assignee: Taiwan Green Point Enterprises Co., Ltd.
    Inventors: Sheng-Hung Yi, Pen-Yi Liao
  • Patent number: 9291754
    Abstract: A method for producing a mold includes: applying a block copolymer solution made of first and second polymers on a base member; performing a first annealing process at a temperature higher than Tg of the block copolymer after drying the coating film; forming a concavity and convexity structure on the base member by removing the second polymer by an etching process; performing a second annealing process of the concavity and convexity structure at a temperature higher than Tg of the first polymer; forming a seed layer on the structure; laminating or stacking a metal layer on the seed layer by an electroforming; and peeling off the metal layer from the base member. The second annealing process enables satisfactory transfer of a concavity and convexity structure on the base member onto the metal layer.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: March 22, 2016
    Assignees: JX NIPPON OIL & ENERGY CORPORATION, TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Satoshi Masuyama, Madoka Takahashi, Suzushi Nishimura, Maki Fukuda, Takashi Seki
  • Patent number: 9281191
    Abstract: To improve the performance of a semiconductor device, a semiconductor device manufacturing method includes an exposing process of performing pattern exposure of a resist film formed on a substrate by using EUV light reflected from a front surface of an EUV mask as a reflective mask. In this exposing process, the resist film is subjected to pattern exposure by repeating a process of irradiating the resist film with the EUV light by changing a focal position of the EUV light with which the resist film is irradiated, along a film thickness direction of the resist film. After this exposing process, the resist film subjected to pattern exposure is developed to form a resist pattern.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: March 8, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Toshihiko Tanaka
  • Patent number: 9263285
    Abstract: There is provided a composition for forming a resist underlayer film having heat resistance for use in a lithography process in semiconductor device production. A composition for forming a resist underlayer film, comprising a polymer that contains a unit structure of formula (1) and a unit structure of formula (2) in a proportion of 3 to 97:97 to 3 in molar ratio: A method for producing a semiconductor device, including the steps of: forming an underlayer film using the composition for forming a resist underlayer film on a semiconductor substrate; forming a hard mask on the underlayer film; further forming a resist film on the hard mask; forming a patterned resist film and developing; etching the hard mask according to the patterned resist film; etching the underlayer film according to the patterned hard mask; and processing the semiconductor substrate according to the patterned underlayer film.
    Type: Grant
    Filed: December 5, 2011
    Date of Patent: February 16, 2016
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Tetsuya Shinjo, Hiroaki Okuyama, Keisuke Hashimoto, Yasunobu Someya, Ryo Karasawa, Masakazu Kato
  • Patent number: 9245789
    Abstract: The present invention addresses the problem of inhibiting the evolution of a poisoning gas to eliminate wiring-pattern resolution failures and thereby forming a desired wiring layer structure to provide functional elements having an improved property yield. This method for forming multi-layered copper interconnect on a semiconductor substrate comprises: forming a multilayer resist structure to form a given resist pattern on a substrate including an interlayer dielectric film that has via holes which have been formed in part thereof and filled with an SOC layer, the multilayer resist structure comprising an SOC layer, an SOG layer, an SiO2 layer, and a chemical amplification type resist superposed in this order from the substrate side; conducting etching using the resist pattern as a mask to form a pattern for a wiring layer and via plugs; and forming the wiring layer and the via plugs in the pattern.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: January 26, 2016
    Assignee: NEC CORPORATION
    Inventors: Koichiro Okamoto, Munehiro Tada, Hiromitsu Hada, Toshitsugu Sakamoto
  • Patent number: 9239498
    Abstract: The present invention provides a liquid crystal display device, which includes a plurality of pixel units. Each of the pixel units further includes a liquid crystal layer, a pixel electrode and a corresponding electrode. The pixel electrode and the corresponding electrode are disposed on two opposite sides of liquid crystal layer. The corresponding electrode further includes a first electrode pattern disposed oppositely to the pixel electrode, and a second electrode pattern connected to the first electrode pattern for applying an external voltage to the first electrode pattern so as to form an alignment electric field for the liquid crystal layer between the first electrode pattern and the pixel electrode. The present invention changes the way in which the external voltage is applied, and introduces the external voltage from one side of the color filter substrate to improve success rate of liquid crystal alignment, reduce energy-consumption and reduce waste.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: January 19, 2016
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd
    Inventors: Bing-jei Liao, Chialiang Lin
  • Patent number: 9213238
    Abstract: An orthogonal process for photolithographic patterning organic structures is disclosed. The disclosed process utilizes fluorinated solvents or supercritical CO2 as the solvent so that the performance of the organic conductors and semiconductors would not be adversely affected by other aggressive solvent. One disclosed method may also utilize a fluorinated photoresist together with the HFE solvent, but other fluorinated solvents can be used. In one embodiment, the fluorinated photoresist is a resorcinarene, but various fluorinated polymer photoresists and fluorinated molecular glass photoresists can be used as well. For example, a copolymer perfluorodecyl methacrylate (FDMA) and 2-nitrobenzyl methacrylate (NBMA) is a suitable orthogonal fluorinated photoresist for use with fluorinated solvents and supercritical carbon dioxide in a photolithography process.
    Type: Grant
    Filed: August 28, 2014
    Date of Patent: December 15, 2015
    Assignee: Cornell University
    Inventors: Christopher K. Ober, George Malliaras, Jin-Kyun Lee, Alexander Zakhidov, Margarita Chatzichristidi, Priscilla Dodson
  • Patent number: 9212293
    Abstract: Provided are photoresist overcoat compositions, substrates coated with the overcoat compositions and methods of forming electronic devices by a negative tone development process. The compositions, coated substrates and methods find particular applicability in the manufacture of semiconductor devices.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: December 15, 2015
    Assignee: Rohm and Haas Electronic Materials LLC
    Inventors: Young Cheol Bae, Rosemary Bell, Jong Keun Park, Seung-Hyun Lee
  • Patent number: 9207531
    Abstract: According to one embodiment, a pattern including first and second block phases is formed by self-assembling a block copolymer onto a film to be processed. The entire block copolymer present in a first region is removed under a first condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in a region other than the first region. The first block phase present in a second region is selectively removed under a second condition by carrying out energy beam irradiation and development, thereby leaving a pattern including the first and second block phases in an overlap region between a region other than the first region and a region other than the second region, and leaving a pattern of second block phase in the second region excluding the overlap region. The film is etched with the left patterns as masks.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroko Nakamura, Koji Asakawa, Shigeki Hattori, Satoshi Tanaka, Toshiya Kotani
  • Patent number: 9202702
    Abstract: A semiconductor device having a substrate, and at least one contact, situated on and/or above a surface of the substrate, having at least one layer made of a conductive material, the conductive material including at least one metal. The layer made of the conductive material is sputtered on, and has tear-off marks on at least one outer side area between an outer base area facing the surface and an outer contact area facing away from the surface. A manufacturing method for a semiconductor device having at least one contact is also described.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: December 1, 2015
    Assignee: ROBERT BOSCH GMBH
    Inventors: Frederik Schrey, Achim Trautmann, Joachim Rudhard
  • Patent number: 9193180
    Abstract: A pattern formation method includes a first step of forming a film having a flat surface on an uneven structure including a concave portion exhibiting liquid repellency and a convex portion exhibiting lyophilic properties so as to cover the concave portion and the convex portion; and a second step of forming a pattern by drying the film.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: November 24, 2015
    Assignee: FUJIFILM Corporation
    Inventor: Kimiaki Miyamoto
  • Patent number: 9196726
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; forming a lightly doped drain in the substrate; and performing a first implantation process for implanting fluorine ions at a tiled angle into the substrate and part of the gate structure.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: November 24, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Cun Ke, Chih-Wei Yang, Chia-Fu Hsu
  • Patent number: 9182670
    Abstract: A polymer comprising 0.5-10 mol % of recurring units having acid generating capability and 50-99.5 mol % of recurring units providing for dissolution in alkaline developer is used to formulate a chemically amplified negative resist composition. When used in a lithography process, the composition exhibits a high resolution and forms a negative resist pattern of a profile with minimized LER and undercut.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: November 10, 2015
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Keiichi Masunaga, Daisuke Domon, Satoshi Watanabe
  • Patent number: 9165782
    Abstract: It is aimed to enhance adhesiveness between a resist pattern formed on a resist underlayer film and to reduce an undercut of the resist pattern. An additive for a resist underlayer film-forming composition, including: a polymer having a structural unit of Formula (1): (where R1 is a hydrogen atom or a methyl group; L is a divalent linking group; X is an acyloxy group having an amino group protected with a tert-butoxycarbonyl group or a nitrogen heterocycle protected with a tert-butoxycarbonyl group).
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: October 20, 2015
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Takafumi Endo, Rikimaru Sakamoto, Noriaki Fujitani
  • Patent number: 9158205
    Abstract: The disclosure relates to an optical arrangement for three-dimensionally patterning a radiation-sensitive material layer, such as a projection exposure apparatus for microlithography. The optical arrangement includes a mask for forming a three-dimensional radiation pattern, a substrate with the radiation-sensitive material layer, and a projection optical unit for imaging the three-dimensional radiation pattern from the mask into the radiation-sensitive material layer. The optical arrangement is designed to compensate for spherical aberrations along the thickness direction of the radiation-sensitive material layer in order to generate a stigmatic image of the three-dimensional radiation pattern.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: October 13, 2015
    Assignee: Carl Zeiss SMT GmbH
    Inventor: Heiko Feldmann
  • Patent number: 9152046
    Abstract: A method for fabricating a semiconductor product includes applying a photo-resist layer to a substrate, the photo-resist layer including a higher acid concentration at an upper portion of the photo-resist layer than at a lower portion of the photo-resist layer. The method also includes exposing the photo-resist layer to a light source through a mask including a feature, the photo-resist layer including a floating, diffusing acid that will diffuse into a region of the photo-resist layer affected by the feature while not diffusing into a feature formed by the mask.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: October 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Chang, Ming-Feng Shieh, Wen-Hung Tseng
  • Patent number: 9141751
    Abstract: A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: September 22, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Jong Lee, Soo-Han Choi, Jung-Ho Do, Chul-Hong Park, Sang-Pil Sim
  • Patent number: 9136506
    Abstract: A thin-film transistor array substrate, an organic light-emitting display having the same, and a method of manufacturing the organic light-emitting display are disclosed. In one embodiment, the thin-film transistor array substrate includes a buffer layer formed on a substrate, a first insulating layer formed on the buffer layer, a pixel electrode formed on the first insulating layer using a transparent conductive material, an intermediate layer that covers an upper side and outer side-surfaces of the pixel electrode and includes a organic light-emitting layer, a gap formed by etching the first insulating layer and the buffer layer at a peripheral of the pixel electrode, and a facing electrode that is formed on an upper side and outer side-surfaces of the pixel electrode to cover the intermediate layer and the gap.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: September 15, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dae-Woo Kim, Jong-Hyun Park, Yul-Kyu Lee
  • Patent number: 9136146
    Abstract: The present invention generally provides semiconductor substrates having submicronsized surface features generated by irradiating the surface with ultra short laser pulses. In one aspect, a method of processing a semiconductor substrate is disclosed that includes placing at least a portion of a surface of the substrate in contact with a fluid, and exposing that surface portion to one or more femtosecond pulses so as to modify the topography of that portion. The modification can include, e.g., generating a plurality of submicron-sized spikes in an upper layer of the surface.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: September 15, 2015
    Assignee: President And Fellows Of Harvard College
    Inventors: Eric Mazur, Mengyan Shen
  • Patent number: 9128379
    Abstract: Provided are photoresist overcoat compositions, substrates coated with the overcoat compositions and methods of forming electronic devices by a negative tone development process. The compositions, coated substrates and methods find particular applicability in the manufacture of semiconductor devices.
    Type: Grant
    Filed: March 30, 2014
    Date of Patent: September 8, 2015
    Inventors: Young Cheol Bae, Rosemary Bell, Jong Keun Park, Seung-Hyun Lee
  • Patent number: 9122164
    Abstract: An immersion lithography resist material comprising a matrix polymer having a first polarity and an additive having a second polarity that is substantially greater than the first polarity. The additive may have a molecular weight that is less than about 1000 Dalton. The immersion lithography resist material may have a contact angle that is substantially greater than the contact angle of the matrix polymer.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: September 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Ching-Yu Chang
  • Patent number: 9117824
    Abstract: Embodiments of the invention include a semiconductor structure containing a back end of line randomly patterned interconnect structure for implementing a physical unclonable function (PUF), a method for forming the semiconductor device, and a circuit for enabling the interconnect structure to implement the physical unclonable function. The method includes forming a semiconductor substrate and a dielectric layer on the substrate. The randomly patterned interconnect structure is formed in the dielectric layer. The random pattern of the interconnect structure is used to implement the physical unclonable function and is a result of defect occurrences during the manufacturing of the semiconductor structure. The circuit includes n-channel and p-channel metal oxide semiconductor field effect transistors (MOSFETs) and the randomly patterned interconnect structure, which acts as electrical connections between the MOSFETs.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: August 25, 2015
    Assignee: International Business Machines Corporation
    Inventors: Kai D. Feng, Wai-Kin Li, Ping-Chuan Wang, Zhijian Yang
  • Patent number: 9117765
    Abstract: Embodiments of mechanisms of forming a semiconductor device structure are provided. The method includes providing a substrate, forming a first material layer on the substrate, forming a second material layer on the first material layer and forming a first PR layer on the second material layer. The method includes exposing a portion of the first PR layer to a first radiation beam and forming a second PR layer on the first PR layer. The method includes exposing a portion of the second PR layer to a second radiation beam and developing the first PR layer and the second PR layer to form a patterned first PR layer and a patterned second PR layer. The method includes etching a portion of the first material layer and the second material layer by using the patterned first PR layer and the patterned second PR layer as a mask.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: August 25, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Chi Kuo, Tsung-Hsien Lee
  • Patent number: 9104099
    Abstract: There is herein described curable coatings for use in a photoimaging process. In particular, there is described curable coatings in the form of 100% or substantially 100% solids energy curable coatings for use in a photoimaging process wherein a substrate is covered with a wet curable photopolymer and the photoimaged substrate is used to form images such as electrical circuits or other features used in the Photochemical Machining Industry (PCMI) such as for example lines, squares, spirals, circles, or other geometric and non-geometric shapes.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 11, 2015
    Assignee: Rainbow Technology Systems, Ltd.
    Inventors: Charles Jonathan Kennett, John Cunningham, Robert Gibson
  • Patent number: 9105476
    Abstract: To improve the manufacturing yield of semiconductor devices. Over a semiconductor wafer, a film to be processed is formed; over that film, an antireflection film is formed; and, over the antireflection film, a resist layer is formed. Then, the resist layer is subjected to liquid immersion exposure, and a development and rinsing process to form a resist pattern. After that, the antireflection film and the film to be processed are etched sequentially using the resist pattern as an etching mask. In the development process of the resist layer, the antireflection film is exposed from parts from which the resist layer has been removed by the development process. When performing a rinsing process after the development, the water repellent property of the surface of the antireflection film exposed from the resist layer is not lower than the water repellent property of the surface of the resist layer.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: August 11, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Takuya Hagiwara
  • Patent number: 9101070
    Abstract: A multilayer printed wiring board includes a core substrate, a resin insulation layer laminated on the core substrate and a capacitor section coupled to the resin insulating layer. The capacitor section includes a first electrode including a first metal and configured to be charged by a negative charge, and a second electrode including a second metal and opposing the first electrode, the second electrode configured to be charged by a positive charge. A dielectric layer is interposed between the first electrode and second electrode, and an ionization tendency of the first metal is larger than and ionization tendency of the second metal.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: August 4, 2015
    Assignee: IBIDEN CO., LTD.
    Inventors: Hironori Tanaka, Keisuke Shimizu
  • Patent number: 9081286
    Abstract: Provided is a pattern forming method including, in the following order: (1) forming a resist film on a substrate; (2) exposing the resist film, and thereby forming a first line-and-space latent image; (3) subjecting the resist film in which the first line-and-space latent image has been formed, to a first heating treatment; (4) exposing the resist film that has been subjected to the first heating treatment, and thereby forming a second line-and-space latent image, so that the line direction in the second line-and-space latent image intersects the line direction in the first line-and-space latent image; (5) subjecting the resist film in which the second line-and-space latent image has been formed, to a second heating treatment; and (6) developing the resist film that has been subjected to the second heating treatment, using a developer containing an organic solvent.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: July 14, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Tadahiro Odani, Ryosuke Ueba
  • Patent number: 9069258
    Abstract: A mask may include a circuit area and a pixel area. The circuit area includes a circuit pattern. The pixel area includes a pixel pattern which is extended in a length direction and an assist pattern which is at an end portion of the pixel pattern and adjacent to the circuit area.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 30, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Bong-Yeon Kim, Min Kang, Seung-Bo Shim, Jong-kwang Lee, Jin-Ho Ju, Jeong-Won Kim, Tae-Gyun Kim, Chul-Won Park, Jun-Hyuk Woo, Hyun-Joo Lee
  • Patent number: 9064084
    Abstract: Enhancements in lithography for forming an integrated circuit are disclosed. The enhancements include a topography analysis of a design data file to obtain accumulative topography information for different mask levels. The topography information facilitates topography driven optical proximity correction and topography driven lithography.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: June 23, 2015
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Ushasree Katakamsetty, Yang Qing, Wee Kwong Yeo, Chiu Wing Hui, Shyue Fong Quek, Valerio Perez
  • Patent number: 9060415
    Abstract: A method for producing a substrate having a surface nanostructure, including a forming, on a substrate, a layer containing a block copolymer having a plurality of blocks bonded together, and subsequently heating this layer to cause phase separation of the layer; a decomposing at least a portion of the phase including at least one block of the plurality of blocks that constitute the block copolymer of this layer; and immersing the layer in a developing solution and selectively removing the phase containing the decomposed block(s), the developing solution containing, as the main component, an organic solvent having an SP value of 7.5 to 11.5 (cal/cm3)1/2 and a vapor pressure at 25° C. that is less than 2.1 kPa, or benzene which may be substituted with an alkyl group, an alkoxy group or a halogen atom.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: June 16, 2015
    Assignees: Riken, Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Shigenori Fujikawa, Harumi Hayakawa, Takahiro Senzaki, Ken Miyagi
  • Patent number: 9051405
    Abstract: A resin containing a structural unit derived from a compound represented by the formula (aa) wherein T, R1 and Z1 are defined, in the specification.
    Type: Grant
    Filed: June 22, 2010
    Date of Patent: June 9, 2015
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Koji Ichikawa, Yusuke Fuji, Satoshi Yamaguchi
  • Publication number: 20150147688
    Abstract: There is provided a pattern forming method comprising (1) a step of forming a film by using an actinic ray-sensitive or radiation-sensitive resin composition containing (P) a resin having a repeating unit represented by the specific formula, (2) a step of exposing the film by using an actinic ray or radiation, and (3) a step of developing the exposed film by using an organic solvent-containing developer to form a negative pattern, wherein the content of the repeating unit represented by the specific formula is 25 mol % or more based on all repeating units in the resin (P).
    Type: Application
    Filed: January 23, 2015
    Publication date: May 28, 2015
    Applicant: FUJIFILM Corporation
    Inventors: Natsumi YOKOKAWA, Shuji HIRANO, Wataru NIHASHI, Hiroo TAKIZAWA
  • Publication number: 20150147699
    Abstract: The pattern forming method of the present invention includes (i) forming a film using an actinic ray-sensitive or radiation-sensitive resin composition which contains a resin (A) which has a repeating unit including a group capable of generating a polar group by being decomposed due to an action of an acid and a repeating unit including a carboxyl group, a compound (B) which generates an acid according to irradiation with actinic rays or radiation, and a solvent (C); (ii) exposing the film using a KrF excimer laser, extreme ultraviolet rays, or an electron beam; and (iii) forming a negative tonetone pattern by developing the exposed film using a developer which includes an organic solvent.
    Type: Application
    Filed: January 28, 2015
    Publication date: May 28, 2015
    Applicant: FUJIFILM CORPORATION
    Inventors: Sou KAMIMURA, Hidenori TAKAHASHI, Keita KATO
  • Patent number: 9041909
    Abstract: The present invention provides an exposure apparatus and an exposure method. The method comprises: utilizing an exposure light source to provide light rays to the photo-resist layer, wherein the light rays pass through the mask and the transparent substrate to reach the photo-resist layer; and utilizing a reflective plate to reflect the light rays passing through the transparent substrate and the photo-resist layer back to the photo-resist layer. The present invention can reduce a line space of a pattern of the photo-resist layer.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: May 26, 2015
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Minghung Shih, Jehao Hsu, Jingfeng Xue
  • Patent number: 9040231
    Abstract: A pattern forming method contains: (i) a step of forming a bottom anti-reflective coating on a substrate by using a first resin composition (I), (ii) a step of forming a resist film on the bottom anti-reflective coating by using a second resin composition (II), (iii) a step of exposing a multi-layered film having the bottom anti-reflective coating and the resist film, and (iv) a step of developing the bottom anti-reflective coating and the resist film in the exposed multi-layered film by using an organic solvent-containing developer to form a negative pattern.
    Type: Grant
    Filed: April 21, 2014
    Date of Patent: May 26, 2015
    Assignee: FUJIFILM Corporation
    Inventors: Keita Kato, Michihiro Shirakawa, Tadahiro Odani, Atsushi Nakamura, Hidenori Takahashi, Kaoru Iwato
  • Publication number: 20150140479
    Abstract: A method of processing a semiconductor wafer may include providing a rotatably alignable photolithography mask that includes different mask images. Each mask image may be in a corresponding different mask sector. The method may also include performing a series of exposures with the rotatably alignable photolithography mask at different rotational alignments with respect to the semiconductor wafer so that the different mask images produce at least one working semiconductor wafer sector, and at least one non-working semiconductor wafer sector.
    Type: Application
    Filed: November 20, 2013
    Publication date: May 21, 2015
    Applicant: STMICROELECTRONICS PTE LTD
    Inventors: Alan Lee, Xi Ge
  • Publication number: 20150140484
    Abstract: There is provided an actinic ray-sensitive or radiation-sensitive resin composition comprising: (A) a resin containing a repeating unit represented by the first specific formula and a repeating unit represented by the second specific formula, wherein the content of the repeating unit represented by the first specific formula is 35 mol % or more based on all repeating units in the resin (A), a resist film formed using the actinic ray-sensitive or radiation-sensitive resin composition.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 21, 2015
    Applicant: FUJIFILM CORPORATION
    Inventors: Hiroo TAKIZAWA, Shuji HIRANO, Natsumi YOKOKAWA, Wataru NIHASHI
  • Patent number: 9034565
    Abstract: A substrate for an organic light-emitting device which can improve the light extraction efficiency of an organic light-emitting device while realizing an intended level of transmittance, a method of fabricating the same, and an organic light-emitting device having the same. Light emitted from the OLED is emitted outward through the substrate. The substrate includes a substrate body and a number of crystallized particles disposed inside the substrate body, the number of crystallized particles forming a pattern inside the substrate body.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: May 19, 2015
    Assignee: Samsung Corning Precision Materials Co., Ltd.
    Inventors: Kiyeon Lee, Jhee-Mann Kim, Youngseok Lee, Kyungmin Yoon, Jaeho Lee
  • Publication number: 20150132701
    Abstract: A photoresist includes a group which will decompose that is attached to a hydrocarbon backbone at multiple points along the hydrocarbon chain. With such an attachment, the group which will decompose will cleave from one point in order to generate a desired shift in polarity while still remaining bonded to the hydrocarbon backbone. This prevents the group which will decompose from leaving the photoresist, thereby reducing or eliminating volume losses associated with exposure and post-exposure baking.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 14, 2015
    Inventors: Chen-Hau Wu, Ching-Yu Chang
  • Publication number: 20150132688
    Abstract: There is provided an actinic ray-sensitive or radiation-sensitive resin composition comprising (P) a resin having (a) a repeating unit represented by the specific formula; a resist film formed using the actinic ray-sensitive or radiation-sensitive resin composition; a pattern forming method comprising (i) a step of forming a film by using the actinic ray-sensitive or radiation-sensitive resin composition, (ii) a step of exposing the film, and (iii) a step of developing the exposed film by using a developer to form a pattern; a method for manufacturing an electronic device, comprising the pattern forming method; and an electronic device manufactured by the manufacturing method of an electronic device.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 14, 2015
    Applicant: FUJIFILM Corporation
    Inventors: Natsumi YOKOKAWA, Shuji HIRANO, Hiroo TAKIZAWA, Wataru NIHASHI
  • Publication number: 20150132687
    Abstract: There is provided an actinic ray-sensitive or radiation-sensitive resin composition comprising (P) a resin containing a repeating unit represented by the specific formula (1) and a repeating unit represented by the specific formula (A); a resist film formed using the actinic ray-sensitive or radiation-sensitive resin composition; a pattern forming method comprising (i) a step of forming a film from the actinic ray-sensitive or radiation-sensitive resin composition, (ii) a step of exposing the film, and (iii) a step of developing the exposed film by using a developer to form a pattern; a method for manufacturing an electronic device, comprising the pattern forming method, and an electronic device manufactured by the manufacturing method of an electronic device.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 14, 2015
    Applicant: FUJIFILM CORPORATION
    Inventors: Shuji HIRANO, Natsumi YOKOKAWA, Hiroo TAKIZAWA, Wataru NIHASHI
  • Patent number: 9029070
    Abstract: There are provided a method of forming a resist pattern includes: a step (1) in which a resist composition containing a base component (A) that generates base upon exposure and exhibits increased solubility in an alkali developing solution by the action of acid is applied to a substrate to form a resist film; a step (2) in which the resist film 2 is subjected to exposure; a step (3) in which baking is conducted after the step (2); and a step (4) in which the resist film 2 is subjected to an alkali development, thereby forming a negative-tone resist pattern in which the unexposed portion 2b of the resist film 2 has been dissolved and removed, and the resist composition used in the step (1).
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: May 12, 2015
    Assignee: Tokyo Ohka Kogyo Co., Ltd
    Inventors: Hiroaki Shimizu, Tsuyoshi Nakamura, Jiro Yokoya, Hideto Nito
  • Patent number: 9029062
    Abstract: A method and photoresist material for the patterning of integrated circuit (IC) components using ultra violet (UV) and extreme ultraviolet lithography (EUV) that includes providing a substrate, forming a first material layer over the substrate, forming a second material layer over the first material layer, the second material layer having a luminescent agent, and exposing one or more portions of the second material layer.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Wei Wang, Chun-Ching Huang
  • Patent number: 9029048
    Abstract: The present invention is a mask blank used to fabricate a transfer mask, which has a laminated structure of a light shielding film and an etching mask film in this order on a transparent substrate, wherein the etching mask film comprises a material containing chromium, the light shielding film comprises a material containing tantalum, a highly oxidized layer is formed on the surface layer of the light shielding film on the opposite side from the transparent substrate, and a Ta 4 f narrow spectrum of the highly oxidized layer analyzed by X-ray photoelectron spectroscopy has a maximum peak at a binding energy of more than 23 eV.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: May 12, 2015
    Assignee: Hoya Corporation
    Inventors: Kazuya Sakai, Ryo Ohkubo, Osamu Nozawa, Toshiyuki Suzuki
  • Publication number: 20150126843
    Abstract: A multielectrode array with a fluidic channel and its method of fabrication are presented here. In accordance with various embodiments, the present invention allows for scalability, reproducibility, and precision dimension control by utilizing a lithography dependent process. In one embodiment, the present invention provides for a microelectrode that is a neural implant, with the microelectrode configured for connection to a fluidic channel. In another embodiment, the fluidic channel may deliver growth factors and/or drugs.
    Type: Application
    Filed: November 5, 2014
    Publication date: May 7, 2015
    Applicant: The Regents of the University of California
    Inventors: Dhonam Pemba, William C. Tang
  • Publication number: 20150125667
    Abstract: A pattern is formed in a polymeric layer comprising a reactive composition that comprises: (a) a polymer comprising pendant—arylene-X—C(?O)—O— t-alkyl groups that comprise a blocking group that is cleavable to provide pendant—arylene-XH groups, (b) a compound that provides a cleaving acid upon exposure to radiation having a ?max of 150 nm and to 450 nm, which cleaving acid has a pKa of 2 or less as measured in water, and (c) optionally, a photosensitizer. The polymeric layer is imagewise exposed to suitable radiation to provide non-exposed regions and exposed regions comprising a de-blocked and crosslinked polymer with pendant—arylene-XH groups. The exposed regions are contacted with electroless seed metal ions in the de-blocked and crosslinked polymer. After reduction, the corresponding electroless seed metal nuclei are electrolessly plated using a suitable metal that is the same as or different from the corresponding electroless seed metal nuclei.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 7, 2015
    Inventors: Thomas B. Brust, Mark Edward Irving, Catherine A. Falkner
  • Patent number: 9023585
    Abstract: A resist composition which generates a base upon exposure and exhibits increased solubility in an alkali developing solution under the action of acid, and the resist composition including: a base component (A) that exhibits increased solubility in an alkali developing solution under the action of acid; an acidic compound component (G1) including a nitrogen-containing cation having a pKa value of 7 or less and a counteranion; and a buffer component (K) including a nitrogen-containing cation and a counteranion being a conjugate base for the acid having a pKa value of 0 to 5.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: May 5, 2015
    Assignee: Tokyo Ohka Kogyo Co., Ltd
    Inventors: Tsuyoshi Nakamura, Jiro Yokoya, Hideto Nito, Hiroaki Shimizu
  • Publication number: 20150118618
    Abstract: A photoacid generator compound has the formula (1) wherein a, b, c, d, e, x, L1, L2, L3, L4, R1, R2, X, and Z? are defined herein. The photoacid generator compound exhibits good solubility in solvents typically used to formulate photoresist compositions and negative tone developers. Described herein are a photoresist composition including the photoacid generator compound, a coated substrate including the photoresist composition, and a device-forming method utilizing the photoresist composition.
    Type: Application
    Filed: October 25, 2013
    Publication date: April 30, 2015
    Inventors: Emad Aqad, Irvinder Kaur, Cong Liu, Mingqi Li, Cheng-Bai Xu