Having High Dielectric Constant Insulator (e.g., Ta2o5, Etc.) Patents (Class 438/240)
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Patent number: 7728376Abstract: HfO2 films and ZrO2 films are currently being developed for use as capacitor dielectric films in 85 nm technology node DRAM. However, these films will be difficult to use in 65 nm technology node or later DRAM, since they have a relative dielectric constant of only 20-25. The dielectric constant of such films may be increased by stabilizing their cubic phase. However, this results in an increase in the leakage current along the crystal grain boundaries, which makes it difficult to use these films as capacitor dielectric films. To overcome this problem, the present invention dopes a base material of HfO2 or ZrO2 with an oxide of an element having a large ion radius, such as Y or La, to increase the oxygen coordination number of the base material and thereby increase its relative dielectric constant to 30 or higher even when the base material is in its amorphous state. Thus, the present invention provides dielectric films that can be used to form DRAM capacitors that meet the 65 nm technology node or later.Type: GrantFiled: March 21, 2007Date of Patent: June 1, 2010Assignee: Hitachi, Ltd.Inventors: Yuichi Matsui, Hiroshi Miki
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Patent number: 7727777Abstract: In accordance with some embodiments, a ferroelectric polymer memory may be formed of a plurality of stacked layers. Each layer may be separated from the ensuing layer by a polyimide layer. The polyimide layer may provide reduced layer-to-layer coupling, and may improve planarization after the lower layer fabrication.Type: GrantFiled: May 31, 2002Date of Patent: June 1, 2010Inventors: Ebrahim Andideh, Mark Isenberger, Michael Leeson, Mani Rahnama
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Patent number: 7723199Abstract: A method of manufacturing a semiconductor device is presented. In one aspect, the method comprises forming conductive and ferroelectric material layers on a semiconductor substrate. The material layers are patterned to form electrodes and a ferroelectric layer of a ferroelectric capacitor, wherein a conductive noble metal-containing polymer is generated on sidewalls of the ferroelectric capacitor. The method also comprises converting the conductive noble metal-containing polymer into a non-conducting metal oxide. Converting includes forming a water-soluble metal salt from the conductive noble metal-containing polymer and reacting the water-soluble metal salt with an acqueous acidic solution to form a metal hydroxide. Converting also includes oxidizing the metal hydroxide to form the non-conducting metal oxide.Type: GrantFiled: January 31, 2007Date of Patent: May 25, 2010Assignee: Texas Instruments IncorporatedInventors: Yaw S. Obeng, Kezhakkedath R. Udayakumar, Scott Robert Summerfelt, Sanjeev Aggarwal, Francis Gabriel Celii, Lindsey H. Hall, Robert Kraft, Theodore S. Moise
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Patent number: 7723771Abstract: A capacitor structure comprises a first and a second electrode of conducting material. Between the first and second electrodes, an atomic layer deposited dielectric film is disposed, which comprises zirconium oxide and a dopant oxide. Herein, the dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, while the dielectric film comprises a dopant content of 10 atomic percent or less of the dielectric film material excluding oxygen. A process for fabricating a capacitor comprises a step of forming a bottom electrode of the capacitor. On the bottom electrode, a dielectric film comprising zirconium oxide is deposited, and a step for introducing a dopant oxide into the dielectric film performed. On the dielectric structure, a top electrode is formed.Type: GrantFiled: March 30, 2007Date of Patent: May 25, 2010Assignee: Qimonda AGInventors: Tim Boescke, Uwe Schroeder
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Patent number: 7718551Abstract: A method for forming a photoresist layer is provided. The method includes following steps. A wafer is provided in a semiconductor machine. The wafer is spun at a first spin speed. A pre-wet solvent is dispensed on the spinning wafer by using a nozzle disposed at a fixed position. The pre-wet solvent then stops dispensing. The spin speed of the wafer is adjusted from the first spin speed to a second spin speed which is faster than the first spin speed. Thereafter, a photoresist layer is coated on the wafer.Type: GrantFiled: March 7, 2008Date of Patent: May 18, 2010Assignee: United MIcroelectronics Corp.Inventors: Yu-Huan Liu, Chih-Jung Chen, Chih-Chung Huang
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Patent number: 7718487Abstract: A method of manufacturing a ferroelectric layer, including: forming a first ferroelectric layer above a base by a vapor phase method; and forming a second ferroelectric layer above the first ferroelectric layer by a liquid phase method.Type: GrantFiled: April 27, 2006Date of Patent: May 18, 2010Assignee: Seiko Epson CorporationInventor: Takeshi Kijima
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Patent number: 7713812Abstract: A substrate with a second semiconductor layer and a second mask film formed thereon is subjected to a heat treatment in an oxidizing atmosphere. Thus, second oxidized regions are formed through oxidization of the second semiconductor layer in regions of the second semiconductor layer that are not covered by the second mask film. At the same time, a second base layer is formed in each region that is interposed by the second oxidized regions. Then, the second mask film is removed, and a third semiconductor layer is selectively grown on the surface of the second base layer that is exposed between the second oxidized regions so as to cover the second oxidized regions, after which the first oxidized regions and the second oxidized regions covering the entire upper surface of the substrate are removed.Type: GrantFiled: January 12, 2006Date of Patent: May 11, 2010Assignee: Panasonic CorporationInventors: Tetsuzo Ueda, Hisashi Nakayama, Masaaki Yuri
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Patent number: 7713831Abstract: A method for forming a capacitor in a semiconductor device is disclosed. The method includes forming a storage node electrode on a semiconductor substrate, forming a dielectric layer having a high dielectric constant on the storage node electrode, depositing a plate electrode on the dielectric layer, thereby forming by-product impurities, and removing by-product impurities remaining on the plate electrode by introducing a hydrogen (H) atom-containing gas onto the semiconductor substrate while depositing a capping layer on the plate electrode.Type: GrantFiled: June 5, 2007Date of Patent: May 11, 2010Assignee: Hynix Semiconductor Inc.Inventors: Cheol-Hwan Park, Dong-Su Park, Eun A. Lee, Hye Jin Seo
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Patent number: 7700430Abstract: A phase changeable random access memory (PRAM) and methods for manufacturing the same. An example unit cell of a non-volatile memory, such as a PRAM, includes a MOS transistor, connected to an address line and a data line, where the MOS transistor receives a voltage from the data line. The unit cell further includes a phase change material for changing phase depending on heat generated by the voltage and a top electrode, connected to a substantially ground voltage.Type: GrantFiled: September 25, 2007Date of Patent: April 20, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Soo-Guil Yang, Hong-Sik Jeong, Young-Nam Hwang
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Patent number: 7700989Abstract: Embodiments of a dielectric layer containing a hafnium titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices.Type: GrantFiled: December 1, 2006Date of Patent: April 20, 2010Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 7691669Abstract: Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.Type: GrantFiled: March 27, 2008Date of Patent: April 6, 2010Assignee: International Business Machines CorporationInventors: Raymond R. Horton, John U. Knickerbocker, Edmund J. Sprogis, Cornelia K. Tsang
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Patent number: 7687285Abstract: A method for manufacturing a ferroelectric memory includes the steps of: forming an iridium film above a substrate; forming an iridium oxide layer on the iridium film; changing the iridium oxide layer into an amorphous iridium layer; oxidizing the amorphous iridium layer to form an iridium oxide portion; forming a ferroelectric film on the iridium oxide portion by a MOCVD method; and forming an electrode on the ferroelectric film.Type: GrantFiled: July 24, 2008Date of Patent: March 30, 2010Assignee: Seiko Epson CorporationInventor: Hiroaki Tamura
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Patent number: 7670921Abstract: A method of forming a metal-insulator-metal (MIM) capacitor includes forming a first planar dielectric layer with a first metallization layer therein; forming a first passivation layer on top thereof; forming a planar conductive layer above the first passivation layer; patterning and selectively removing the conductive layer up to the first passivation layer in designated areas to form a set of conductive features; patterning and conformally coating the set of conductive features and the exposed first passivation layer with a high strength dielectric coating; disposing a second dielectric layer above the first passivation layer and enclosing the set of conductive features; patterning and selectively removing portions of the second substrate to form channels and trenches; performing a dual-Damascene process to form a second metallization layer in the trenches and channels and to form an upper conductive surface above the high strength dielectric coating.Type: GrantFiled: December 28, 2006Date of Patent: March 2, 2010Assignee: International Business Machines CorporationInventors: Anil K. Chinthakindi, Douglas D. Coolbaugh, Timothy J. Dalton, Ebenezer E. Eshun, Jeffrey P. Gambino, Anthony K. Stamper, Richard P. Volant
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Patent number: 7670899Abstract: A MIM capacitor includes a lower electrode disposed on a semiconductor substrate. A dielectric layer is disposed on the lower electrode to completely cover an exposed surface of the lower electrode. An upper electrode is disposed on the dielectric layer. A method for forming a MIM capacitor includes forming a lower electrode on a semiconductor substrate. A dielectric layer and an upper metal layer are formed on an entire surface of the substrate to cover the lower electrode. The dielectric and upper metal layers are patterned on the lower electrode.Type: GrantFiled: October 9, 2007Date of Patent: March 2, 2010Assignee: Dongbu Electronics Co., Ltd.Inventor: Ki Min Lee
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Patent number: 7666801Abstract: A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and one or more precursor compounds that include aminosilane ligands.Type: GrantFiled: October 9, 2008Date of Patent: February 23, 2010Assignee: Micron Technology, Inc.Inventors: Brian A. Vaartstra, Timothy A. Quick
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Patent number: 7651907Abstract: A method for fabricating a semiconductor device, the method includes forming an etch stop layer and an insulation layer over a substrate having a first region and a second region, selectively removing the insulation layer and the etch stop layer in the first region to expose parts of the substrate, thereby forming at least two electrode regions on the exposed substrate and a resultant structure, forming a conductive layer over the resultant structure, removing the conductive layer in the second region, removing the insulation layer in the first region and the second region by using wet chemicals, and removing parts of the conductive layer, which formed between the at least two electrode regions in the first region, to form cylinder type electrodes in the first region.Type: GrantFiled: December 26, 2007Date of Patent: January 26, 2010Assignee: Hynix Semiconductor Inc.Inventor: Jun-Hee Cho
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Patent number: 7652377Abstract: A seal ring (102) is formed in a manner to surround each ferroelectric capacitor (101). Additionally, a seal ring (103) is formed in a manner to surround a plurality of ferroelectric capacitors (101). Further, a seal ring (104) is formed in a manner to surround all of the ferroelectric capacitors (101) and along a dicing line (110) inside the dicing line (110).Type: GrantFiled: September 18, 2006Date of Patent: January 26, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Tetsuo Yaegashi, Kouichi Nagai
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Patent number: 7648874Abstract: In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.Type: GrantFiled: January 25, 2006Date of Patent: January 19, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Cheol Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo, Gab-Jin Nam, Young-Geun Park, Jae-Hyoung Choi, Jae-Hyun Yeo, Ha-Jin Lim, Yun-Seok Kim
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Publication number: 20100006913Abstract: A semiconductor device includes: a semiconductor substrate including a trench; a capacitor electrode formed in the trench; a first insulation film formed on a bottom of the trench and between the semiconductor substrate and the capacitor electrode; a second insulation film formed on a side wall of the trench and between the semiconductor substrate and the capacitor electrode; and a first metal oxide film formed at the bottom of the trench and between the capacitor electrode and the first insulation film.Type: ApplicationFiled: July 8, 2009Publication date: January 14, 2010Applicant: FUJITSU MICROELECTRONICS LIMITEDInventors: Jun Lin, Hiroyuki Ogawa
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Patent number: 7642200Abstract: A method of forming a thin film is provided. The method includes introducing an organometallic compound represented by the following formula onto a substrate; wherein M represents a metal in listed in Group 4A of the periodic table of elements, R1, R2 and R3 independently represent hydrogen or an alkyl group having a carbon number from 1 to 5, and X represents hydrogen or an alkyl group having a carbon number from 1 to 5 and then chemisorbing a portion of the organometallic compound on the substrate. The method further includes removing a non-chemisorbed portion of the organometallic compound from the substrate, providing an oxidizing agent onto the substrate and forming a thin film including a metal oxide on the substrate by chemically reacting the oxidizing agent with a metal in the organometallic compound and by separating ligands of the organometallic compound.Type: GrantFiled: January 13, 2006Date of Patent: January 5, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Ho Lee, Jun-Hyun Cho, Jung-Sik Choi, Sang-Mun Chon
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Patent number: 7642099Abstract: A manufacturing method for a ferroelectric memory device includes: forming a ferroelectric capacitor on a substrate, the ferroelectric capacitor including a lower electrode, a ferroelectric film, and an upper electrode; forming a first hydrogen barrier film that covers the ferroelectric capacitor by a chemical vapor deposition method; forming a dielectric film on the first hydrogen barrier film; forming a sidewall composed of the dielectric film on a side of the ferroelectric capacitor by etching back the dielectric film; forming a second hydrogen barrier film on the first hydrogen barrier film and the sidewall by a chemical vapor deposition method; and forming an interlayer dielectric film on the second hydrogen barrier film.Type: GrantFiled: November 28, 2007Date of Patent: January 5, 2010Assignees: Seiko Epson Corporation, Fujtisu LimitedInventors: Shinichi Fukada, Naoya Sashida
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Patent number: 7639474Abstract: A multi-segment parallel wire capacitor includes substantially identical multiple capacitor segments fabricated on a semiconductor substrate. Each segment comprises at least first and second interleaved metal finger formed in a first metal layer above the substrate and third and fourth interleaved metal fingers formed in a second metal layer. The first and fourth sets are connected together to form one plate of the capacitor and the second and third sets are connected to form a second plate. The multiple capacitor segments are arranged in a matrix having M rows and N columns. The multiple capacitor segments are inter-connected in such a manner that the capacitor segments in each column of the matrix are connected in parallel. First and second metal lines selectively connect the plates of the different capacitor segments in the first and last rows and serve as the two opposite terminals of the multi-segment parallel wire capacitor.Type: GrantFiled: December 16, 2008Date of Patent: December 29, 2009Assignee: Altera CorporationInventors: Shuxian Chen, Jeffrey T. Watt
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Patent number: 7635623Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.Type: GrantFiled: July 17, 2006Date of Patent: December 22, 2009Assignee: Micron Technology, Inc.Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
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Patent number: 7635628Abstract: The nonvolatile memory device includes a semiconductor substrate on which a source, a drain, and a channel region are formed, a tunneling oxide film formed on the channel region, a floating gate formed of a transition metal oxide (TMO) on the tunneling oxide, a blocking oxide film formed on the floating gate, a gate electrode formed on the blocking oxide film.Type: GrantFiled: February 15, 2006Date of Patent: December 22, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Yoon-ho Khang, Eun-hye Lee, Myoung-jae Lee, Sun-ae Seo, Seung-Eon Ahn
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Patent number: 7629221Abstract: Disclosed is a method for forming a capacitor of a semiconductor device. In such a method, a mold insulating layer is formed on an insulating interlayer provided with a storage node plug, and the mold insulating layer is etched to form a hole through which the storage node plug is exposed. Next, a metal storage electrode with an interposed WN layer is formed on a hole surface including the exposed storage node plug and the mold insulating layer is removed. Finally, a dielectric layer and a plate electrode are formed in order on the metal storage electrode.Type: GrantFiled: July 1, 2005Date of Patent: December 8, 2009Assignee: Hynix Semiconductor Inc.Inventors: Ki Seon Park, Jae Sung Roh, Hyun Chul Sohn
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Patent number: 7629636Abstract: When adopting a stack-type capacitor structure for a ferroelectric capacitor structure (30), an interlayer insulating film (27) is formed between a lower electrode (39) (or a barrier conductive film) and a conductive plug (22) to eliminate an impact of orientation/level difference on a surface of the conductive plug (22) onto the ferroelectric film (40). Differently from a conductive film like the lower electrode (39) or the barrier conductive film, the interlayer insulating film (27) can be formed without inheriting the orientation/level difference from its lower layers by planarizing the surface thereof.Type: GrantFiled: December 7, 2007Date of Patent: December 8, 2009Assignee: Fujitsu Microelectronics LimitedInventor: Kouichi Nagai
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Patent number: 7625794Abstract: A dielectric layer having atomic layer deposited zirconium aluminum oxide and a method of fabricating such a dielectric layer may produce a reliable dielectric layer having an equivalent oxide thickness thinner than attainable using SiO2. The zirconium aluminum oxide may be formed in an atomic layer deposition process that includes pulsing a zirconium-containing precursor onto a substrate and pulsing an aluminum-containing precursor.Type: GrantFiled: November 13, 2006Date of Patent: December 1, 2009Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 7623338Abstract: In a device including multiple metal-insulator-metal (MIM) capacitors and a method of fabricating the same, the multiple MIM capacitors comprise a lower interconnect in a substrate; a first dielectric layer on the lower interconnect; a first intermediate electrode pattern on the first dielectric layer overlapping with the lower interconnect; a second intermediate electrode pattern on the first dielectric layer and spaced apart from the first intermediate electrode pattern in a same plane of the device as the first intermediate electrode pattern; a second dielectric pattern on the second intermediate electrode pattern; and an upper electrode pattern on the second dielectric pattern.Type: GrantFiled: January 30, 2006Date of Patent: November 24, 2009Assignee: Samsung Electronics Co., Ltd.Inventor: Seok-jun Won
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Patent number: 7618859Abstract: A thin film capacitor comprising a top electrode, a bottom electrode, and a dielectric film held between the top and bottom electrodes. The dielectric film is composed of at least cations Ba, Sr, and Ti and anion O. The concentration of Sr, Ti, and O ions are uniform along the growth direction of the dielectric film while the concentration of the Ba cation is non-uniform along the growth direction such that a reduced Ba-I region in which the average concentration of perovskite type Ba cations (Ba-I) is less than the average concentration of non-perovskite type Ba cations (Ba-II) exists at or near the boundary between at least one of the top and bottom electrodes, with ratio R=(atm % Ba-I)/[(atm % Ba-I)+(atm % Ba-II)] within a range of 0.1<R<0.2.Type: GrantFiled: July 24, 2008Date of Patent: November 17, 2009Assignee: Fujitsu LimitedInventors: John David Baniecki, Takeshi Shioga, Kazuaki Kurihara
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Patent number: 7615440Abstract: In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.Type: GrantFiled: September 7, 2007Date of Patent: November 10, 2009Assignee: Infineon Technologies AGInventors: Petra Felsner, Thomas Schafbauer, Uwe Kerst, Hans-Joachim Barth, Erdem Kaltalioglu
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Patent number: 7615438Abstract: Electronic apparatus and methods of forming the electronic apparatus include a lanthanide yttrium aluminum oxide dielectric film on a substrate for use in a variety of electronic systems. The lanthanide yttrium aluminum oxide film may be structured as one or more monolayers. The lanthanide yttrium aluminum oxide film may be formed by atomic layer deposition.Type: GrantFiled: December 8, 2005Date of Patent: November 10, 2009Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 7615441Abstract: A buffer layer and a high-k metal oxide dielectric may be formed over a smooth silicon substrate. The substrate smoothness may reduce column growth of the high-k metal oxide gate dielectric. The surface of the substrate may be saturated with hydroxyl terminations prior to deposition.Type: GrantFiled: November 29, 2007Date of Patent: November 10, 2009Assignee: Intel CorporationInventors: Justin K. Brask, Jack Kavalieros, Mark L. Doczy, Matthew V. Metz, Suman Datta, Uday Shah, Gilbert Dewey, Robert S. Chau
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Patent number: 7611913Abstract: Ferroelectric rare-earth manganese-titanium oxides and methods of their manufacture. The ferroelectric materials can provide nonvolatile data storage in rapid access memory devices.Type: GrantFiled: June 22, 2007Date of Patent: November 3, 2009Assignee: Intematix CorporationInventors: Yi-Qun Li, Young Yoo, Qizhen Xue, Ning Wang, Daesig Kim
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Patent number: 7608502Abstract: In the process for manufacturing a semiconductor device of the present invention, a capacitor dielectric film is deposited via an atomic layer deposition employing an organic source material containing one or more metallic element(s) selected from the group consisting of Zr, Hf, La and Y as a deposition gas. The process for manufacturing a capacitor of the present invention includes obtaining a boundary temperature T (degree C.), at which an increase in a deposition rate for depositing the capacitor dielectric film as increasing the temperature is detected, on the basis of a correlation data of a deposition temperature in the atomic layer deposition employing the deposition gas with a deposition rate for depositing the capacitor dielectric film at the deposition temperature (S100 and S102); and depositing the capacitor dielectric film via the atomic layer deposition employing the deposition gas at a temperature within a range of from (T?20) (degree C.) to (T+20) (degree C.) (S104 to S112).Type: GrantFiled: August 19, 2005Date of Patent: October 27, 2009Assignee: NEC Electronics CorporationInventors: Tomohisa Iino, Naomi Fukumaki, Yoshitake Kato, Tomoe Yamamoto
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Patent number: 7601649Abstract: A dielectric film containing zirconium-doped tantalum oxide arranged as a structure of one or more monolayers and a method of fabricating such a dielectric film produce a reliable dielectric layer for use in a variety of electronic devices. In an embodiment, a zirconium-doped tantalum oxide dielectric layer may be formed by depositing tantalum by atomic layer deposition onto a substrate surface and depositing a zirconium dopant by atomic layer deposition onto the substrate surface.Type: GrantFiled: August 2, 2004Date of Patent: October 13, 2009Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 7601548Abstract: Ferroelectric capacitors are provided that include an integrated circuit substrate and a supporting insulation layer on the integrated circuit substrate having a face and a trench in the face. An oxidation barrier conductive layer is provided in the trench and a lower electrode is provided on the oxidation barrier conductive layer. A ferroelectric layer is provided on the lower electrode and an upper electrode is provided on the ferroelectric layer. Related methods of fabricating ferroelectric capacitors are also provided.Type: GrantFiled: May 4, 2007Date of Patent: October 13, 2009Assignee: Samsung Electronics Co., Ltd.Inventor: Hyun-Ho Kim
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Patent number: 7598095Abstract: A ferroelectric capacitor comprises a first electrode comprising an alloy containing a first element and a second element of the periodic table of the elements, the first element being selected from the group consisting of Ir and Ru. A ferroelectric layer is disposed on the first electrode, wherein the ferroelectric layer comprises a ferroelectric material containing the second element. A second electrode is disposed on the ferroelectric layer. The ferroelectric capacitor can be provided as part of a memory cell of a ferroelectric memory.Type: GrantFiled: August 1, 2005Date of Patent: October 6, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: June-mo Koo, Young-soo Park, Sang-min Shin, Suk-pil Kim
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Patent number: 7595250Abstract: There are provided the steps of forming an insulating film over a semiconductor substrate, forming sequentially a first conductive film, a dielectric film, a second conductive film on the insulating film, etching the second conductive film and the dielectric film into a first pattern shape by using a first mask, removing the first mask, and etching simultaneously the first conductive film and the second conductive film having the first pattern shape by using a second mask to form a plurality of capacitor upper electrodes made of the second conductive film and also form a plate line as a capacitor lower electrode, which is covered with the dielectric film having the first pattern shape and has a contact region, made of the first conductive film. Accordingly, a plurality of capacitors can be formed on the capacitor lower electrode with good precision.Type: GrantFiled: July 21, 2006Date of Patent: September 29, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Yoichi Okita, Genichi Komuro
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Patent number: 7592272Abstract: An object of the present invention is to provide a method of depositing yttrium-stabilized hafnia use for a DRAM capacitor insulating film while controlling the composition at a high accuracy by an atomic layer deposition method. The atomic deposition method is performed by introducing a hafnium compound precursor, introducing a yttrium compound precursor and introducing an oxidant as one cycle. In the atomic deposition method, the addition amount of yttrium into hafnia is controlled accurately by controlling the time of introducing the hafnium compound precursor and the yttrium compound precursor and controlling the replacement ratio of OH groups on a sample surface by each of the precursors.Type: GrantFiled: March 28, 2007Date of Patent: September 22, 2009Assignee: Hitachi, Ltd.Inventor: Osamu Tonomura
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Patent number: 7592217Abstract: A capacitor with zirconium oxide and a method for fabricating the same are provided. The method includes: forming a storage node; forming a multi-layered dielectric structure on the storage node, the multi-layered dielectric structure including a zirconium oxide (ZrO2) layer and an aluminum oxide (Al2O3) layer; and forming a plate electrode on the multi-layered dielectric structure.Type: GrantFiled: November 7, 2005Date of Patent: September 22, 2009Assignee: Hynix Semiconductor Inc.Inventor: Kee-jeung Lee
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Patent number: 7579643Abstract: A capacitor may include a first electrode, a second electrode, a low dielectric layer, and/or a high dielectric layer. The first electrode may include at least one first electrode branch. The second electrode may face the first electrode and include at least one second electrode branch. The low dielectric layer may be formed between the first electrode branch and the second electrode branch. The high dielectric layer may be formed between the first electrode branch and the second electrode branch. The high dielectric layer may have a higher dielectric constant than the low dielectric layer.Type: GrantFiled: February 16, 2007Date of Patent: August 25, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Byung-jun Oh, Kyung-tae Lee, Yoon-hae Kim
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Patent number: 7572695Abstract: Embodiments of a dielectric layer containing a hafnium titanium oxide film structured as one or more monolayers include the dielectric layer disposed in an integrated circuit. Embodiments of methods of fabricating such a dielectric layer provide a dielectric layer for use in a variety of electronic devices.Type: GrantFiled: May 27, 2005Date of Patent: August 11, 2009Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 7563729Abstract: A method of forming a dielectric film on a substrate surface includes the steps of forming the dielectric film on the substrate surface in plural steps, and reforming, in each of the plural steps of forming the dielectric film, the dielectric film in an ambient primarily of nitrogen.Type: GrantFiled: May 24, 2005Date of Patent: July 21, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Shiqin Xiao, Takayuki Ohba
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Patent number: 7560333Abstract: A capacitor may include at least one of a polysilicon layer over a semiconductor substrate; a capacitor dielectric layer over a polysilicon layer; an insulating layer over a capacitor dielectric layer; a metal layer connected to a capacitor dielectric layer through a first region of an insulating layer; an upper metal wiring layer connected to a metal layer over an insulating layer; and/or a lower metal wiring line layer connected to a polysilicon layer through a metal contact that passes through a second region of an insulating layer and a capacitor dielectric layer over the insulating layer.Type: GrantFiled: December 15, 2006Date of Patent: July 14, 2009Assignee: Dongbu HiTek Co., Ltd.Inventor: An Do Ki
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Patent number: 7550346Abstract: Disclosed is a method for forming a gate dielectric in a semiconductor device. The present method includes forming a first dielectric layer on a semiconductor substrate; removing a portion of the first dielectric layer to expose a portion of the substrate; forming a nitride layer on the exposed portion of the substrate and the first dielectric layer; forming a transition metal layer on the nitride layer; and oxidizing the transition metal layer to form a transition metal oxide layer.Type: GrantFiled: August 2, 2006Date of Patent: June 23, 2009Assignee: Dongbu Electronics Co., Ltd.Inventor: Jeong Ho Park
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Patent number: 7550345Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.Type: GrantFiled: July 11, 2006Date of Patent: June 23, 2009Assignee: Micron Technology, Inc.Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
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Patent number: 7548408Abstract: A method for manufacturing a capacitor includes the steps of: forming a conductive layer above a base substrate; forming a dielectric layer above the conductive layer; forming a lanthanum nickelate layer above the dielectric layer; and patterning at least the dielectric layer by using at least the lanthanum nickelate layer as a mask.Type: GrantFiled: January 24, 2007Date of Patent: June 16, 2009Assignee: Seiko Epson CorporationInventor: Masao Nakayama
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Patent number: 7544987Abstract: High dielectric films of mixed transition metal oxides of titanium and tungsten, or titanium and tantalum, are formed by sequential chemical vapor deposition (CVD) of the respective nitrides and annealing in the presence of oxygen to densify and oxidize the nitrides. The resulting film is useful as a capacitative cell and resists oxygen diffusion to the underlying material, has high capacitance and low current leakage.Type: GrantFiled: March 2, 2005Date of Patent: June 9, 2009Assignee: Micron Technology, Inc.Inventors: Jiong-Ping Lu, Ming-Jang Hwang
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Patent number: 7531405Abstract: A polycrystalline dielectric layer is formed wherein the dielectric layer comprises a first dielectric material containing an oxide or nitride and a second material contributing to less than 1% in weight to the dielectric layer, forming a non-conductive oxide or nitride having an enthalpy lower than the enthalpy of the first dielectric material such that a leakage current along grain boundaries of the first dielectric material is reduced.Type: GrantFiled: February 28, 2005Date of Patent: May 12, 2009Assignee: Qimonds AGInventors: Andreas Spitzer, Elke Erben
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Patent number: 7531417Abstract: A system and method for forming post passivation passive components, such as resistors and capacitors, is described. High quality electrical components, are formed on a layer of passivation, or on a thick layer of polymer over a passivation layer.Type: GrantFiled: May 27, 2003Date of Patent: May 12, 2009Assignee: Megica CorporationInventor: Mou-Shiung Lin