Mesa Formation Patents (Class 438/39)
  • Publication number: 20120251039
    Abstract: Provided is a laser device comprising a substrate, an active layer, and a current confinement layer. The current confinement layer includes an oxide layer that is formed extending from a edge of the current confinement layer in a parallel plane parallel to a surface of the substrate, toward a center of the current confinement layer along the parallel plane, and that does not have an inflection point between the edge and a tip portion formed closer to the center or has a plurality of inflection points formed between the edge and the tip portion.
    Type: Application
    Filed: March 30, 2012
    Publication date: October 4, 2012
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Hitoshi SHIMIZU, Toshihito SUZUKI, Yasumasa KAWAKITA, Keishi TAKAKI
  • Patent number: 8278676
    Abstract: A semiconductor light-emitting device includes: a first semiconductor layer having a first major surface and a second major surface which is an opposite side to the first major surface; a second semiconductor layer provided on the second major surface of the first semiconductor layer and including a light-emitting layer; a first electrode provided on the second major surface of the first semiconductor layer; a second electrode provided on a surface of the second semiconductor layer, the surface being an opposite side to the first semiconductor layer; an insulating film provided on a side surface of the second semiconductor layer, and an edge of an interface between the first semiconductor layer and the second semiconductor layer; and a metal film provided on the insulating film from the second electrode side toward the edge of the interface.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: October 2, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kojima, Yoshiaki Sugizaki
  • Patent number: 8273591
    Abstract: Segmented semiconductor nanowires are manufactured by removal of material from a layered structure of two or more semiconductor materials in the absence of a template. The removal takes place at some locations on the surface of the layered structure and continues preferentially along the direction of a crystallographic axis, such that nanowires with a segmented structure remain at locations where little or no removal occurs. The interface between different segments can be perpendicular to or at angle with the longitudinal direction of the nanowire.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: September 25, 2012
    Assignee: International Business Machines Corporation
    Inventors: Harold J. Hovel, Qiang Huang, Xiaoyan Shao, James Vichiconti, George F. Walker
  • Publication number: 20120213465
    Abstract: A method for making a polarization rotator includes the steps of forming a structure including a semiconductor substrate and a mesa part, forming a first semiconductor layer on a main surface of the semiconductor substrate and around the mesa part, forming a second semiconductor layer on the first semiconductor layer, forming a semiconductor laminate by forming a third semiconductor layer on the second semiconductor layer, forming a mask layer on the third semiconductor layer, forming a mesa including a first semiconductor core by etching the semiconductor laminate, and forming a first semiconductor cladding by forming a fourth semiconductor layer around the mesa. The first semiconductor core and the first semiconductor cladding form a polarization rotating unit. An inclined surface of a mesa-part-adjacent portion extends in a second direction forming an acute angle with the main surface. An inclined portion of the second semiconductor layer extends in the second direction.
    Type: Application
    Filed: February 21, 2012
    Publication date: August 23, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Chie FUKUDA
  • Patent number: 8241940
    Abstract: This disclosure presents manufacturing methods and apparatus designs for making TFSSs from both sides of a re-usable semiconductor template, thus effectively increasing the substrate manufacturing throughput and reducing the substrate manufacturing cost. This approach also reduces the amortized starting template cost per manufactured substrate (TFSS) by about a factor of 2 for a given number of template reuse cycles.
    Type: Grant
    Filed: February 12, 2011
    Date of Patent: August 14, 2012
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, Somnath Nag, George D Kamian, Jay Ashjaee, Takao Yonehara
  • Patent number: 8241937
    Abstract: An optical semiconductor device includes a light emitting element having a first surface and a second surface, the first surface having a first electrode provided thereon, the second surface being located on the opposite side from the first surface and having a second electrode provided thereon; a first conductive member connected to the first surface; a second conductive member connected to the second surface; a first external electrode connected to the first conductive member; a second external electrode connected to the second conductive member; and an enclosure sealing the light emitting element, the first conductive member, and the second conductive member between the first external electrode and the second external electrode, and being configured to transmit light emitted from the light emitting element.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: August 14, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiko Happoya, Kazuhito Higuchi, Tomohiro Iguchi, Kazuo Shimokawa, Takashi Koyanagawa, Michinobu Inoue, Izuru Komatsu, Hisashi Ito
  • Patent number: 8236588
    Abstract: An object is to provide a multi-wavelength integrated semiconductor laser device which can reduce variations in emission point distance, can be formed by simplified manufacturing processes, and can provide improve electric characteristics. A first semiconductor laser element 100 having an active layer AL1 for emitting a laser beam of a first wavelength from its light-emitting point X1 and a second semiconductor laser element 200 having an active layer AL2 for emitting a laser beam of a second wavelength from its light-emitting point X2 are bonded to each other via an adhesive layer MC made of metal. At least either one of the semiconductor laser elements has a ridge waveguide made of an n-type semiconductor. The semiconductor laser elements 100 and 200 are bonded via the metal adhesive layer MC at the sides of their respective p-type semiconductors. A submount SUB is bonded to the first semiconductor laser element 100 via metal at a side where its ridge waveguide is formed.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: August 7, 2012
    Assignee: Pioneer Corporation
    Inventors: Mamoru Miyachi, Yoshinori Kimura
  • Patent number: 8236592
    Abstract: A method for forming a semiconductor device is provided including processing a wafer having a target material; forming a first pattern over the target material; forming a protection layer over the first pattern; and forming a second pattern, over the target material and not over the protection layer, without an etching step between the forming the first pattern and the forming the second pattern.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: August 7, 2012
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ryoung-han Kim, Thomas Ingolf Wallow, Harry Jay Levinson, Jongwook Kye, Alden R. Acheta
  • Patent number: 8232125
    Abstract: An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and a cover portion. The ridge portion extends in one direction, and the cover portion covers the surface on both sides of the ridge portion. A capacitance reducing region is disposed on both sides of the ridge portion and reaching at least the lower surface of the cover portion. The capacitance reducing region has the first conductivity type or a higher resistivity than that of the ridge portion, and the ridge portion has a second conductivity type. If the lower cladding layer is an n-type, the capacitance reducing region reaches at least the upper surface of the lower cladding layer.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: July 31, 2012
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Hisao Sudo, Yasuhiko Arakawa
  • Publication number: 20120190146
    Abstract: According to one embodiment, in a method for manufacturing a semiconductor light emitting device, a transparent conductive film is formed on a semiconductor laminated body of a multilayer structure containing a light emitting unit. The transparent conductive film is a film transmissive to a light of a luminescence wavelength from the light emitting unit. A mask is formed on the portion of the transparent conductive film. The transparent conductive film is removed by wet etching through the mask so as to expose the semiconductor laminated body. The semiconductor laminated body is removed by anisotropically etching through the mask so as to remove the light emitting unit. The mask is removed. A first electrode is formed on the portion of the semiconductor laminated body exposed after removing the light emitting unit. A second electrode is formed on the portion of the transparent conductive film.
    Type: Application
    Filed: September 21, 2011
    Publication date: July 26, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Kyohei SHIBATA
  • Patent number: 8227279
    Abstract: A method of manufacturing a semiconductor element of good characteristics at a reduced manufacturing cost is provided. The manufacturing method of the semiconductor element includes a GaN-containing semiconductor layer forming step, an electrode layer forming step, a step of forming an Al film on the GaN-containing semiconductor layer, a step of forming a mask layer made of a material of which etching rate is smaller than that of a material of the Al film, a step of forming a ridge portion using the mask layer as a mask, a step of retreating a position of a side wall of the Al film with respect to a position of a side wall of the mask layer, a step of forming, on the side surface of the ridge portion and the top surface of the mask layer, a protective film made of a material of which etching rate is smaller than that of the material forming the Al film, and a step of removing the Al film and thereby removing the mask layer and a portion of the protective film formed on the top surface of the mask layer.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: July 24, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Katayama, Hiroyuki Kitabayashi, Satoshi Arakawa
  • Publication number: 20120175670
    Abstract: A method for manufacturing a light emitting element including the steps of (A) sequentially forming on a substrate a first compound semiconductor layer having a first conduction type, an active layer, and a second compound semiconductor layer having a second conduction type; (B) forming a plurality of point-like hole portions in a thickness direction in at least a region of the second compound semiconductor layer located outside a region to be provided with a current confinement region; and (C) forming an insulating region by subjecting a part of the second compound semiconductor layer to an insulation treatment from side walls of the hole portions so as to produce the current confinement region surrounded by the insulating region in the second compound semiconductor layer.
    Type: Application
    Filed: March 20, 2012
    Publication date: July 12, 2012
    Applicant: SONY CORPORATION
    Inventors: Yuji Masui, Takahiro Arakida, Rintaro Koda, Tomoyuki Oki
  • Patent number: 8216482
    Abstract: A method of manufacturing an inkjet printhead includes forming a chamber layer having multiple ink chambers on a substrate. A sacrificial layer is formed and is configured to fill a space associated with the ink chambers on the chamber layer. A nozzle layer is formed on the top surfaces of the chamber layer and the sacrificial layer and having multiple nozzles. An etching mask is prepared on the bottom surface of the substrate. The etching mask has at least one linear etching pattern configured to define a portion of the substrate in which an ink feed hole is to be formed. The substrate is etched through the linear etching pattern until the sacrificial layer is exposed and a through hole is formed. The through hole defines the portion of the substrate in which the ink feed hole is to be formed. The sacrificial layer and the portion of the substrate surrounded by the through hole are removed to form the ink feed hole.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: July 10, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Seok Kim, Yong-Seop Yoon, Moon-Chul Lee, Yong-Won Jeong, Dong-Sik Shim, Hyung Choi
  • Patent number: 8217407
    Abstract: A method of manufacturing a light emitting device, including the steps of: (A) sequentially forming a first compound semiconductor layer of a first conduction type, an active layer, and a second compound semiconductor layer of a second conduction type different from said first conduction type, over a substrate; and (B) exposing a part of said first compound semiconductor layer, forming a first electrode over said exposed part of said first compound semiconductor layer and forming a second electrode over said second compound semiconductor layer, wherein said method further includes, subsequent to said step (B), the step of: (C) covering at least said exposed part of said first compound semiconductor layer, an exposed part of said active layer, an exposed part of said second compound semiconductor layer, and a part of said second electrode with an SOG layer.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: July 10, 2012
    Assignee: Sony Corporation
    Inventors: Yoshiaki Watanabe, Tomonori Hino, Nobukata Okano, Hisayoshi Kuramochi, Yuichiro Kikuchi, Tatsuo Ohashi
  • Patent number: 8218919
    Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: July 10, 2012
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Karen Tyger
  • Patent number: 8193019
    Abstract: A VCSEL with undoped mirrors. An essentially undoped bottom DBR mirror is formed on a substrate. A periodically doped first conduction layer region is formed on the bottom DBR mirror. The first conduction layer region is heavily doped at a location where the optical electric field is at about a minimum. An active layer, including quantum wells, is on the first conduction layer region. A periodically doped second conduction layer region is connected to the active layer. The second conduction layer region is heavily doped where the optical electric field is at a minimum. An aperture is formed in the epitaxial structure above the quantum wells. A top mirror coupled to the periodically doped second conduction layer region. The top mirror is essentially undoped and formed in a mesa structure. An oxide is formed around the mesa structure to protect the top mirror during wet oxidation processes.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: June 5, 2012
    Assignee: Finisar Corporation
    Inventors: Ralph H. Johnson, R. Scott Penner, James Robert Biard, Colby Fitzgerald
  • Patent number: 8193015
    Abstract: A method for forming a light-emitting-diode (LED) array is disclosed includes forming an LED structure on a substrate. The LED structure is divided into at least a first LED device and a second LED device with a gap between the first LED device and the second LED device. At least one polymer material is deposited over the LED structure to substantially fill the gap with the at least one polymer material. Portions of the at least one polymer material are removed to expose a first electrode of the first LED device and a second electrode of the second LED device. An interconnect is formed on top of the at least one polymer material electrically connecting the first and second electrode.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: June 5, 2012
    Assignee: Pinecone Energies, Inc.
    Inventors: Ray-Hua Horng, Yi-An Lu, Heng Liu
  • Patent number: 8193018
    Abstract: A method of patterning a substrate that includes locating a single mask film over the substrate and forming first opening portions in first locations in the mask film. First electrical materials are deposited over the substrate and mask film to form patterned areas in the first locations. Second opening portions are formed in second locations different from the first locations in the mask film. Subsequently, second electrical materials are deposited over the substrate and mask film to form patterned areas in the first and second locations.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: June 5, 2012
    Assignee: Global OLED Technology LLC
    Inventor: Ronald S. Cok
  • Patent number: 8193541
    Abstract: A light emitting diode (LED) structure and a LED packaging structure are disclosed. The LED structure includes a sub-mount, a stacked structure, an electrode, an isolation layer and a conductive thin film layer. The sub-mount has a first surface and a second surface opposite the first surface. The stacked structure has a first semiconductor layer, an active layer and a second semiconductor layer that are laminated on the first surface. The electrode is disposed apart from the stacked structure on the first surface. The isolation layer is disposed on the first surface to surround the stacked structure as well as cover the lateral sides of the active layer. The conductive thin film layer connects the electrode to the stacked structure and covers the stacked structure.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: June 5, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Yao-Jun Tsai, Chen-Peng Hsu, Hung-Lieh Hu, Ji-Feng Chen
  • Publication number: 20120135557
    Abstract: A method for producing a Group III nitride semiconductor light-emitting device includes forming a first stripe-pattern embossment on the top surface of a sapphire substrate, so that first grooves parallel to the x-axis direction (the c-axis direction of the sapphire substrate) are periodically arranged at specific intervals. Subsequently, an insulating film is formed over the entire surface of the first stripe-pattern embossment. Next, a second stripe-pattern embossment is formed so that second grooves, each having a flat bottom surface, are periodically arranged at specific intervals and parallel to the y-axis direction, which is orthogonal to the x-axis direction. A GaN crystal is grown through MOCVD on side surfaces of each second groove of the sapphire substrate, to thereby form, on the sapphire substrate, an m-plane GaN base layer. An LED device structure is formed on the base layer, to thereby produce a light-emitting device.
    Type: Application
    Filed: November 23, 2011
    Publication date: May 31, 2012
    Applicant: Toyoda Gosei Co., Ltd.
    Inventor: Koji OKUNO
  • Patent number: 8188487
    Abstract: A surface emitting laser includes a lower multilayer mirror, an active layer, and an upper multilayer mirror stacked onto a substrate. A first current confinement layer having a first electrically conductive region and a first insulating region is formed above or below the active layer using a first trench structure. A second current confinement layer having a second electrically conductive region and a second insulating region is formed above or below the first current confinement layer using a second trench structure. The first and second trench structures extend from a top surface of the upper multilayer mirror towards the substrate such that the second trench structure surrounds the first trench structure. When the surface emitting laser is viewed in an in-plane direction of the substrate, a boundary between the first electrically conductive region and the first insulating region is disposed inside the second electrically conductive region.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: May 29, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mitsuhiro Ikuta
  • Patent number: 8183074
    Abstract: A method for manufacturing a light emitting element includes the steps of (A) forming sequentially a first compound semiconductor layer having a first conduction type, an active layer, and a second compound semiconductor layer having a second conduction type on a substrate, (B) forming a plurality of point-like hole portions in a thickness direction in at least a region of the second compound semiconductor layer located outside a region to be provided with a current confinement region, and (C) forming an insulating region by subjecting a part of the second compound semiconductor layer to an insulation treatment from side walls of the hole portions so as to produce the current confinement region surrounded by the insulating region in the second compound semiconductor layer.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventors: Yuji Masui, Takahiro Arakida, Rintaro Koda, Tomoyuki Oki
  • Publication number: 20120119237
    Abstract: A pixelated light emitting diode (LED) and a method for pixelating an LED are described. The pixelated LED includes two or more monolithically integrated electroluminescent elements disposed adjacent each other on a substrate, wherein at least a portion of each electroluminescent element immediately adjacent the substrate includes an inverted truncated pyramidal shape. The method for pixelating an LED includes selectively removing material from the major surface of an LED to a depth below the emissive region, thereby forming an array of inverted truncated pyramid shapes. The efficiency of the pixelated LEDs can be improved by incorporating the truncated pyramidal shape. Additionally, the crosstalk between adjacent LED pixels can be reduced by incorporating the truncated pyramidal shape.
    Type: Application
    Filed: July 27, 2010
    Publication date: May 17, 2012
    Applicant: 3M Innovative Properties Company
    Inventors: Catherine A. Leatherdale, Zhaohui zy Yang
  • Publication number: 20120114004
    Abstract: A nitride semiconductor laser device includes a first semiconductor layer, an active layer, a second semiconductor layer having a ridge portion and a planar portion, a first electrode formed above the ridge portion, and a dielectric film formed on the side wall portion of the ridge portion. A region from a front end face to a predetermined position P is a region A. A region from the predetermined position P to the rear end face is a region B. A thickness of the part of the ridge portion exposed from the dielectric film in the region A is greater than a thickness of the part of the ridge portion exposed from the dielectric film in the region B, and the first electrode is in contact with the ridge portion at least in the region A.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 10, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Tomoya SATOH, Tomohiro YAMAZAKI, Yoshiaki HASEGAWA
  • Patent number: 8168459
    Abstract: A method for manufacturing a resin-embedded semiconductor light-emitting device that is capable of preventing a semiconductor film from being damaged when a growth substrate is delaminated using a laser lift-off method, and that is capable of preventing foreign matter from adhering to the semiconductor film when a resin material is applied. A laser exposure step to delaminate the growth substrate from the semiconductor film comprises a first laser exposure step for performing laser exposure at an energy density at which the resin is broken down but the semiconductor film is not broken down, in a range including a portion adjacent to at least one section of the semiconductor film divided by dividing grooves and at least one section of resin, and a second exposure step for performing laser exposure at an energy density at which the semiconductor film can be broken down in a range including at least one section.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: May 1, 2012
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Sho Iwayama, Takanobu Akagi
  • Publication number: 20120097919
    Abstract: A method of fabricating a substrate for a semipolar III-nitride device, comprising patterning and forming one or more mesas on a surface of a semipolar III-nitride substrate or epilayer, thereby forming a patterned surface of the semipolar III-nitride substrate or epilayer including each of the mesas with a dimension/along a direction of a threading dislocation glide, wherein the threading dislocation glide results from a III-nitride layer deposited heteroepitaxially and coherently on a non-patterned surface of the substrate or epilayer.
    Type: Application
    Filed: October 26, 2011
    Publication date: April 26, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: James S. Speck, Anurag Tyagi, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8163581
    Abstract: Techniques to utilize layer transfer schemes such as ion-cut to form novel light emitting diodes (LEDs), CMOS image sensors, displays, microdisplays and solar cells are disclosed.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: April 24, 2012
    Assignee: Monolith IC 3D
    Inventors: Zvi Or-Bach, Deepak C. Sekar
  • Patent number: 8164108
    Abstract: A light emitting diode chip includes a thermal conductive substrate, an epi-layer, a thin-type ohmic contacting film, a transparent conducting layer, and an electrode pad. The epi-layer includes a p-type semiconductor layer, an n-type semiconductor layer, and an active layer. The n-type semiconductor layer includes a stepped surface at a side thereof facing away from the substrate, and the stepped surface includes a central portion and a peripheral portion surrounding the central portion. The n-type semiconductor layer has a thickness decreasing along directions from a center thereof to opposite lateral peripheries thereof. The ohmic contacting film is arranged on the stepped surface. The conducting layer is arranged on the ohmic contacting film. The electrode pad is arranged on the conducting layer and located corresponding to the central portion of the stepped surface.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: April 24, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chih-Chen Lai
  • Patent number: 8164105
    Abstract: Disclosed is a light emitting device. The light emitting device comprises a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer, the second conductive semiconductor layer comprising a first area and a second area, a third conductive semiconductor layer on the second area of the second conductive semiconductor layer, a first electrode layer electrically connecting the first conductive semiconductor layer with the second conductive semiconductor layer of the second area, and a second electrode layer electrically connecting the second conductive semiconductor layer with the third conductive semiconductor layer.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: April 24, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyung Jo Park
  • Patent number: 8159000
    Abstract: Disclosed is a light emitting diode (LED) package having an array of light emitting cells coupled in series. The LED package comprises a package body and an LED chip mounted on the package body. The LED chip has an array of light emitting cells coupled in series. Since the LED chip having the array of light emitting cells coupled in series is mounted on the LED package, it can be driven directly using an AC power source.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: April 17, 2012
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Chung Hoon Lee, Keon Young Lee, Hong San Kim, Dae Won Kim, Hyuck Jung Choi
  • Patent number: 8153455
    Abstract: A method for enhancing light extraction efficiency of a light emitting diode is disclosed. The method includes the steps of providing a light emitting diode including in sequence a substrate, a first layer of a first conduction type, an active layer, and a second layer of a second conduction type opposite to the first conduction type; growing a number of protrusions on at least one layer selected from the first layer, the active layer, and the second layer of the light emitting diode to form a patterned oxide layer for protecting the light emitting diode from etch; controlling height of the protrusions to achieve a predetermined etching depth of the light emitting diode; dry etching through a portion of the light emitting diode which is not protected by the patterned oxide layer to form a plurality of depressions on the light emitting diode; and removing the oxide layer from the selected layer. The light emitting diode is patterned so that more light beams can be emitted.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: April 10, 2012
    Assignee: Walsin Lihwa Corporation
    Inventors: Ming-Teng Kuo, Jang-Ho Chen, Ching-Hwa Chang Jean
  • Patent number: 8154035
    Abstract: In a nitride semiconductor light emitting element, a light transmitting substrate has an upper surface on which a nitride semiconductor layer including at least a light emitting layer is formed. On the upper surface of the light transmitting substrate, recess regions and rise regions are formed. One of each of the recess regions and each of the rise regions is formed by a polygon having at least one apex having an interior angle of 180° or greater when viewed in a planar view. The other of each of the recess regions and each of the rise regions is formed not to be connected to one another in a straight line when viewed in a planar view. A nitride semiconductor light emitting element having such a configuration has excellent light extraction efficiency and can be manufactured at a moderate cost.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: April 10, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Mayuko Fudeta
  • Patent number: 8148737
    Abstract: Disclosed are a light emitting device, a light emitting device package and a lighting system. The light emitting device of the embodiment includes a light emitting structure including a first conductive semiconductor layer, an active layer over the first conductive semiconductor layer, and a second conductive semiconductor layer over the active layer; a dielectric layer over a first region of the first conductive semiconductor layer; a second electrode over the dielectric layer; and a first electrode over a second region of the first conductive semiconductor layer.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: April 3, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sung Min Hwang
  • Patent number: 8137995
    Abstract: A semiconductor device is made by forming a first active device on a first side of a semiconductor wafer. A first insulating layer is formed over the first side of the wafer. A first conductive layer is formed over the first insulating layer. A first interconnect structure is formed over the first insulating layer and first conductive layer. A temporary carrier is mounted to the first interconnect structure. A second active device is formed on a second side of the semiconductor wafer. A second insulating layer is formed over the second side of the wafer. A second conductive layer is formed over the second insulating layer. A second interconnect structure is formed over the second insulating layer and second conductive layer. The temporary carrier is removed, leaving a double-sided semiconductor device. The double-sided semiconductor device is enclosed in a package with the first and second interconnect structures electrically connected.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: March 20, 2012
    Assignee: STATS ChipPAC, Ltd.
    Inventors: OhHan Kim, JoungUn Park, SunMi Kim
  • Patent number: 8137998
    Abstract: A light-emitting device comprises a lattice structure to minimize the horizontal waveguide effect by reducing light traveling distance in the light-absorption medium of the light-emitting devices, and to enhance light extraction from the light-emitting layer. The lattice structure includes sidewalls and/or rods embedded in the light-absorption medium and dividing the light-absorption medium into a plurality of area units. The area units are completely isolated or partially separated from each other by the sidewalls. Also provided is a method of fabricating a light-emitting device that comprises a lattice structure, which lattice structure includes sidewalls and/or rods embedded in the light-absorption medium and dividing the light-absorption medium into a plurality of area units.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: March 20, 2012
    Assignee: Invenlux Limited
    Inventors: Chunhui Yan, Jianping Zhang
  • Patent number: 8138002
    Abstract: A convex part formation method of forming a convex part in parallel with a <110> direction of a backing on the backing having a {100} face as the top surface thereof, includes: (a) forming a mask layer in parallel with the <110> direction on the backing; (b) etch the backing so as to form a convex-part upper layer whose sectional shape on a cutting plane corresponding to a {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?U; and (c) further etching the backing so as to form a convex-part lower layer whose sectional shape on the cutting plane corresponding to the {110} face is an isosceles trapezoid, the base of which is longer than the upper side thereof, and the side surface of which has an inclination of ?D (where ?D??U).
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: March 20, 2012
    Assignee: Sony Corporation
    Inventors: Kiyotaka Yashima, Yoshinari Kiwaki, Kamada Michiru, Sachio Karino, Hironobu Narui, Nobukata Okano
  • Publication number: 20120064642
    Abstract: A Light-Emitting Diode (LED) is formed on a sapphire substrate that is removed from the LED by grinding and then etching the sapphire substrate. The sapphire substrate is ground first to a first specified thickness using a single abrasive or multiple abrasives. The remaining sapphire substrate is removed by dry etching or wet etching.
    Type: Application
    Filed: September 14, 2010
    Publication date: March 15, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hung-Wen HUANG, Hsing-Kuo HSIA, Ching-Hua CHIU
  • Patent number: 8130804
    Abstract: A laser diode capable of independently driving each ridge section, and inhibiting rotation of a polarization angle resulting from a stress applied to the ridge section without lowering reliability and a method of manufacturing the same are provided. A laser diode includes: three or more strip-like ridge sections in parallel with each other with a strip-like trench in between, including at least a lower cladding layer, an active layer, and an upper cladding layer in this order; an upper electrode on a top face of each ridge section, being electrically connected to the upper cladding layer; a wiring layer electrically connected to the upper electrode, in the air at least over the trench; and a pad electrode in a region different from regions of both the ridge section and the trench, being electrically connected to the upper electrode through the wiring layer.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: March 6, 2012
    Assignee: Sony Corporation
    Inventors: Makoto Nakashima, Takahiro Yokoyama, Sachio Karino
  • Patent number: 8129494
    Abstract: Disclosed is a polymer having excellent solvent resistance which can be produced by using a polycarbonate diol having a repeating unit represented by the formula (1) and/or (2), having a hydroxyl group at both termini, and having a number average molecular weight of from 300 to 50,000: wherein R1 represents a linear or branched hydrocarbon group having 2 to 50 carbon atoms; and n represents an integer of 2 to 50, wherein R2 represents a linear or branched hydrocarbon group having 10 to 50 carbon atoms.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: March 6, 2012
    Assignee: Asahi Kasei E-Materials Corporation
    Inventor: Katsuya Shimizu
  • Patent number: 8124433
    Abstract: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from the semiconductor material back into the semiconductor so as to enhance the likelihood of the light ultimately being transmitted from the semiconductor material. Such LED can have enhanced utility and can be suitable for uses such as general illumination.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: February 28, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven B. Lester
  • Publication number: 20120037946
    Abstract: In one aspect of the invention, a light emitting device includes a substrate, and a multilayered structure having an n-type semiconductor layer formed in a light emitting region and a non-emission region on the substrate, an active layer formed in the light emitting region on the n-type semiconductor layer, and a p-type semiconductor layer formed in the light emitting region on the active layer. The light emitting device also includes a p-electrode formed in the light emitting region and electrically coupled to the p-type semiconductor layer, and an n-electrode formed in the non-emission region and electrically coupled to the n-type semiconductor layer.
    Type: Application
    Filed: August 12, 2010
    Publication date: February 16, 2012
    Applicant: CHI MEI LIGHTING TECHNOLOGY CORPORATION
    Inventors: Kuo Hui Yu, Chien-Chun Wang, Chang Hsin Chu
  • Patent number: 8115226
    Abstract: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an dielectric material formed intermediate the electrode and a light emitting semiconductor material. Electrical continuity between the semiconductor material and the metal electrode is provided by an optically transmissive ohmic contact layer, such as a layer of Indium Tin Oxide. The metal electrode thus can be physically separated from the semiconductor material by one or more of the dielectric material and the ohmic contact layer. The dielectric layer can increase total internal reflection of light at the interface between the semiconductor and the dielectric layer, which can reduce absorption of light by the electrode. Such LED can have enhanced utility and can be suitable for uses such as general illumination.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: February 14, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 8115224
    Abstract: A light emitting device That includes a first photonic crystal structure having a reflective layer and non-metal pattern elements on the reflective layer, a second conductive semiconductor layer on both the reflective layer and the non-metal pattern elements, an active layer on the second conductive semiconductor layer, and a first conductive semiconductor layer on the active layer.
    Type: Grant
    Filed: October 5, 2009
    Date of Patent: February 14, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sun Kyung Kim
  • Patent number: 8114690
    Abstract: Aspects concerning a method of making electrical contact to a region of semiconductor in which one or more LEDs are formed include that a dielectric region can be formed on a p region of the semiconductor, and that a metallic electrode can be formed on (at least partially on) the region of dielectric material. A transparent layer of a material such as Indium Tin Oxide can be used to make ohmic contact between the semiconductor and the metallic electrode, as the metallic electrode is separated from physical contact with the semiconductor by one or more of the dielectric material and the transparent ohmic contact layer (e.g., ITO layer). The dielectric material can enhance total internal reflection of light and reduce an amount of light that is absorbed by the metallic electrode.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: February 14, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 8114691
    Abstract: A semiconductor light emitting diode having a textured structure and a method of manufacturing the same are provided. The semiconductor light emitting diode includes a first semiconductor layer formed into a textured structure, an intermediate layer formed between the textured structures of the patterned first semiconductor layer, and a second semiconductor layer, an active layer, and a third semiconductor layer sequentially formed on the first semiconductor layer and the intermediate layer.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: February 14, 2012
    Assignee: Samsung LED Co., Ltd.
    Inventors: Jeong-wook Lee, Youn-joon Sung, Ho-sun Paek
  • Publication number: 20120025230
    Abstract: A three-dimensional LED structure with vertically displaced active-region includes at least two groups of vertically displaced surfaces on a non-planar substrate. The first group of surfaces are separated from the second group of surfaces by a vertical distance in the growth direction of the LED structure. The first group of surfaces are connected to the second group of surfaces by sidewalls, respectively. The sidewalls can be inclined or vertical and have a sufficient height so that a layer such as an n-type layer, an active-region, or a p-type layer in a first LED structure deposited on the first group of surfaces and a corresponding layer such as an n-type layer, an active-region, or a p-type layer in a second LED structure deposited on the second group of surfaces are separated by the sidewalls. The two groups of surfaces may be vertically displaced from each other in certain areas of an LED chip, while merge into an integral surface in other areas.
    Type: Application
    Filed: July 30, 2010
    Publication date: February 2, 2012
    Applicant: InvenLux CORPORATION
    Inventors: CHUNHUI YAN, JIANPING ZHANG, YING LIU, FANGHAI ZHAO, KEVIN MA
  • Patent number: 8105921
    Abstract: The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: January 31, 2012
    Assignee: International Rectifier Corporation
    Inventors: T. Warren Weeks, Jr., Edwin Lanier Piner, Thomas Gehrke, Kevin J. Linthicum
  • Patent number: 8105852
    Abstract: A method according to embodiments of the invention includes providing a substrate comprising a host and a seed layer bonded to the host. The seed layer comprises a plurality of regions. A semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is grown on the substrate. A top surface of a semiconductor layer grown on the seed layer has a lateral extent greater than each of the plurality of seed layer regions.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: January 31, 2012
    Assignees: Koninklijke Philips Electronics N.V., Philips Lumileds Lighting Company, LLC
    Inventors: Nathan F. Gardner, Michael R. Krames, Melvin B. McLaurin, Sungsoo Yi
  • Patent number: 8093081
    Abstract: A device of a light-emitting diode and a method for fabricating the same are provided. The LED device is made by forming a patterned epitaxial layer, a light-emitting structure, etc., on a substrate. In a subsequent process, the patterned epitaxial layer serves as a weakened structure, and can be automatically broken and a rough surface is thus formed. The weakened structure is formed with a specified height, and has pillar structures. The light-emitting structure is formed on the weakened structure. During a cooling process at room temperature, the weakened structure is automatically broken and a rough surface is thus formed.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: January 10, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Po-Chun Liu, Chu-Li Chao, Yih-Der Guo
  • Patent number: 8090229
    Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: January 3, 2012
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Karen Tyger