Abstract: The invention provides a semiconductor element having a semiconductor junction composed of silicon-based films, at least one of the silicon-based films containing a microcrystal. The microcrystal is located in at least one interface region of the silicon-based film containing the microcrystal and has no orientation property. Further, the invention provides a semiconductor element having a semiconductor junction composed of silicon-based films, at least one of the silicon-based films containing a microcrystal, and the orientation property of the microcrystal changing in a film thickness direction of the silicon-based film containing the microcrystal. Thereby, a silicon-based film having a shortened tact time, an increased film forming rate, and excellent characteristics, and a semiconductor element including this silicon-based film having excellent adhesion and environmental resistance can be obtained.

Abstract: A top surface of a wafer is provided with an n-type source region, an n-type drain region, and an n-type semiconductor region. Dry etching using a plasma is performed with respect to an interlayer insulating film deposited on the wafer to form openings reaching the respective regions, followed by light etching for removing a damaged layer. In this case, exciting light is supplied intermittently to the n-type semiconductor region. The progression of the removal of the damaged layer and the stage of development of a newly damaged layer are sensed by monitoring the change rate of the intensity of reflected probe light in the presence and absence of the exciting light, resulting in the formation of a semiconductor device having low and equal contact resistance. In-line control using optical evaluation enables the implementation of semiconductor devices with excellent and consistent properties.

Abstract: A semiconductor device Having: a semiconductor substrate; a first gate electrode constructed of a multi-layered stack member provided in a memory region, formed with memory cells, so that the first gate electrode is insulated by a first insulating layer from the semiconductor substrate; and a second gate electrode provided in a logic region, formed with a logic circuit for controlling at least the memory cells, so that the second gate electrode is insulated by a second insulating layer from a semiconductor substrate, wherein said layer, brought into contact with the first insulating layer, of the first gate electrode and the layer, brought into contact with the second insulating layer, of the second gate electrode, are composed of materials different from each other, and a method for making the same.

Abstract: A low temperature process for forming a metal doped silicon layer in which a silicon layer is deposited onto a substrate at low temperatures, with a metal doping layer then deposited upon the silicon layer. This structure is then annealed at low temperatures to form a metal doped semiconductor having greater than about 1×1020 dopant atoms per cm3 of silicon.

Abstract: A method for forming a polysilicon FinFET (10) or other thin film transistor structure includes forming an insulative layer (12) over a semiconductor substrate (14). An amorphous silicon layer (32) forms over the insulative layer (12). A silicon germanium seed layer (44) forms in association with the amorphous silicon layer (32) for controlling silicon grain growth. The polysilicon layer arises from annealing the amorphous silicon layer (32). During the annealing step, silicon germanium seed layer (44), together with silicon germanium layer (34), catalyzes silicon recrystallization to promote growing larger crystalline grains, as well as fewer grain boundaries within the resulting polysilicon layer. Source (16), drain (18), and channel (20) regions are formed within the polysilicon layer. A double-gated region (24) forms in association with source (16), drain (18), and channel (20) to produce polysilicon FinFET (10).

Abstract: A method of crystallizing silicon including preparing a substrate having an amorphous silicon film formed thereon, aligning a mask having a first energy region and a second energy region over a first region of the amorphous silicon film formed on the substrate, irradiating a laser beam through the first and second energy regions of the mask onto the first region of the amorphous silicon film, crystallizing the first region of the amorphous silicon film by irradiating the laser beam through the first energy region of the mask, and activating the crystallized first region by irradiating the laser beam through the second energy region.

Abstract: The number of grains in active regions of devices can be made uniform by making the grains of crystalline semiconductor films, obtained by thermal crystallization using a metal element, smaller. The present invention is characterized in that a semiconductor film is exposed within an atmosphere in which a gas, having as its main constituent one or a plurality of members from the group consisting of inert gas elements, nitrogen, and ammonia, is processed into a plasma, and then thermal crystallization using a metal element is performed. The concentration of crystal nuclei1 generated is thus increased, making the grain size smaller, by performing these processes. Heat treatment may also be performed, of course, after exposing the semiconductor film, to which the metal element is added, to an atmosphere in which a gas, having as its main constituent one or a plurality of members from the group consisting of inert gas elements, nitrogen, and ammonia, is processed into a plasma.

Abstract: A metal induced crystallization process is provided which employs an amorphous silicon film precursor deposited by physical vapor deposition, wherein the precursor film does not readily undergo crystallization by partial solid phase crystallization. Using this physical vapor deposition amorphous silicon precursor film, the amorphous silicon film is transformed to polysilicon by metal induced crystallization wherein the crystalline growth occurs fastest at regions that have been augmented with a metal catalyst and proceeds extremely slowly, practically zero, at regions which bear no metal catalyst. Accordingly, by use of the physical vapor deposition amorphous silicon precursor film in the process of the present invention, the metal induced crystallization process may take place at higher annealing temperatures and shorter annealing times without solid phase crystallization taking place.

Abstract: A method for precise thinning to form a recess to a precise depth in a crystalline silicon layer, which can be used to form various devices, such as MOSFET devices, includes the following steps. Form a patterning mask with a window therethrough over the top surface of the silicon layer. Form an amorphized region in the top surface of the silicon layer below the window. Selectively etch away the amorphized region of the silicon layer to form a recess in the surface of the silicon layer, and remove the patterning mask In the case of an MOSFET device form a hard mask below the patterning mask with the window extending therethrough. Then create sidewall spacers in the window through the hard mask and form a gate electrode stack in the window. Then remove the hard mask and form the source/drain extensions, halos and regions plus silicide and complete the MOSFET device.

Abstract: Disclosed is a semiconductor device having a driver circuit operable at high speed and a method for manufacturing same. An active matrix liquid crystal display device uses a polysilicon film for its TFT active layer constituting a pixel matrix circuit because of low off current characteristics. On the other hand, a TFT active layer constituting driver circuits and a signal processing circuit uses a poly silicon germanium film because of high speed operation characteristics.

Abstract: A mask including a material, which has heat resistance and light absorptivity, is selectively formed on a crystalline silicon film containing a catalytic element. Next, by using the mask, phosphorus is implanted into the silicon film and an implanted portion of the silicon film is transformed into amorphous. Then the silicon film is heated by a rapid thermal annealing (RTA) method, so that the temperature of the portion covered with the mask becomes higher than other portions. As a result, the catalytic element moves from the high temperature portion covered with the mask to the lower temperature amorphous portion in which phosphorus has been implanted and which has a large gettering capacity. Thus, the concentration of the catalytic element in the portion covered with the mask is lowered, and a semiconductor device is manufactured by using the film.

Abstract: An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.

Abstract: There is provided a technique for effectively removing a metallic element for promoting crystallization in a semiconductor film with a crystalline structure after the semiconductor film is obtained using the metallic element, to reduce a variation between elements. In a step of forming a gettering site, a plasma CVD method is used and a film formation is conducted using raw gas including monosilane, noble gas, and nitrogen to obtain a semiconductor film which includes the noble gas element at a high concentration, specifically, a concentration of 1×1020/cm3 to 1×1021/cm3 and has an amorphous structure, typically, an amorphous silicon film.

Abstract: In the manufacture of a wafer-type silicon solar cell having on its front side a silicon nitride AR coating and an electrical contact that is formed by printing a thick film metal ink onto the silicon nitride in the form of a grid-like pattern having narrow fingers and then firing that ink to convert it to a bonded metal contact, a surface treatment method is provided to adjust the condition of the surface of the silicon nitride coating in a manner that substantially improves the adherence of the thick film ink to the silicon nitride coating, thereby eliminating or substantially inhibiting the tendency of the narrow fingers of the unfired ink to peel away before the ink has been fired to produce the electrical contact. The surface treatment method comprises subjecting the silicon nitride layer to a corona discharge using a plasma jet and is readily incorporated into the manufacturing process sequence without requiring any modification of existing stages of that sequence.

Abstract: A thin-film transistor is formed by a polycrystalline silicon film having a thin-film part and a thick-film part, the thin-film part minimally being used as a channel part. The polycrystalline silicon film is formed by laser annealing with an energy density that completely melts the thin-film part but does not completely melt the thick-film part. Because large coarse crystal grains growing from the boundary between the thin-film part and the thick-film part form the channel part, it is possible to use a conventional laser annealing apparatus to easily achieve high carrier mobility and low leakage current and the like.

Abstract: A thin-film transistor includes a substrate, and a gate including a double-layered structure having first and second metal layers provided on the substrate, the first metal layer being wider than the second metal layer by 1 to 4 &mgr;m. A method of making such a thin-film transistor includes the steps of: depositing a first metal layer on a substrate, depositing a second metal layers directly on the first metal layer; forming a photoresist having a designated width on the second metal layer; patterning the second metal layer via isotropic etching using the photoresist as a mask; patterning the first metal layer by means of an anisotropic etching using the photoresist as a mask, the first metal layer being etched to have the designated width, thus forming a gate having a laminated structure of the first and second metal layers; and removing the photoresist.

Abstract: A thin film transistor optical detecting sensor includes an array substrate having a transparent substrate, a plurality of sensor thin film transistors disposed on the transparent substrate, each having a first silicon layer of a first thickness, a plurality of storage capacitors, each connected with a corresponding one of the plurality of sensor thin film transistors, storing charges of an optical current, and a plurality of switch thin film transistors, each having a second silicon layer of a second thickness less than the first thickness.

Abstract: The present invention is characterized in that gettering is performed such that impurity regions to which a noble gas element is added are formed in a semiconductor film and the metallic element included in the semiconductor film is segregated into the impurity regions by laser annealing. Also, a reflector is provided under a substrate on which a semiconductor film is formed. When laser light transmitted through the semiconductor film substrate is irradiated from the front side of the substrate, the laser beam is reflected by the reflector and thus the laser light can be irradiated to the semiconductor film from the read side thereof. Laser light can be also irradiated to low concentration impurity regions overlapped with a portion the gate electrode. Thus, an effective energy density in the semiconductor film is increased to thereby effect recovery of crystallinity and activation of the impurity element.

Abstract: The present invention improves a productivity in growing an a-Si film in a thin film transistor and to obtain an excellent thin film transistor characteristic. More specifically, disclosed is a thin film transistor in which an amorphous silicon film 2, a gate insulating film 3 and a gate electrode are sequentially stacked on an insulating substrate 1. The amorphous silicon film 2 includes a low defect-density amorphous silicon layer 5 formed at a low deposition rate and a high deposition rate amorphous silicon layer 6 formed at a deposition rate higher than that of the low defect-density amorphous silicon layer 5. The low defect-density amorphous silicon layer 5 in the amorphous silicon film 2 is grown closer to the insulating substrate 1, and the high deposition rate amorphous silicon layer 6 is grown closer to the gate insulating film 3.

Abstract: A method of forming a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; depositing a catalyst metal on the amorphous silicon layer; disposing first and second electrodes contacting the amorphous silicon layer along a first direction; heating the amorphous silicon layer under a first temperature and simultaneously applying a first voltage to the first and second electrodes to form a first crystallized amorphous silicon layer; disposing third and fourth electrodes contacting the first crystallized amorphous silicon layer along a second direction, the second direction being different from the first direction; and heating the first crystallized amorphous silicon layer under a second temperature and simultaneously applying a second voltage to the third and fourth electrodes to form a secondly crystallized amorphous silicon layer.

Abstract: Disclosed is a method for crystallizing amorphous silicon, in which a substrate on which an amorphous silicon layer is formed is first prepared, and then a mask is disposed above the substrate. The mask is divided into first and second blocks, the first block having a plurality of first transmission slits and a plurality of interception portions formed between the first transmission slits, the second block having a plurality of second transmission slits alternately arranged with the first transmission slits and a plurality of third transmission slits formed corresponding to middle portions of the first transmission slits. Afterwards, first crystalline regions are formed on the amorphous silicon layer by irradiating a laser beam through the first transmission slits.

Abstract: A method of irradiation of plural pulse laser beams onto one position of a non-single crystal semiconductor, wherein the pulse laser beams are not higher in energy density than an energy density threshold value necessary for causing a micro-crystallization of the non-single crystal semiconductor.

Abstract: In a discharge space, a substrate 201 and a cathode 206 are disposed a distance d (cm) apart from each other, and gas containing one or more silicon compounds and hydrogen are introduced into the discharge space, and a product Pd of a film forming pressure P (Pa) and d, and a hydrogen flow rate M (SLM) are set so as to meet a relation: 80M+200≦Pd≦160M+333, and an RF power is applied to generate a plasma and a non-monocrystal silicon thin film is formed on the substrate 201 in the discharge space. Thereby, there is provided a thin film formation method making it possible to form an amorphous silicon film in which both a uniform film forming rate of a film distribution facilitating an implementation of a large area and a high conversion efficiency can be obtained while achieving an increase in the film forming rate.

Abstract: A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique.

Abstract: To provide a method of efficiently configuring a circuit requiring high inter-device consistency by using thin-film transistors. A semiconductor layer is formed on a substrate and is patterned into desired shapes to form first semiconductor islands. The first semiconductor islands are uniformly crystallized by laser irradiation within the surface areas thereof. Thereafter, the semiconductor layers are patterned into desired shapes to become active layers of the thin-film transistors layer. Active layers of all of thin-film transistors constituting one unitary circuit are formed of one of the first semiconductor islands in this case. Thus, the TFTs mutually realize high consistency.

Abstract: A method of manufacturing a semiconductor device comprises a step of depositing a crystalline insulating layer oriented in a predetermined crystal face orientation by epitaxial growth on an amorphous semiconductor layer, a step of depositing a second amorphous semiconductor layer on the crystalline insulating layer, a step of growing said first and second semiconductor layers into a polycrystal or single crystal layer in a solid phase, using said crystalline insulating film as core, and a step of forming a functional element containing said first and second semiconductor layer.

Abstract: The present invention relates to a method of fabricating polysilicon film by Nickel and Copper induced lateral crystallization for the TFT-LCD, comprising the step of: a) a thin (˜4 nm) Copper and Nickel being evaporated onto the substrate; b) a amorphous-silicon film (˜50 nm) being evaporated onto thereof obtained according to a); c) applying annealing at less than 600° C. to thereof obtained according to b) for fast fabricating poly-silicon film. It is approximately 10 times faster than that of Ni induced polysilicon. The present invention is to provide a low-temperature (<600° C.) fast growth rate process to convert the hydrogenated amorphous silicon (a-Si:H) films to polysilicon film for substantially time-saving process and industrial applicability.

Abstract: A thin film transistor using an intrinsic polycrystalline silicon film, the thin film transistor fabricated by forming an insulation layer on a substrate, forming a first amorphous silicon layer on the insulation layer, forming silicon nucleation sites on the first amorphous silicon layer; converting the first amorphous silicon layer into hemispherical grained silicon, forming a second amorphous silicon layer covering the hemispherical grained silicon, annealing the second amorphous silicon layer to convert the second amorphous silicon layer into a grained silicon film, patterning an oxide layer into a transistor gate oxide and leaving uncovered sections of the grained silicon on opposing sides of the transistor gate oxide, conductively doping the uncovered sections of the grained silicon and forming a patterned metal gate on the transistor gate oxide.

Abstract: A driver circuit integration type (monolithic type) active matrix display device having high performance is formed by using thin film transistors (TFT). While a nickel element is added t an amorphous silicon film 203, a head treatment is carried out to thereby crystallize the amorphous silicon film. Further, by carrying out a heat treatment in an oxidizing atmosphere containing a halogen element, a thermal oxidation film 209 is formed. At this time, cyrstallinity is improved and gettering of the nickel element proceeds. TFTs are formed by using the thus obtained crystalline silicon film, and various circuits are constituted by using the TFTs, so that a data driver circuit capable of driving the active matrix circuit having the dot number of fifty thousands to three millions can be obtained.

Abstract: A method of forming a doped polycrystalline silicon gate in a Metal Oxide Semiconductor (MOS) device. The method includes forming first an insulation layer on a top surface of a crystalline silicon substrate. Next, an amorphous silicon layer is formed on top of and in contact with the insulation layer and then a dopant is introduced in a top surface layer of the amorphous silicon layer. The top surface of the amorphous silicon layer is irradiated with a laser beam and the heat of the radiation causes the top surface layer to melt and initiates explosive recrystallization (XRC) of the amorphous silicon layer. The XRC process transforms the amorphous silicon layer into a polycrystalline silicon gate and distributes the dopant homogeneously throughout the polycrystalline gate.

Abstract: A target-backing plate assembly for use in physical vapor deposition (PVD) processes. The lower curved surface of the target of the assembly is received in a conformingly-shaped backing plate, while a planar upper surface is presented for PVD. The shape of the target increases the amount of material dissipated and the quality of the film and reduces the amount of necessary machining in production.

Abstract: A plasma is produced in a treatment space by diffusing a plasma gas at atmospheric pressure and subjecting it to an electric field created by two metallic electrodes separated by a dielectric material, a vapor precursor is mixed with the plasma, and a substrate material is coated by vapor deposition of the vaporized substance at atmospheric pressure in the plasma field. The use of vaporized silicon-based materials, fluorine-based materials, chlorine-based materials, and organo-metallic complex materials enables the manufacture of coated substrates with improved properties with regard to moisture-barrier, oxygen-barrier, hardness, scratch- and abrasion-resistance, chemical-resistance, low-friction, hydrophobic and/or oleophobic, hydrophilic, biocide and/or antibacterial, and electrostatic-dissipative/conductive characteristics.

Abstract: An operating semiconductor layer is formed in such a manner that amorphous silicon layer is formed to be shaped so that it has a wide region and a narrow region and the narrow region is connected to the wide region at a position asymmetric to the wide region, and the amorphous silicon layer is crystallized by scanning a CW laser beam from the wide region toward the narrow region in a state that a polycrystalline silicon layer as a heat-retaining layer encloses the narrow region from a side face through the silicon oxide layer.

Abstract: A pan/tilt camera system includes a sensor spaced from a rotational shaft of a pan/tilt camera, a detected piece rotated with the rotational shaft so as to correspond to the sensor, an origin setting unit rotating the rotational shaft in a first direction upon turn-on of a power and thereafter in a second direction opposite to the first direction so that the sensor detects a rear end of the detected piece for setting an origin, a pulse counter applying a predetermined number of pulses to the motor after set of the origin so that the rotational shaft is continuously rotated in the second direction and counting pulses applied to the motor until a front end of the detected piece with respect to the rotation direction of the detected piece is detected, and a backlash calculating unit comparing a count of the pulse counter with the predetermined number of pulses applied to the motor thereby to calculate an amount of backlash of the drive mechanism.

Abstract: A method of manufacturing a crystalline silicon film excellent in crystallinity. When using elements such as nickel as metal elements that promotes the crystallization of the amorphous silicon film, nickel is allowed to be contained in a solution repelled by the surface of the amorphous silicon film. Then, a part of the amorphous silicon film is removed, and the solution is held in only that part. In this way, the nickel elements are selectively introduced into a part of the amorphous silicon film, and a heat treatment is also conducted to allow crystal growth to proceed from that portion toward a direction parallel to a substrate.

Abstract: A method of programming a first memory cell in an array of at least four memory cells in a semiconductor device, each memory cell including a polysilicon gate, first and second spaced-apart diffused regions, a silicide layer provided over the polysilicon gate, an oxide spacer provided contiguous with a vertical sidewall of the polysilicon gate, and a layer of phase change material provided over at least a portion of the silicide layer, contiguous with the oxide spacer, and over the first diffused region.

Abstract: High K dielectric materials having very low leakage current are formed by depositing a thin amorphous layer of a high K dielectric and a crystalline layer of a high K dielectric over the amorphous layer. Semiconductor devices including composite high K dielectric materials, and methods of fabricating such devices, are also disclosed.

Abstract: A method of fabricating a single crystal thin film includes: forming a non-single crystal thin film on an insulating base; subjecting the non-single crystal thin film to a first heat-treatment, thereby forming a polycrystalline thin film in which polycrystalline grains are aligned in an approximately regular pattern; and subjecting the polycrystalline thin film to a second heat-treatment, thereby forming a single crystal thin film in which the polycrystalline grains are bonded to each other. In this method, either the first heat-treatment or the second heat-treatment may be performed by irradiation of laser beams, preferably, emitted from an excimer laser. A single crystal thin film formed by this fabrication method has a performance higher than a related art polycrystalline thin film and is suitable for fabricating a device having stable characteristics. The single crystal thin film can be fabricated for a short-time by using laser irradiation as the heat-treatments.

Abstract: The electrical performance of a dielectric film for capacitive coupling in an integrated structure is enhanced by forming the polycrystalline electrically conductive layer coupled with the dielectric film substantially unigranular over the coupling area, commonly to be defined by patterning the stacked dielectric and conductive layers. The process forms a polycrystalline silicon film having exceptionally large grains of a size on the same order of magnitude as the dimensions of the patterned details. These exceptionally large grains are obtained by preventing the formation of “precursor nuclei” of subsequent grain formation and growth at the deposition interface with the dielectric that are apparently formed during the first instants of silicon CVD deposition and by successively growing the crystallites at a sufficiently low annealing temperature.

Abstract: A thin film deposition method uses a vacuum confinement cup that employs a dense hot filament and multiple gas inlets. At least one reactant gas is introduced into the confinement cup both near and spaced apart from the heated filament. An electrode inside the confinement cup is used to generate plasma for film deposition. The method is used to deposit advanced thin films (such as silicon based thin films) at a high quality and at a high deposition rate.

Abstract: In a method of forming a contact, a liner reactive ion etch is affected on a substrate to remove silicon nitride and silicon oxide. An oxygen plasma ex-situ clean, a Huang AB clean, and a dilute hydrofluric acid (DHF) clean are affected. Amorphous silicon is deposited and an anneal is performed to regrow and recrystallize amorphous silicon.

Abstract: A method of fabricating a polysilicon film by an excimer laser annealing process is introduced. First, an amorphous silicon film is deposited on a substrate composed of glass. The amorphous silicon film includes a first region, which is located in the center, with a first thickness, and a second region, which is located in the periphery, with a slant sidewall. The thickness of the amorphous silicon film is measured so as to obtain the profile of the sidewall in the second region. According to the profile of the sidewall, a pre-cursor region is determined for performing an excimer laser annealing process wherein a second thickness in the boundary of the pre-curser regionis smaller than the first thickness so as to increase area of produced polysilicon film.

Abstract: A pattern forming method of the present invention for forming a predetermined pattern on a photosensitive resin film by (i) layering the photosensitive resin film on an inorganic thin film with which a plastic substrate is coated and (ii) exposing the photosensitive resin film via a photomask having the predetermined pattern in an exposing step is characterized by including the step of heating the plastic substrate having the inorganic thin film before the exposing step, a time from an end of the heating step to a start of the exposing step being managed to be not less than a predetermined time, in accordance with an asymptotic contracting behavior after the end of the heating step of the plastic substrate having the inorganic thin film. With this, it is possible to provide a pattern forming method capable of forming a plurality of patterns on a plastic substrate with high accuracy of superposition, and a display device manufactured using the same.

Abstract: A Thin Film Transistor (TFT) manufacture method, comprising manufacture of a gate, a gate isolation layer, a channel layer, and a source/drain. Wherein, the manufacture of the channel layer comprises: forming a first a-Si layer by using a low deposition rate (LDR) (Chemical Vapor Deposition, CVD); forming a second a-Si layer by using a high deposition rate (HDR); and forming an N+Mixed a-Si layer. When the first a-Si layer is formed in the present invention, the flux ratio of H2/SiH4 is adjusted to a range from 0.40 to 1.00 to increase the number of defects in the first a-Si layer. When the TFT is irradiated by the light, the photo leakage current generated in the channel layer is trapped in the defects in the first a-Si layer. Therefore, the TFT photo leakage current can be significantly reduced.

Abstract: A method of forming the active regions of field effect transistors is proposed. According to the proposed method, shallow implanting profiles for both the halo structures and the source and drain regions can be obtained by carrying out a two-step damaging and amorphizing implantation process. During a first step, the substrate is damaged during a first light ion implantation step and subsequently substantially fully amorphized during a second heavy ion implantation step.

Abstract: A method for manufacturing a semiconductor device having steps of forming an amorphous semiconductor on a substrate having an insulating surface; patterning the amorphous semiconductor to form plural first island-like semiconductors; irradiating a linearly condensed laser beam on the plural first island-like semiconductors while relatively scanning the substrate, thus crystallizing the plural first island-like semiconductors; patterning the plural first island-like semiconductors that have been crystallized into to form plural second island-like semiconductors; forming plural transistors using the plural second island-like semiconductors; and forming a unit circuit using a predetermined number of the transistors, where the second island-like semiconductors used for the predetermined number of the transistors are formed from the first island-like semiconductors that are different from each other.

Abstract: A method is provided for maintaining a planar surface as crystal grains are laterally grown in the fabrication of crystallized silicon films. The method comprises: forming a film of amorphous silicon with a surface and a plurality of areas; irradiating each adjacent areas of the silicon film with a first sequence of laser pulses; and, in response to the first sequence of laser pulses, controlling the planarization of the silicon film surface between adjacent areas of the silicon film as the crystal grains are laterally grown. By controlling the number of laser pulses in the sequence, the temporal separation between pulses, and the relative intensity of the pulses, the lateral growth length characteristics of the crystal grains can be-traded against the silicon film flatness. A silicon film formed by a pulsed laser sequence crystallization process is also provided.

Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.

Abstract: A thin film transistor includes an active silicon layer deposited by physical vapor deposition (PVD), wherein a silicon precursor is doped with impurities prior to use as a target in the PVD chamber, wherein the precursor has a resistivity in the range of about 0.5 &OHgr;-cm<&rgr;s<60 &OHgr;-cm; and wherein the target includes plural, rectangular tiles wherein all individual tiles are larger than 8.5 inches square.

Abstract: A method to enhance grain size in polysilicon films while avoiding formation of hemispherical grains (HSG) is disclosed. The method begins by depositing a first amorphous silicon film, then depositing silicon nuclei, which will act as nucleation sites, on the amorphous film. After deposition of silicon nuclei, crystallization, and specifically HSG, is prevented by lowering temperature and/or raising pressure. Next a second amorphous silicon layer is deposited over the first layer and the nuclei. Finally an anneal is performed to induce crystallization from the embedded nuclei. Thus grains are formed from the silicon bulk, rather than from the surface, HSG is avoided, and a smooth polysilicon film with enhanced grain size is produced.