Abstract: In one embodiment, active diffusion junctions of a solar cell are formed by diffusing dopants from dopant sources selectively deposited on the back side of a wafer. The dopant sources may be selectively deposited using a printing method, for example. Multiple dopant sources may be employed to form active diffusion regions of varying doping levels. For example, three or four active diffusion regions may be fabricated to optimize the silicon/dielectric, silicon/metal, or both interfaces of a solar cell. The front side of the wafer may be textured prior to forming the dopant sources using a texturing process that minimizes removal of wafer material. Openings to allow metal gridlines to be connected to the active diffusion junctions may be formed using a self-aligned contact opening etch process to minimize the effects of misalignments.

Abstract: There is provided a method for fabricating a semiconductor device comprising the formation of a first device in the first device region, the first device comprising first diffusion regions. A stressor layer covering the substrate in the first device region and the first device is subsequently formed, the stressor layer having a first stress value. A laser anneal to memorize at least a portion of the first stress value in the first device is carried out followed by an activation anneal after the laser anneal to activate dopants in the first diffusion regions.

Abstract: Semiconductor structures and methods of manufacture semiconductors are provided which relate to transistors. The method of forming a transistor includes thermally annealing a selectively patterned dopant material formed on a high-k dielectric material to form a high charge density dielectric layer from the high-k dielectric material. The high charge density dielectric layer is formed with thermal annealing-induced electric dipoles at locations corresponding to the selectively patterned dopant material.

Abstract: A semiconductor device manufacturing method is provided, including: providing a semiconductor substrate, forming on the semiconductor substrate a layer including a semiconductor compound and a dope additive, and thereafter forming an emitter region and gettering impurities by annealing the semiconductor substrate including the layer.

Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.

Abstract: A process for forming diffused region less than 20 nanometers deep with an average doping dose above 1014 cm?2 in an IC substrate, particularly LDD region in an MOS transistor, is disclosed. Dopants are implanted into a source dielectric layer using gas cluster ion beam (GCIB) implantation, molecular ion implantation or atomic ion implantation resulting in negligible damage in the IC substrate. A spike anneal or a laser anneal diffuses the implanted dopants into the IC substrate. The inventive process may also be applied to forming source and drain (S/D) regions. One source dielectric layer may be used for forming both NLDD and PLDD regions.

Abstract: A method (50) is provided for processing a graded-density AR silicon surface (14) to provide effective surface passivation. The method (50) includes positioning a substrate or wafer (12) with a silicon surface (14) in a reaction or processing chamber (42). The silicon surface (14) has been processed (52) to be an AR surface with a density gradient or region of black silicon. The method (50) continues with heating (54) the chamber (42) to a high temperature for both doping and surface passivation. The method (50) includes forming (58), with a dopant-containing precursor in contact with the silicon surface (14) of the substrate (12), an emitter junction (16) proximate to the silicon surface (14) by doping the substrate (12). The method (50) further includes, while the chamber is maintained at the high or raised temperature, forming (62) a passivation layer (19) on the graded-density silicon anti-reflection surface (14).

Abstract: A nitride-based semiconductor light-emitting device 100 includes a GaN substrate 10, of which the principal surface is an m-plane 12, a semiconductor multilayer structure 20 that has been formed on the m-plane 12 of the GaN-based substrate 10, and an electrode 30 arranged on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32, which contacts with the surface of a p-type semiconductor region in the semiconductor multilayer structure 20.

Abstract: A method for fabricating a component is disclosed. The method includes: providing a member having an effective work function of an initial value, disposing a sacrificial layer on a surface of the member, disposing a first agent within the member to obtain a predetermined concentration of the agent at said surface of the member, annealing the member, and removing the sacrificial layer to expose said surface of the member, wherein said surface has a post-process effective work function that is different from the initial value.

Abstract: Phosphorous-comprising dopants, methods for forming phosphorous-doped regions in a semiconductor material, and methods for fabricating phosphorous-comprising dopants are provided. In one embodiment, a phosphorous-comprising dopant comprises a phosphorous source comprising a phosphorous-comprising salt, a phosphorous-comprising acid, phosphorous-comprising anions, or a combination thereof, an alkaline material, cations from an alkaline material, or a combination thereof, and a liquid medium.

Abstract: A doping mixture for coating semiconductor substrates which are then subjected to a high temperature treatment to form a doped layer includes at least one p- or n-dopant, water and a mixture of two or more surfactants. At least one of the surfactants is nonionic. Also, provided are a method for producing such a doping mixture and the use thereof.

Abstract: Photovoltaic elements can be formed by in-motion processing of a silicon ribbon. In some embodiments, only a single surface of a silicon ribbon is processed in-motion. In other embodiments both surfaces of a silicon ribbon is processed in-motion. In-motion processing can include, but is not limited to, formation of patterned or uniform doped regions within or along the silicon ribbon as well as the formation of patterned or uniform dielectric layers and/or electrically conductive elements on the silicon ribbon. After performing in-motion processing, additional processing steps can be performed after the ribbon is cut into portions. Furthermore, post-cut processing can include, but is not limited to, the formation of solar cells, photovoltaic modules, and solar panels.

Abstract: Various embodiments of the present disclosure provide a method of simultaneously co-doping a wide band gap material with p-type and n-type impurities to create a p-n junction within the resulting wide band gap composite material. The method includes disposing a sample comprising a dopant including both p-type and n-type impurities between a pair of wide band gap material films and disposing the sample between a pair of opposing electrodes; and subjecting the sample to a preselected vacuum; and heating the sample to a preselected temperature; and applying a preselected voltage across the sample; and subjecting the sample to at least one laser beam having a preselected intensity and a preselected wavelength, such that the p-type and n-type impurities of the dopant substantially simultaneously diffuse into the wide band gap material films resulting in a wide band gap compound material comprising a p-n junction.

Abstract: An inkjet ink comprises phosphoric acid; one or more solvents for the phosphoric acid, preferably ethyl lactate and water; and one or more aprotic organic sulfoxides, preferably dimethyl sulfoxide (DMSO) or dimethyl sulfone (SMSO2). The inks do not leave a carbon residue on heating and so are suited to use in etching and/or doping silicon wafers, e.g. in the production of crystalline silicon solar cells.

Abstract: A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.

Abstract: Embodiments of a process comprising forming a pixel on a front side of a substrate, thinning the substrate, depositing a doped silicon layer on a backside of the thinned substrate, and diffusing a dopant from the doped silicon layer into the substrate. Embodiments of an apparatus comprising a pixel formed on a front side of a thinned substrate, a doped silicon layer formed on a backside of the thinned substrate, and a region in the thinned substrate, and near the backside, where a dopant has diffused from the doped silicon layer into the thinned substrate. Other embodiments are disclosed and claimed.

Abstract: Nanostructures are doped to set conductivity characteristics. In accordance with various example embodiments, nanostructures such as carbon nanotubes are doped with a halogenated fullerene type of dopant material. In some implementations, the dopant material is deposited from solution or by vapor deposition, and used to dope the nanotubes to increase the thermal and/or electrical conductivity of the nanotubes.

Abstract: The composition for forming a p-type diffusion layer in accordance with the present invention contains an acceptor element-containing glass powder and a dispersion medium. A p-type diffusion layer and a photovoltaic cell having a p-type diffusion layer are prepared by applying the composition for forming a p-type diffusion layer, followed by a thermal diffusion treatment.

Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.

Abstract: A method of forming a multi-doped junction is disclosed. The method includes providing a substrate doped with boron atoms, the substrate comprising a front substrate surface. The method also includes depositing an ink on the front substrate surface in an ink pattern, the ink comprising a set of nanoparticles and a set of solvents; and heating the substrate in a baking ambient at a baking temperature and for a baking time period wherein a densified ink layer is formed. The method further includes exposing the substrate to a phosphorous dopant source at a drive-in temperature and for a drive-in time period.

Abstract: Embodiments of the invention provide a novel apparatus and methods for forming a conformal doped layer on the surface of a substrate. A substrate is provided to a process chamber, and a layer of dopant source material is deposited by plasma deposition, atomic layer deposition, or plasma-assisted atomic layer deposition. The substrate is then subjected to thermal processing to activate and diffuse dopants into the substrate surface.

Abstract: Methods for doping a non-planar structure by forming a conformal doped silicon glass layer on the non-planar structure are disclosed. A substrate having the non-planar structure formed thereon is positioned in chemical vapor deposition process chamber to deposit a conformal SACVD layer of doped glass (e.g. BSG or PSG). The substrate is then exposed to RTP or laser anneal step to diffuse the dopant into the non-planar structure and the doped glass layer is then removed by etching.

Abstract: A mask material composition that is used for diffusion barrier of an impurity diffusing component into a semiconductor substrate includes a siloxane resin (A1) containing a constituent unit represented by the following formula (a1): wherein R1 is a single bond or C1-C5 alkylene group; and R2 is a C6-C20 aryl group.

Abstract: A catalyst particle on a substrate is exposed to reactants containing a semiconductor material in a reactor. An intrinsic semiconductor nanowire having constant lateral dimensions is grown at a low enough temperature so that pyrolysis of the reactant is suppressed on the sidewalls of the intrinsic semiconductor nanowire. Once the intrinsic semiconductor nanowire grows to a desired length, the temperature of the reactor is raised to enable pyrolysis on the sidewalls of the semiconductor nanowire, and thereafter dopants are supplied into the reactor with the reactant. A composite semiconductor nanowire having an intrinsic inner semiconductor nanowire and a doped semiconductor shell is formed. The catalyst particle is removed, followed by an anneal that distributes the dopants uniformly within the volume of the composite semiconductor nanowire, forming a semiconductor nanowire having constant lateral dimensions and a substantially uniform doping.

Abstract: Disclosed is a phosphorus paste for diffusion that is used in continuous printing of a phosphorus paste for diffusion on a substrate by screen printing. The phosphorus paste for diffusion does not undergo a significant influence of ambient humidity on viscosity and has no possibility of thickening even after a large number of times of continuous printing. The phosphorus paste for diffusion is coated on a substrate by screen printing for diffusion layer formation on the substrate. The phosphorus paste for diffusion includes a doping agent containing phosphorus as a dopant for the diffusion layer, a thixotropic agent containing an organic binder and a solid matter, and an organic solvent. The doping agent is an organic phosphorus compound.

Abstract: A doping method includes: a first step of depositing a material solution containing an antimony compound containing elements selected from the group consisting essentially of hydrogen, nitrogen, oxygen, and carbon together with antimony to a surface of a substrate; a second step of drying the material solution to form an antimony compound layer on the substrate; and a third step of performing heat treatment so that antimony in the antimony compound layer is diffused into the substrate.

Abstract: A method of doping a semiconductor body is provided herein. In one embodiment, a semiconductor body is exposed to an activated hydrogen gas for a predetermined time period and temperature. The activated hydrogen gas that is configured to react with a surface of a semiconductor body. The activated hydrogen gas breaks existing bonds in the substrate (e.g., silicon-silicon bonds), thereby forming a reactive layer comprising weakened (e.g., silicon-hydrogen (Si—H) bonds, silanol (Si—OH) bonds) and/or dangling bonds (e.g., dangling silicon bonds). The dangling bonds, in addition to the easily broken weakened bonds, comprise reactive sites that extend into one or more surfaces of the semiconductor body. A reactant (e.g., n-type dopant, p-type dopant) may then be introduced to contact the reactive layer of the semiconductor body. The reactant chemically bonds to reactive sites comprised within the reactive layer, thereby resulting in a doped layer within the semiconductor body comprising the reactant.

Abstract: Back contact solar cells including rear surface structures and methods for making same. The rear surface has small contact areas through at least one dielectric layer, including but not limited to a passivation layer, a nitride layer, a diffusion barrier, and/or a metallization barrier. The dielectric layer is preferably screen printed. Large grid areas overlay the dielectric layer. The methods provide for increasing efficiency by minimizing p-type contact areas and maximizing n-type doped regions on the rear surface of a p-type substrate.

Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.

Abstract: An electronic device includes a silicon carbide layer having a first conductivity type and a main junction adjacent a surface of the silicon carbide layer, and a junction termination region at the surface of the silicon carbide layer adjacent the main junction. Charge in the junction termination region decreases with lateral distance from the main junction, and a maximum charge in the junction termination region may be less than about 2×1014 cm?2.

Abstract: A method for doping impurities into a device layer includes providing a carbonized dopant layer including one or more dopant impurities over a device layer and heat treating the carbonized dopant layer to thermally diffuse the dopant impurities into the device layer.

Abstract: A method utilizing spatially selective laser doping for irradiating predetermined portions of a substrate of a semiconductor material is disclosed. Dopants are deposited onto the surface of a substrate. A pulsed, visible beam is directed to and preferentially absorbed by the substrate only in those regions requiring doping. Spatial modes of the incoherent beam are overlapped and averaged, providing uniform irradiation requiring fewer laser shots. The beam is then focused to the predetermined locations of the substrate for implantation or activation of the dopants. The method provides for scanning and focusing of the beam across the substrate surface, and irradiation of multiple locations using a plurality of beams. The spatial selectivity, combined with visible laser wavelengths, provides greater efficiency in doping only desired substrate regions, while reducing the amount of irradiation required.

Abstract: A method for diffusing two dissimilar dopant materials onto a semiconductor cell wafer in a single thermal processing step. The method includes placing a first dopant source on a semiconductor cell wafer, placing said cell wafer into a thermal processing chamber comprising one or more cell wafer slots, subjecting said cell wafer to a thermal profile; and annealing said cell wafer in the presence of a second dopant source.

Abstract: Disclosed are various embodiments that include a process, an arrangement, and an apparatus for boron diffusion in a wafer. In one representative embodiment, a process is provided in which a boric oxide solution is applied to a surface of the wafer. Thereafter, the wafer is subjected to a fast heat ramp-up associated with a first heating cycle that results in a release of an amount of boron for diffusion into the wafer.

Abstract: A method of forming an ohmic contact on a substrate is described. The method includes depositing a set of silicon particles on the substrate surface. The method also includes heating the substrate in a baking ambient to a baking temperature and for a baking time period in order to create a densified film ink pattern. The method further includes exposing the substrate to a dopant source in a diffusion furnace with a deposition ambient, the deposition ambient comprising POCl3, a carrier N2 gas, a main N2 gas, and a reactive O2 gas at a deposition temperature and for a deposition time period, wherein a PSG layer is formed on the substrate surface. The method also includes heating the substrate in a drive-in ambient to a drive-in temperature and for a drive-in time period; and depositing a silicon nitride layer. The method further includes depositing a set of metal contacts on the set of silicon particles; and heating the substrate to a firing temperature and for a firing time period.

Abstract: A semiconductor structure that includes a monocrystalline germanium-containing layer, preferably substantially pure germanium, a substrate, and a buried insulator layer separating the germanium-containing layer from the substrate. A porous layer, which may be porous silicon, is formed on a substrate and a germanium-containing layer is formed on the porous silicon layer. The porous layer may be converted to a layer of oxide, which provides the buried insulator layer. Alternatively, the germanium-containing layer may be transferred from the porous layer to an insulating layer on another substrate. After the transfer, the insulating layer is buried between the latter substrate and the germanium-containing layer.

Abstract: A method for making an electronic device, such as a MOS transistor, including the steps of forming a plurality of semiconductor islands on an electrically functional substrate, printing a first dielectric layer on or over a first subset of the semiconductor islands and optionally a second dielectric layer on or over a second subset of the semiconductor islands, and annealing. The first dielectric layer contains a first dopant, and the (optional) second dielectric layer contains a second dopant different from the first dopant. The dielectric layer(s), semiconductor islands and substrate are annealed sufficiently to diffuse the first dopant into the first subset of semiconductor islands and, when present, the second dopant into the second subset of semiconductor islands.

Abstract: The present invention is generally directed to methods of selectively doping a substrate and the resulting selectively doped substrates. The methods include doping an epilayer of a substrate with the selected doping material to adjust the conductivity of either the epilayers grown over a substrate or the substrate itself. The methods utilize lithography to control the location of the doped regions on the substrate. The process steps can be repeated to form a cyclic method of selectively doping different areas of the substrate with the same or different doping materials to further adjust the properties of the resulting substrate.

Abstract: This invention proposes a method for making very low threshold voltage (Vt) metal-gate/high-? CMOSFETs using novel self-aligned low-temperature ultra shallow junctions with gate-first process compatible with VLSI. At 1.2 nm equivalent-oxide thickness (EOT), good effective work-function of 5.3 and 4.1 eV, low Vt of +0.05 and 0.03 V, high mobility of 90 and 243 cm2/Vs, and small 85° C. bias-temperature-instability <32 mV (10 MV/cm, 1 hr) are measured for p- and n-MOS.

Abstract: A thin film transistor includes a gate electrode, a gate insulation layer on the gate electrode, source and drain electrodes formed on the gate insulation layer, a polysilicon channel layer overlapping the ohmic contact layers and on the gate insulation layer between the source and drain electrodes, ohmic contact regions over the source and drain electrodes for contacting the polysilicon channel to the source and drain electrodes, and doping layers over the source and drain electrodes.

Abstract: A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.

Abstract: A semiconductor device having high electrical characteristics is manufactured at low cost and with high throughput. A semiconductor film is crystallized or activated by being irradiated with a laser beam emitted from one fiber laser. Alternatively, laser beams are emitted from a plurality of fiber lasers and coupled by a coupler to be one laser beam, and then a semiconductor film is irradiated with the coupled laser beam so as to be crystallized or activated.

Abstract: A semiconductor device and a method of manufacturing are provided. A dielectric layer is formed over a substrate, and a first silicon-containing layer, undoped, is formed over the dielectric layer. Atomic-layer doping is used to dope the undoped silicon-containing layer. A second silicon-containing layer is formed over first silicon-containing layer. The process may be expanded to include forming a PMOS and NMOS device on the same wafer. For example, the first silicon-containing layer may be thinned in the PMOS region prior to the atomic-layer doping. In the NMOS region, the doped portion of the first silicon-containing layer is removed such that the remaining portion of the first silicon-containing layer in the NMOS is undoped. Thereafter, another atomic-layer doping process may be used to dope the first silicon-containing layer in the NMOS region to a different conductivity type. A third silicon-containing layer may be formed doped to the respective conductivity type.

Abstract: Methods for forming doped regions in a semiconductor material that minimize or eliminate vapor diffusion of a dopant element and/or dopant from a deposited dopant and/or into a semiconductor material and methods for fabricating semiconductor devices that minimize or eliminate vapor diffusion of a dopant element and/or dopant from a deposited dopant and/or into a semiconductor material are provided. In one exemplary embodiment, a method for forming doped regions in a semiconductor material comprises depositing a conductivity-determining type dopant comprising a dopant element overlying a first portion of the semiconductor material. A diffusion barrier material is applied such that it overlies a second portion of the semiconductor material. The dopant element of the conductivity-determining type dopant is diffused into the first portion of the semiconductor material.

Abstract: A method of fabrication of laser gain material and utilization of such media includes the steps of introducing a transitional metal, preferably Cr2+ thin film of controllable thickness on the ZnS crystal facets after crystal growth by means of pulse laser deposition or plasma sputtering, thermal annealing of the crystals for effective thermal diffusion of the dopant into the crystal volume with a temperature and exposition time providing the highest concentration of the dopant in the volume without degrading laser performance due to scattering and concentration quenching, and formation of a microchip laser either by means of direct deposition of mirrors on flat and parallel polished facets of a thin Cr:ZnS wafer or by relying on the internal reflectance of such facets.

Abstract: A method is proposed for the fabrication of the gate electrode of a semiconductor device such that the effects of gate depletion are minimized. The method is comprised of a dual deposition process wherein the first step is a very thin layer that is doped very heavily by ion implantation. The second deposition, with an associated ion implant for doping, completes the gate electrode. With the two-deposition process, it is possible to maximize the doping at the gate electrode/gate dielectric interface while minimizing risk of boron penetration of the gate dielectric. A further development of this method includes the patterning of both gate electrode layers with the advantage of utilizing the drain extension and source/drain implants as the gate doping implants and the option of offsetting the two patterns to create an asymmetric device.

Abstract: Large-area ICs (e.g., silicon wafer-based solar cells) are produced by positioning a mask between an extrusion head and the IC wafer during extrusion of a dopant bearing material or metal gridline material. The mask includes first and second peripheral portions that are positioned over corresponding peripheral areas of the wafer, and a central opening that exposes a central active area of the wafer. The extrusion head is then moved relative to the wafer, and the extrusion material is continuously extruded through outlet orifices of the extrusion head to form elongated extruded structures on the active area of the wafer. The mask prevents deposition of the extrusion material along the peripheral edges of the wafer, and facilitates the formation of unbroken extrusion structures. The mask may be provided with a non-rectangular opening to facilitate the formation of non-rectangular (e.g., circular) two-dimensional extrusion patterns.

Abstract: Dopant diffusion into semiconductor material is controlled during fabrication of a semiconductor structure by depositing a nucleation layer over a first layer of the semiconductor structure and depositing a device layer containing the dopant over the nucleation layer. The nucleation layer serves as a diffusion barrier by limiting in depth the diffusion of the dopant into the first layer. The dopant can include arsenic (As).

Abstract: A method of manufacturing silicon nano wires including forming microgrooves on a surface of a silicon substrate, forming a first doping layer doped with a first dopant on the silicon substrate and forming a second doping layer doped with a second dopant between the first doping layer and a surface of the silicon substrate, forming a metal layer on the silicon substrate, forming catalysts by heating the metal layer within the microgrooves of the silicon substrate and growing the nano wires between the catalysts and the silicon substrate using a thermal process.

Abstract: A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron, the substrate including a first substrate surface with a first surface region and a second surface region. The method also includes depositing a first set of nanoparticles on the first surface region, the first set of nanoparticles including a first dopant. The method further includes heating the substrate in an inert ambient to a first temperature and for a first time period creating a first densified film, and further creating a first diffused region with a first diffusion depth in the substrate beneath the first surface region.