Packaging (e.g., With Mounting, Encapsulating, Etc.) Or Treatment Of Packaged Semiconductor Patents (Class 438/64)
  • Patent number: 8318514
    Abstract: The present disclosure provides a light emitting diode (LED) package, which includes a first substrate with electrodes disposed on a top thereof and a second substrate with an LED chip disposed on a top thereof. The LED chip is connected with the electrodes via wires. A first package layer is disposed on the top of the first substrate to cover the wires and electrodes. A fluorescent layer is disposed on the top of the second substrate to cover the LED chip. The present disclosure also provides a mold and a method of manufacturing the LED package.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: November 27, 2012
    Assignee: Advanced Optoelectric Technology, Inc.
    Inventors: Shiun-Wei Chan, Chih-Hsun Ke
  • Patent number: 8318526
    Abstract: A manufacturing method for manufacturing a light-sensing structure is provided. The manufacturing method includes the steps as follows. (a) A circuit layer is formed on an upper surface of a first substrate, wherein the first substrate includes at least one light-sensing device and the circuit layer includes at least one device structure and at least one release feature that is made of metal and is formed on part of the light-sensing device and the device structure. (b) A first light-filtering layer is formed on part of the circuit layer. (c) The release feature is removed by a wet-etching process.
    Type: Grant
    Filed: January 30, 2011
    Date of Patent: November 27, 2012
    Assignee: Memsor Corporation
    Inventors: Siew-Seong Tan, Yi-Hsiang Chiu, Jen-Chieh Chen
  • Patent number: 8318531
    Abstract: thermal management for large scale processing of CIS and/or CIGS based thin film is described. The method includes providing a plurality of substrates, each of the substrates having a copper and indium composite structure. The method also includes transferring the plurality of substrates into a furnace, each of the plurality of substrates provided in a vertical orientation with respect to a direction of gravity, the plurality of substrates being defined by a number N, where N is greater than 5. The method further includes introducing a gaseous species including a selenide species and a carrier gas into the furnace and transferring thermal energy into the furnace to increase a temperature from a first temperature to a second temperature, to at least initiate formation of a copper indium diselenide film.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: November 27, 2012
    Assignee: Stion Corporation
    Inventor: Robert D. Wieting
  • Publication number: 20120291850
    Abstract: A concentrating solar battery in which concentrated sunlight is guided to a solar battery cell, the concentrating solar battery including: a substrate on which the solar battery cell is mounted; a light guide member disposed above the solar battery cell such that a lower surface thereof opposes the solar battery cell; and a support member that holds an upper portion of the light guide member in a hanging manner and is provided upright on the substrate, wherein the concentrating solar battery has a structure hermetically sealed by the substrate, the light guide member and the support member.
    Type: Application
    Filed: December 24, 2010
    Publication date: November 22, 2012
    Inventor: Hiroyuki Juso
  • Publication number: 20120292658
    Abstract: The present invention discloses a semiconductor optoelectronic converting system and the fabricating method thereof, the system comprises a supporting module, a heat pipe, a power converting module and a heat-dissipating plate module. The main features of the present invention are that the supporting module has an accommodating space for disposing the heat pipe, and wherein the supporting module and the heat pipe have a common surface for disposing the power converting module thereon. Furthermore, the present invention further decreases the heat resistant therebetween and improves the heat conducting rate and further capable of becoming a rechargeable self-sufficiency lighting system.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 22, 2012
    Applicant: NEOBULB TECHNOLOGIES, INC.
    Inventors: Jen-Shyan Chen, Hsian-Lung Tan
  • Publication number: 20120292620
    Abstract: A manufacturing method of pixel structure includes: sequentially forming a gate, a gate insulation layer, a semiconductor layer and a conductive layer on a substrate; forming a first patterned photoresist layer including multiple first photoresist blocks and multiple second photoresist blocks on the conductive layer; reducing the thickness of the first patterned photoresist layer until the second photoresist blocks are completely removed; forming a pixel electrode layer and a second photoresist layer on a partial pixel electrode layer; removing a part of the pixel electrode layer exposed by the second photoresist layer, a partial conductive layer and a partial semiconductor layer both under the removed pixel electrode layer to define a first electrode block, a second electrode block and a channel region; removing the remained first patterned photoresist layer and second photoresist layer and forming a protective layer and a common electrode layer on a part of the protective layer.
    Type: Application
    Filed: July 15, 2011
    Publication date: November 22, 2012
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventor: Yuan-Hsin Tsou
  • Patent number: 8314481
    Abstract: A substrate structure for an image sensor package includes a bottom base and a frame layer. The bottom base has an upper surface formed with a plurality of first electrodes, and a lower surface formed with a plurality of second electrodes. An insulation layer is coated between the first electrodes and in direct surface contact with the upper surface of the bottom base. A frame layer is arranged on and in direct surface contact with the first electrodes and the insulation layer to form a cavity together with the bottom base. The insulation layer is interposed between the bottom base and the frame layer.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: November 20, 2012
    Assignee: Kingpak Technology Inc.
    Inventors: Chung Hsien Hsin, Yves Huang, Kevin Chang, Chief Lin
  • Patent number: 8313973
    Abstract: A method for producing a photovoltaic module by contacting at least one layer of liquid encapsulant and a plurality of solar cells. The liquid encapsulant has two components. The first component is an acrylic polyol having a terminal hydroxy group, an average number of hydroxy-functional monomer units per polymer chain from 2 to 25 and Mn from 1,000 to 10,000. The second component is an aliphatic polyisocyanate with an average functionality of at least two. The molar ratio of non-terminal hydroxy groups in the polyol to isocyanate groups in the aliphatic polyisocyanate is from 0.5:1 to 1:0.5.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: November 20, 2012
    Assignee: Rohm and Haas Company
    Inventors: Melinda L. Einsla, Edward C. Greer, Hailan Guo
  • Publication number: 20120285530
    Abstract: The present invention relates to a solar cell assembly that includes a solar cell attached to a bonding pad and a cooling substrate, wherein the bonding pad is attached to a surface of the cooling substrate by a thermally conductive adhesive and electrically contacted to the bonding pad and cooling substrate by a bonding wire. Alternatively, the bonding pad is attached to a surface of the cooling substrate by a thermally and electrically conductive adhesive.
    Type: Application
    Filed: February 23, 2011
    Publication date: November 15, 2012
    Applicant: SOITEC SOLAR GMBH
    Inventors: Martin Ziegler, Van Riesen Sascha
  • Patent number: 8309388
    Abstract: A hermetic MEMS device (100) comprising a carrier (110) having a surface (111) including a device (101) and an attachment stripe (122), the stripe spaced from the device and surrounding the device; a metallic foil (102) having a central bulge portion (103) and a peripheral rim portion (104) meeting the stripe, the bulge cross section parallel to the carrier monotonically decreasing from the rim (104) towards the bulge apex (105); and the foil positioned over the carrier surface so that the bulge arches over the device and the rim forms a seal with the stripe.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: November 13, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Kurt P. Wachtler, Wei-Yan Shih, Gregory E. Howard
  • Publication number: 20120280352
    Abstract: A semiconductor structure is provided and a method for manufacturing said structure. The semiconductor structure includes a thin film semiconductor having an active region and placed on a diamond substrate. The thin film semiconductor is preferably directly bonded to the diamond layer, or may be adhered thereto by a dielectric adhesion.
    Type: Application
    Filed: January 12, 2011
    Publication date: November 8, 2012
    Applicant: NOVATRANS GROUP SA
    Inventors: Eran Hochstadter, John F. Roulston
  • Patent number: 8304279
    Abstract: An LED package having an anodized insulation layer which increases heat radiation effect to prolong the lifetime LEDs and maintains high luminance and high output, and a method therefor. The LED package includes an Al substrate having a reflecting region and a light source mounted on the substrate and connected to patterned electrodes. The package also includes an anodized insulation layer formed between the patterned electrodes and the substrate and a lens covering over the light source of the substrate. The Al substrate provides superior heat radiation effect of the LED, thereby significantly increasing the lifetime and light emission efficiency of the LED.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: November 6, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Ki Lee, Seog Moon Choi, Sang Hyun Shin
  • Publication number: 20120273908
    Abstract: Disclosed herein is a stacked chip package including an image sensor including a recess formed on a surface thereof, and a digital signal processor chip that is positioned within the recess. Also disclosed herein is a method of fabricating a stacked chip package including the steps of forming a recess on a surface of an image sensor and positioning a digital signal processor in the recess of the image sensor.
    Type: Application
    Filed: January 18, 2012
    Publication date: November 1, 2012
    Applicant: APTINA IMAGING CORPORATION
    Inventors: LARRY KINSMAN, YU TE HSIEH
  • Publication number: 20120276676
    Abstract: The present disclosure provides a process for manufacturing a solar cell by selectively freeing an epitaxial layer from a single crystal substrate upon which it was grown. In some embodiments the process includes, among other things, providing a first substrate; depositing a separation layer on said first substrate; depositing on said separation layer a sequence of layers of semiconductor material forming a solar cell; mounting and bonding a flexible support on top of the sequence of layers; etching said separation layer while applying an agitating action to the etchant solution so as to remove said flexible support with said epitaxial layer from said first substrate.
    Type: Application
    Filed: May 7, 2012
    Publication date: November 1, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventors: Arthur Cornfeld, Daniel McGlynn, Tansen Varghese
  • Publication number: 20120276677
    Abstract: The present invention is related shielding integrated devices using CMOS fabrication techniques to form an encapsulation with cavity. The integrated circuits are completed first using standard IC processes. A wafer-level hermetic encapsulation is applied to form a cavity above the sensitive portion of the circuits using IC-foundry compatible processes. The encapsulation and cavity provide a hermetic inert environment that shields the sensitive circuits from EM interference, noise, moisture, gas, and corrosion from the outside environment.
    Type: Application
    Filed: July 5, 2012
    Publication date: November 1, 2012
    Applicant: MCube, Inc.
    Inventor: XIAO (CHARLES) YANG
  • Patent number: 8300144
    Abstract: A camera module includes a circuit board; a lens electrically connected to the circuit board; a adjusting base disposed on the circuit board and having at least two through-hole disposed adjacent to opposite sides of the lens; at least two fixed posts; at least two adjusting screw respectively passing through the through-holes of the adjusting base so as to be secured in the fixed posts; and at least two springs respectively encircling the adjusting screws, wherein two ends of each spring are positioned against the adjusting base and one of the fixed post respectively.
    Type: Grant
    Filed: May 9, 2012
    Date of Patent: October 30, 2012
    Assignee: Quanta Computer Inc.
    Inventors: Wen-Ji Tsai, Bo-Ren Yan, Ying-Chieh Hu, Jung-Wen Chang
  • Patent number: 8299353
    Abstract: A solar cell including a photovoltaic layer, a first electrode layer, a second electrode layer, an insulating layer and a light-transparent conductive layer is provided. The photovoltaic layer has a first surface and a second surface. The first electrode layer having at least one gap is disposed on the first surface, wherein the at least one gap exposes a portion of the photovoltaic layer. The second electrode layer is disposed on the second surface. The insulating layer having a plurality of pores is located on the photovoltaic layer exposed by the at least one gap, wherein the holes expose a portion of the photovoltaic layer. The light-transparent conductive layer covers the insulating layer and is connected with the first electrode layer. The transparent electrode is connected with the photovoltaic layer through at least a part of the pores. A method of fabricating a solar cell is also provided.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: October 30, 2012
    Assignees: Tatung Company, Tatung University
    Inventors: Chiung-Wei Lin, Yi-Liang Chen
  • Patent number: 8299589
    Abstract: A packaging device of an image sensor includes a supporting seat and the image sensor. The supporting seat is a hollow frame having a predetermined thickness, a first surface, a second surface, and an inner edge receding from the second surface toward the first surface to form a recessed step. Plural contacts in the recessed step and in the outer periphery of the supporting seat are electrically connected by plural electrical connection structures. The image sensor has an active surface set on the recessed step by a flip-chip packaging technique. The image sensor also has plural conductive ends electrically connected to the contacts in the recessed step. An insulating material covers an inactive surface of the image sensor and fills the gap between the recessed step of the supporting seat and the image sensor to provide dust-proofness, shock resistance, and prevention against static electricity and leakage of light.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: October 30, 2012
    Assignee: TDK Taiwan, Corp.
    Inventors: Wen Chang Lin, Chao Chang Hu, Zheng Hui Hsieh, Chih Jung Hung
  • Publication number: 20120266955
    Abstract: A photoelectric conversion device and a method of fabricating the same are disclosed. The photoelectric conversion device may include a first substrate having a first electrode and a first non-slip portion, a second substrate facing the first substrate and having a second electrode and a second non-slip portion and a sealing member. The photoelectric conversion device may further include an electrolyte solution positioned in a spaced formed between the first substrate, the second substrate, and the sealing member. The first substrate or the second substrate may be positioned to contact at least one of a first non-slip portion and a second non-slip portion.
    Type: Application
    Filed: October 27, 2011
    Publication date: October 25, 2012
    Applicant: SAMSUNG SDI CO., LTD.
    Inventor: Sung-Su KIM
  • Publication number: 20120266945
    Abstract: A thin-film component comprising a film structure and an electrically conductive protection device is disclosed, together with and a method for the production and use thereof.
    Type: Application
    Filed: August 24, 2010
    Publication date: October 25, 2012
    Inventors: Philippe Letocart, Dang Cuong Phan, Dana Pakosch, Jean-Christophe Giron, Pascal Remy
  • Publication number: 20120270357
    Abstract: A solar energy module includes one or more solar cells, each having a front side for receiving light and an opposite back side. An encapsulant material covers at least the front side of each of the solar cells. The solar energy module also includes a backskin layer formed from a cross-linked mixture of high density polyethylene (HDPE) and acid copolymer bonded to the back side of each of the solar cells.
    Type: Application
    Filed: June 15, 2012
    Publication date: October 25, 2012
    Applicant: 7AC Technologies, Inc.
    Inventor: Jack I. Hanoka
  • Patent number: 8293562
    Abstract: A dye-sensitized solar cell manufacturing method of the invention comprises the steps of: preparing a first electrode having an oxide semiconductor layer and a second electrode; forming a first sealing portion by melting and bonding a thermoplastic resin at a first annular section of the first electrode; forming a second sealing portion by melting and bonding a thermoplastic resin at a second annular section of the second electrode; loading a photosensitive dye on the oxide semiconductor layer; forming an electrolyte layer by arranging an electrolyte on the first electrode within the first sealing portion; and forming a sealing portion through bonding the first and second sealing portions, wherein the electrolyte layer is formed after forming the first sealing portion; the sealing portion is formed after loading the dye and forming the electrolyte layer; and the sealing portion is formed through melting the first and second sealing portions, applying pressure.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: October 23, 2012
    Assignee: Fujikura Ltd.
    Inventors: Katsuhiro Doi, Kenichi Okada
  • Patent number: 8288183
    Abstract: An optically coupled device includes a light emitting element and a light receiving element which are electrically isolated from each other, and an optical waveguide allowing therethrough transmission of light from the light emitting element to the light receiving element, wherein the optical waveguide is covered with an encapsulation resin containing a light reflective inorganic particle which is typically composed of titanium oxide, the light emitting element and the light receiving element are respectively provided on a base (for example, package terminals), and the entire portion of the outer surface of the optical waveguide, brought into contact with none of the light emitting element, the light receiving element and the base, is covered with the encapsulation resin.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: October 16, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Mitsuhito Kanatake
  • Patent number: 8288192
    Abstract: In a method of manufacturing a capacitive electromechanical transducer, a first electrode (8) is formed on a substrate (4), an insulating layer (9) which has an opening (6) leading to the first electrode is formed on the first electrode (8), and a sacrificial layer is formed on the insulating layer. A membrane (3) having a second electrode (1) is formed on the sacrificial layer, and an aperture is provided as an etchant inlet in the membrane. The sacrificial layer is etched to form a cavity (10), and then the aperture serving as an etchant inlet is sealed. The etching is executed by electrolytic etching in which a current is caused to flow between the first electrode (8) and an externally placed counter electrode through the opening (6) and the aperture of the membrane.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: October 16, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Chienliu Chang
  • Publication number: 20120255600
    Abstract: A photovoltaic device including at least one top cell that include at least one semiconductor material; a bottom cell of a germanium containing material having a thickness of 10 microns or less; and a back surface field (BSF) region provided by a eutectic alloy layer of aluminum and germanium on the back surface of the bottom cell of that is opposite the interface between the bottom cell and at least one of the top cells. The eutectic alloy of aluminum and germanium bonds the bottom cell of the germanium-containing material to a supporting substrate.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Stephen W. Bedell, Bahman Hekmatshoar-Tabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Publication number: 20120256170
    Abstract: A device comprising: a first substrate (1); a second substrate; at least one optoelectronic component (4) containing at least one organic material is arranged on the first substrate; the first substrate (1) and the second substrate (2) being arranged relative to one another in such a way that the optoelectronic component (4) is arranged between the first substrate (1) and the second substrate; a bonding material (3) is arranged between the first substrate (1) and the second substrate (2), said bonding material enclosing the optoelectronic component (4) in a frame type fashion and mechanically connecting the first and second substrates (1, 2) to one another; and wherein the bonding material (3) was softened by an exothermic chemical process of a reactive material (7) for mechanically connecting the substrates (1, 2).
    Type: Application
    Filed: July 8, 2010
    Publication date: October 11, 2012
    Inventors: Marc Philippens, Tilman Schlenker
  • Publication number: 20120258561
    Abstract: In embodiments of the present invention an undoped amorphous, nanocrystalline or microcrystalline semiconductor layer and a heavily doped amorphous, nanocrystalline, or microcrystalline semiconductor layer are formed on a monocrystalline silicon lamina. The lamina is the base region of a photovoltaic cell, while the amorphous, nanocrystalline or monocrystalline layers serve to passivate the surface of the lamina, reducing recombination at this surface. In embodiments, the heavily doped layer additionally serves as either the emitter of the cell or to provide electrical contact to the base layer. The undoped and heavily doped layers are deposited at low temperature, for example about 150 degrees C. or less with hydrogen dilution. This low temperature allows use of low-temperature materials and methods, while increased hydrogen dilution improves film quality and/or conductivity.
    Type: Application
    Filed: April 11, 2011
    Publication date: October 11, 2012
    Applicant: TWIN CREEKS TECHNOLOGIES, INC.
    Inventors: Jian Li, Venkatesan Murali, Yonghua Liu, Dong Xu
  • Patent number: 8283764
    Abstract: A microelectronic assembly and a method for forming a microelectronic assembly are provided. A semiconductor substrate is provided. The semiconductor substrate has first and second opposing sides and first and second portions. A tuning depression is formed on the second opposing side and the second portion of the semiconductor substrate. A radio frequency conductor is formed on the first opposing side of the first semiconductor substrate. The radio frequency conductor has a first end on the first portion of the first semiconductor substrate and a second end on the second portion of the first semiconductor substrate. A microelectronic die having an integrated circuit formed therein is attached to the first opposing side and the first portion of the semiconductor substrate such that the integrated circuit is electrically connected to the first end of the radio frequency conductor.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: October 9, 2012
    Assignee: Freescale Semiconductors, Inc.
    Inventor: Jinbang Tang
  • Publication number: 20120248492
    Abstract: The invention relates to an optoelectronic component, having —a carrier (1) comprising a first main surface (Ia), —at least one optoelectronic semiconductor chip (2) having no substrate, and —a contact metallization (3a, 3b), wherein —the carrier (1) is electrically insulating, —the at least one optoelectronic semiconductor chip (2) is fastened to the first main surface (Ia) of the carrier (1) by means of a bonding material (4), particularly a solder material, —the contact metallization (3a, 3b) covers at least one area of the first main surface (Ia) free of the optoelectronic semiconductor chip (2), and —the contact metallization (3a, 3b) is electrically conductively connected to the optoelectronic semiconductor chip (2).
    Type: Application
    Filed: August 31, 2010
    Publication date: October 4, 2012
    Applicant: Osram Opto Semiconductors GmbH
    Inventors: Klaus Müller, Günter Spath, Siegfried Herrmann, Ewald Karl Michael Günther, Herbert Brunner
  • Patent number: 8278132
    Abstract: The present invention provides an image sensor and a fabricating method thereof capable of approaching higher quantum efficiency and reducing cost. The method comprises: providing a substrate; forming a pixel region on a top surface of the substrate; forming an interlayer insulating layer and at least a metal line on the pixel region; forming an isolation carrier layer having a hole array therein on the interlayer insulating layer; grinding a lower surface of the substrate to reduce the thickness of the substrate; placing a plurality of conductors into the hole array to form a plurality of bumps on the isolation carrier layer.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: October 2, 2012
    Assignee: Himax Imaging, Inc.
    Inventors: Chih-Min Liu, Fang-Ming Huang, Ping-Hung Yin, Kuo-Chan Huang, Chung-Wei Chang
  • Publication number: 20120240997
    Abstract: Disclosed herein is a method of making a photovoltaic device having a protective layer affixed to a top surface thereof. The protective layer is comprised of a polymeric material having a fluorinated first surface and a second, opposed, surface which is non-fluorinated or less fluorinated. The protective layer is affixed to the photovoltaic device so that the first surface is farthest therefrom. In some instances, the fluoridation may extend to edge portions of the protective layer as well as to any intermediate layers. Further disclosed are devices which incorporate the fluorinated protective layers.
    Type: Application
    Filed: June 8, 2012
    Publication date: September 27, 2012
    Inventors: Uday Varde, Casimir Kotarba, III, Jonathan Call
  • Publication number: 20120241802
    Abstract: In at least one embodiment of the component (10) the latter comprises a first substrate (1) and a second substrate (2), at least one radiation-emitting or radiation-receiving element (3) being arranged on the first substrate (1), which element contains at least one organic material. The first substrate (1) and the second substrate (2) are arranged relative to one another such that the element (3) is located between the first substrate (1) and second substrate (2). The first substrate (1) and second substrate (2) are bonded together mechanically by means of a bonding agent (4) arranged in a sheet between the first substrate (1) and the second substrate (2), which bonding agent contains a glass and surrounds the element (3) with the organic material in the manner of a frame.
    Type: Application
    Filed: June 15, 2010
    Publication date: September 27, 2012
    Applicant: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Marc Philippens, Tilman Schlenker, Karsten Heuser
  • Publication number: 20120234390
    Abstract: A solar cell device has a back cover member, which includes a surface area and a back area, and a plurality of photovoltaic regions disposed overlying the surface area of the back cover member. The plurality of photovoltaic regions may occupy a total photovoltaic spatial region. The device has an encapsulating material overlying a portion of the back cover member and a front cover member coupled to the encapsulating material. An interface region is provided along at least a peripheral region of the back cover member and the front cover member. A sealed region is formed on at least the interface region to form an individual solar cell from the back cover member and the front cover member. The total photovoltaic spatial region/the surface area of the back cover may be at a ratio of about 0.80 and less for the individual solar cell.
    Type: Application
    Filed: May 29, 2012
    Publication date: September 20, 2012
    Applicant: Solaria Corporation
    Inventor: Kevin R. GIBSON
  • Publication number: 20120234387
    Abstract: According to one embodiment, a solar cell includes a first substrate, a second substrate, a first electrode, a second electrode, a support unit, a sealing unit, a permeation suppression unit, and an electrolyte fluid. The first electrode is provided on a major surface of the first substrate. The second electrode is provided on a major surface of the second substrate. The support unit is provided on the second electrode. The support unit is configured to support a sensitizing dye. The sealing unit is configured to seal a circumferential edge portion of the first substrate and a circumferential edge portion of the second substrate. The permeation suppression unit is provided around the support unit on an inner side of the sealing unit. The electrolyte fluid is provided on an inner side of the permeation suppression unit.
    Type: Application
    Filed: February 2, 2012
    Publication date: September 20, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masato SAWADA, Junji Sano, Tomomichi Naka, Naoaki Sakurai
  • Publication number: 20120235262
    Abstract: A method of forming infra red detector arrays is described, starting with the manufacture of a wafer. The wafer is formed from a GaAs or GaAs/Si substrate having CMT deposited thereon by MOVPE. The CMT deposited can include a number of layers of differing composition, the composition being controlled during the MOVPE process and being dependent on the thickness of the layer deposited. A CdTe buffer layer can aid deposition of the CMT on the substrate. Once the wafer is formed, the buffer layer, an etch stop layer and any intervening layers can be etched away leaving a wafer suitable for further processing into an infra red detector.
    Type: Application
    Filed: November 2, 2010
    Publication date: September 20, 2012
    Applicant: SELEX GALILEO LIMITED
    Inventors: Christopher Jones, Sudesh Bains
  • Patent number: 8268661
    Abstract: The present invention is a sealing laminated sheet for an electronic device in which a first sheet and a second sheet 5 are laminated, wherein the first sheet contains an acid-modified polyolefin-based thermoplastic resin, the second sheet 5 has a melting point higher than that of the first sheet, and a peel strength at 25° C. of the second sheet 5 relative to the first sheet is 0.5 to 10.0 N/15 mm. According to the present invention, the production yield of an electronic device can be improved.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: September 18, 2012
    Assignee: Fujikura Ltd.
    Inventors: Katsuhiro Doi, Kenichi Okada, Hiroki Usui
  • Publication number: 20120228732
    Abstract: A photoelectric conversion device including a first substrate; a second substrate located generally opposite to the first substrate; a first grid pattern located on the first substrate, wherein the first grid pattern includes a first finger electrode; a first collector electrode spaced from the first finger electrode and extending in a direction that intersects the first finger electrode; and a first connecting electrode connecting the first finger electrode and the first collector electrode; and a second grid pattern located on the second substrate, wherein the second grid pattern includes a second finger electrode; a second collector electrode spaced from the second finger electrode and extending in a direction that intersects the second finger electrode; and a second connecting electrode connecting the second finger electrode and the second collector electrode, wherein the first connecting electrode and the second connecting electrode are arranged alternately and do not overlap each other.
    Type: Application
    Filed: September 21, 2011
    Publication date: September 13, 2012
    Inventor: Do-Young Park
  • Publication number: 20120228668
    Abstract: This layered element (11) for encapsulating an element (12) that is sensitive to air and/or moisture, especially an element that collects or emits radiation such as a photovoltaic cell or an organic light-emitting diode, comprises a polymer layer (1) and a barrier layer (2) against at least one face (1A) of the polymer layer. The barrier layer (2) has a moisture vapor transfer rate of less than 10?2 g/m2 per day and consists of a multilayer of at least two thin hydrogenated silicon nitride layers (21, 22, 23, 24) having alternately lower and higher densities.
    Type: Application
    Filed: September 3, 2010
    Publication date: September 13, 2012
    Applicant: Saint-Gobain Performance Plastics Corporation
    Inventors: Claire Thoumazet, Fabrice Abbott, Fabienne P. Piroux
  • Patent number: 8258397
    Abstract: Imperfect filling sometimes occurs when a conductive material is filled into a through-hole formed on a solar cell. A method of manufacturing a solar cell of the invention employs a support wherein a conductive material is filled into a through-hole. Accordingly, it is possible to suppress occurrence of imperfect filling and thereby provide a method of manufacturing a solar cell with enhanced reliability. Moreover, a flat surface is provided on a solar cell of the present invention when a connector electrode is formed on a through-hole and this enables enhanced connection reliability.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: September 4, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Toyozo Nishida, Natsuyo Sasada
  • Publication number: 20120217600
    Abstract: A manufacturing method of a semiconductor device according to embodiments includes forming a photodiode layer, which is an active region including a photodiode, on a main surface of a first substrate, forming a wiring layer, which includes a wire and a dielectric layer covering the wire, on the photodiode layer, and forming a dielectric film on the wiring layer. The manufacturing method of the semiconductor device according to the embodiments further includes bonding a second substrate to the dielectric film of the first substrate so that a crystal orientation of the photodiode layer matches a crystal orientation of the second substrate.
    Type: Application
    Filed: February 8, 2012
    Publication date: August 30, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi HONGO, Kazumasa Tanida, Akihiro Hori, Kenji Takahashi, Hideo Numata
  • Publication number: 20120217374
    Abstract: Disclosed herein is a solid-state imaging device including: a sensor element having a plurality of pixels each having a photoelectric conversion section; and a logic element attached to the sensor element in such a manner as to be stacked on the sensor element face-to-face and provided with a pad electrode. In a stacked body of the sensor and logic elements, a pad opening is provided above the top surface of the pad electrode facing the sensor element, and a pad periphery guard ring is provided to surround the side portion of the pad opening. The pad periphery guard ring is formed by integrally filling, on the side of the pad opening, an entire trench that is at least as deep as the pad opening with a metal material.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 30, 2012
    Applicant: Sony Corporation
    Inventor: Kenichi Nishizawa
  • Publication number: 20120217535
    Abstract: The invention relates to a method of encapsulating a flexible optoelectronic multi-layered structure (6) provided on a polymer substrate (2) comprising the steps of providing the flexible optoelectronic multi-layered structure with one or both a bottom encapsulation stack (B) and a top encapsulation stack (T), wherein the bottom encapsulation stack and the top encapsulation layer comprise a first inorganic layer (4a, 8a) separated from a second inorganic layer (4b, 8b) by a substantially continuous getter layer (5, 8) comprising a metal oxide, the first and the second inorganic layers having an intrinsic water vapour transmission of 10?5 g·m?2·day?1 or less.
    Type: Application
    Filed: July 9, 2010
    Publication date: August 30, 2012
    Applicant: Nederlandse Organisatie voor toegepase- Natuurwetenschappelijk onderzoek TNO
    Inventors: Peter Van de Weijer, Antonius Maria Bernardus Van Mol, Cristina Tanase
  • Patent number: 8252616
    Abstract: A package structure of photodiode and a forming method of the same are provided. The method includes providing a heat-dissipation plate; placing a circuit board on the heat-dissipation plate, the circuit board having an opening exposing a top surface of the heat-dissipation plate and a first contact pad located on a peripheral area of the opening; placing a carrier with a metal cladding surface into the opening, the carrier connecting the top surface of the heat-dissipation plate; placing a photodiode chip on the carrier wherein the bottom area of the photodiode chip is less than the metal cladding surface such that a portion of the metal cladding surface is exposed; and electrically connecting the exposed metal cladding surface to the first contact pad.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: August 28, 2012
    Assignee: Solapoint Corporation
    Inventor: Tai-Hui Liu
  • Patent number: 8252615
    Abstract: An integrated circuit package system that includes: providing a support structure including an integrated circuit and an electrical contact adjacent thereto; providing a first mold having a first cavity with a projection and a recess for collecting flash; engaging the first mold on the support structure with the first cavity over at least a portion of the integrated circuit and the projection and the recess between the at least a portion of the integrated circuit and the electrical contact; and injecting encapsulation material into the first cavity.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: August 28, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Ki Youn Jang, Sungmin Song, JoHyun Bae
  • Patent number: 8252617
    Abstract: A vertically-integrated image sensor is proposed with the performance characteristics of single crystal silicon but with the area coverage and cost of arrays fabricated on glass. The image sensor can include a backplane array having readout elements implemented in silicon-on-glass, a frontplane array of photosensitive elements vertically integrated above the backplane, and an interconnect layer disposed between the backplane array and the image sensing array. Since large area silicon-on-glass backplanes are formed by tiling thin single-crystal silicon layers cleaved from a thick silicon wafer side-by-side on large area glass gaps between the tiled silicon backplane would normally result in gaps in the image captured by the array. Therefore, embodiments further propose that the pixel pitch in both horizontal and vertical directions of the frontplane be larger than the pixel pitch of the backplane, with the pixel pitch difference being sufficient that the frontplane bridges the gap between backplane tiles.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: August 28, 2012
    Assignee: Carestream Health, Inc.
    Inventor: Timothy J. Tredwell
  • Publication number: 20120212637
    Abstract: A solid-state imaging apparatus, comprising: a semiconductor chip having a principal face including a pixel region; a protruding portion disposed on the principal face to surround the pixel region; a cover member disposed over the pixel region; and an adhesive material surrounding the pixel region and bonding the cover member and the protruding portion, is provided. The protruding portion has top and first side faces facing the space, a first edge line being formed by this two faces. The adhesive material bonds the top face of the protruding portion and the cover member. The adhesive material has a first face facing the interior space, and the first face extends from the first edge line toward the cover member. Perimeters of the interior space, in planes parallel to the principal face become shorter in a direction from the top face of the protruding portion toward the cover member.
    Type: Application
    Filed: January 27, 2012
    Publication date: August 23, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Koji Tsuduki, Takanori Suzuki, Hisatane Komori, Satoru Hamasaki
  • Publication number: 20120211071
    Abstract: A multijunction solar cell including an upper first solar subcell having a first band gap; a second solar subcell adjacent to the first solar subcell and having a second band gap smaller than the first band gap; a graded interlayer adjacent to the second solar subcell, the first graded interlayer having a third band gap greater than the second band gap; and a third solar subcell adjacent to the graded interlayer, the third subcell having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell. A lower fourth solar subcell is provided adjacent to the third subcell and lattice matched thereto, the lower fourth subcell having a fifth band gap smaller than the fourth band gap.
    Type: Application
    Filed: May 3, 2012
    Publication date: August 23, 2012
    Applicant: Emcore Solar Power, Inc.
    Inventors: Fred Newman, Benjamin Cho, Mark A. Stan, Paul Sharps
  • Patent number: 8247888
    Abstract: Provided is a semiconductor device capable of preventing a semiconductor chip from being damaged by any sharp burrs of a metallic shielding plate. The semiconductor device includes a semiconductor chip and a metallic shielding plate provided on a circuit surface of the semiconductor chip. The metallic shielding plate is disposed in such a manner that a second surface of a shielding plate body is directed towards the circuit surface of the semiconductor chip, and burrs are positioned contiguous to the second surface of the shielding plate body. At distal ends of the burrs, cutting burrs are formed in a direction orthogonal to the second surface. The sharp burrs extend in a direction opposite to the semiconductor chip, so that the sharp burrs are prevented from damaging the circuit surface of the semiconductor chip.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: August 21, 2012
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Masachika Masuda, Kazunori Oda, Koji Tomita, Kazuyuki Miyano
  • Publication number: 20120202308
    Abstract: A fabricating method of a dye-sensitizing solar cell (DSSC) is provided. In the method, a working electrode and a counter electrode disposed opposite to each other is provided. The working electrode has a first patterned conductive line, and the counter electrode has a second patterned conductive line. A first gap control layer on at least an outer portion of one of the first and second patterned conductive lines is formed to surround the first and the second patterned conductive lines. Alternatively, the first gap control layer is symmetrically formed on one of the first and second patterned conductive lines. Then, a packaging material is formed on the first gap control layer. Next, the working electrode and the counter electrode are pressed to form a gap between the working electrode and the counter electrode. The packaging material is cured, and an electrolyte is filled into the gap.
    Type: Application
    Filed: April 18, 2012
    Publication date: August 9, 2012
    Applicant: Industrial Technology Research Institute
    Inventors: Chuan-Ya Hung, Wen Hsiang Yen, Sz-Ping Fu, Yung-Liang Tung, Song-Yeu Tsai
  • Publication number: 20120199201
    Abstract: An organic thin film solar cell including: a pair of electrodes of a first electrode (32) and a second electrode (34); an active layer (50) placed between the pair of electrodes; an insulation film stacked substrate (10) including a substrate (12) containing a metal or an alloy having heat conductivity higher than 10 W/m.K and lower than 500 W/m.K and an insulation film (14) provided on the substrate; and a sealing layer (60) placed between the insulation film of the insulation film stacked substrate and either one of the pair of electrodes, suppresses deterioration of electrical properties.
    Type: Application
    Filed: October 22, 2010
    Publication date: August 9, 2012
    Inventors: Takahiro Seike, Toshihiro Ohnishi