Oxidation Patents (Class 438/770)
  • Patent number: 7749868
    Abstract: A semiconductor substrate shaped to have a curved surface profile by anodization. Prior to being anodized, the substrate is finished with an anode pattern on its bottom surface so as to be consolidated into a unitary structure in which the anode pattern is precisely reproduced on the substrate. The anodization utilizes an electrolytic solution which etches out an oxidized portion as soon as it is formed as a result of the anodization, to thereby develop a porous layer in a pattern in match with the anode pattern. The anode pattern brings about an in-plane distribution of varying electric field intensity by which the porous layer develops into a shape complementary to a desired surface profile. Upon completion of the anodization, the curves surface is revealed on the surface of the substrate by etching out the porous layer and the anode pattern from the substrate.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: July 6, 2010
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Yoshiaki Honda, Takayuki Nishikawa
  • Patent number: 7741231
    Abstract: Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or mole vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: June 22, 2010
    Assignee: International Business Machines Corporation
    Inventors: Raymond R. Horton, John U. Knickerbocker, Edmund J. Sprogis, Cornelia K. Tsang
  • Patent number: 7741166
    Abstract: A method is provided in which a stress present in a film is reduced in magnitude by oxidizing the film through atomic oxygen supplied to a surface of the film. In an embodiment, a mask is used to selectively block portions of the film so that the stress is relaxed only in areas exposed to the oxidation process. A method is further provided in which a film having a stress is formed over source and drain regions of an NFET and a PFET. The stress present in the film over the source and drain regions of either the NFET or the PFET is then relaxed by oxidizing the film through exposure to atomic oxygen to provide enhanced mobility in at least one of the NFET or the PFET while maintaining desirable mobility in the other of the NFET and PFET.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: June 22, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael P. Belyansky, Diane C. Boyd, Bruce B. Doris, Oleg Gluschenkov
  • Publication number: 20100151694
    Abstract: Plasma assisted low temperature radical oxidation is described. The oxidation is selective to metals or metal oxides that may be present in addition to the silicon being oxidized. Selectivity is achieved by proper selection of process parameters, mainly the ratio of H2 to O2 gas. The process window may be enlarged by injecting H2O steam into the plasma, thereby enabling oxidation of silicon in the presence of TiN and W, at relatively low temperatures. Selective oxidation is improved by the use of an apparatus having remote plasma and flowing radicals onto the substrate, but blocking ions from reaching the substrate.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 17, 2010
    Applicant: MATTSON TECHNOLOGY, INC.
    Inventors: Bruce W. Peuse, Yaozhi Hu, Paul Janis Timans, Guangcai Xing, Wilfried Lerch, Sing-Pin Tay, Stephen E. Savas, Georg Roters, Zsolt Nenyei, Ashok Sinha
  • Patent number: 7737050
    Abstract: A method of forming a nitrided silicon oxide layer. The method includes: forming a silicon dioxide layer on a surface of a silicon substrate; performing a rapid thermal nitridation of the silicon dioxide layer at a temperature of less than or equal to about 900° C. and a pressure greater than about 500 Torr to form an initial nitrided silicon oxide layer; and performing a rapid thermal oxidation or anneal of the initial nitrided silicon oxide layer at a temperature of less than or equal to about 900° C. and a pressure greater than about 500 Torr to form a nitrided silicon oxide layer. Also a method of forming a MOSFET with a nitrided silicon oxide dielectric layer.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: June 15, 2010
    Assignee: International Business Machines Corporation
    Inventors: Edward Dennis Adams, Jay Sanford Burnham, Evgeni Gousev, James Spiros Nakos, Heather Elizabeth Preuss, Joseph Francis Shepard, Jr.
  • Patent number: 7737048
    Abstract: A method for forming an oxide film includes a first in-situ steam generation (ISSG) process using a 1%-H2 concentration in the ambient gas and a subsequent second ISSG process using a 5%-H2 concentration in the ambient gas, wherein the second ISSG process compensates an in-plane thickness distribution of the film formed by the first ISSG process. The time length for the first and second ISSG steps is determined based on a desired film thickness, a time length dependency of a film formed by the second ISSG process, and the oxidation rate of the first and second ISSG processes.
    Type: Grant
    Filed: September 5, 2006
    Date of Patent: June 15, 2010
    Assignee: Elpida Memory, Inc.
    Inventor: Takayuki Kanda
  • Patent number: 7727828
    Abstract: A method for fabricating a gate dielectric of a field effect transistor is provided. In one embodiment, the method includes removing a native oxide layer, forming an oxide layer, forming a gate dielectric layer over the oxide layer, forming an oxide layer over the gate dielectric layer, and annealing the layers and underlying thermal oxide/silicon interface. Optionally, the oxide layer may be nitridized prior to forming the gate dielectric layer. In one embodiment, the oxide layer on the substrate is formed by depositing the oxide layer, and the oxide layer on the gate dielectric layer is formed by oxidizing at least a portion of the gate dielectric layer using an oxygen-containing plasma. In another embodiment, the oxide layer on the gate dielectric layer is formed by forming a thermal oxide layer, i.e., depositing the oxide layer on the gate dielectric layer.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: June 1, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thai Cheng Chua, Cory Czarnik, Andreas G. Hegedus, Christopher Sean Olsen, Khaled Z. Ahmed, Philip Allan Kraus
  • Patent number: 7727904
    Abstract: Methods of forming an oxide layer on silicon carbide include thermally growing an oxide layer on a layer of silicon carbide, and annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C. The oxide layer may be annealed in NO in a silicon carbide tube that may be coated with silicon carbide. To form the oxide layer, a preliminary oxide layer may be thermally grown on a silicon carbide layer in dry O2, and the preliminary oxide layer may be re-oxidized in wet O2.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: June 1, 2010
    Assignee: Cree, Inc.
    Inventors: Mrinal K. Das, Brett Hull, Sumi Krishnaswami
  • Patent number: 7723240
    Abstract: A method for forming a dielectric is provided. The method includes providing a substrate having a silicon-containing semiconductor layer within a process chamber. The process chamber is capable of ionizing a process precursor to a plasma comprising an oxygen-containing element and a fluorocarbon-containing element. A surface portion of the silicon-containing material is oxidized by using the plasma to convert the surface portion into an oxidized dielectric material.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: May 25, 2010
    Assignee: Macronix International Co., Ltd.
    Inventors: Shih-Ping Hong, Han-Hui Hsu
  • Publication number: 20100117203
    Abstract: A process for forming an oxide-containing film from silicon is provided that includes heating the silicon substrates to a process temperature of between 250° C. and 1100° C. with admission into the process chamber of diatomic reductant source gas Z-Z? where Z and Z? are each H, D and T and a stable source of oxide ion. Multiple exhaust ports exist along the vertical extent of the process chamber to create reactant across flow. A batch of silicon substrates is provided having multiple silicon base layers, each of the silicon base layers having exposed <110> and <100> planes and a film residual stress associated with the film being formed at a temperature of less than 600° C. and having a <110> film thickness that exceeds a <100> film thickness on the <100> crystallographic plane by less than 20%, or a film characterized by thickness anisotropy less than 18% and an electrical breakdown field of greater than 10.5 MV/cm.
    Type: Application
    Filed: January 30, 2007
    Publication date: May 13, 2010
    Applicant: Aviza Technology, Inc.
    Inventors: Robert Jeffrey Bailey, Hood Chatham, Derrick Foster, Olivier Laparra, Martin Mogaard, Cole Porter, Taiquing T. Qiu, Helmuth Treichel
  • Patent number: 7713883
    Abstract: An object of this invention is to make it possible to suppress early-stage oxidation of a substrate surface prior to oxidation processing, and to remove a natural oxidation film. For this reason, a method is provided comprising the steps of loading a substrate into a processing chamber, supplying a hydrogen-containing gas and an oxygen-containing gas into the processing chamber, and subjecting a surface of the substrate to oxidation processing, and unloading the substrate subjected to oxidation processing from the processing chamber. In the oxidation processing step, the hydrogen-containing gas is introduced in advance into the processing chamber, with the pressure inside the processing chamber set at a pressure that is less than atmospheric pressure, and the oxygen-containing gas is then introduced in the state in which the introduction of the hydrogen-containing gas is continued.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: May 11, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Yasuhiro Megawa
  • Publication number: 20100112824
    Abstract: The invention is a method for forming a silicon oxide film of an SOI wafer, the method by which at least thermal oxidation treatment is performed (a process (A)) on an SOI wafer having an oxide film on the back surface and, after the thermal oxidation treatment, heat treatment is additionally performed (a process (B)) in a non-oxidizing atmosphere at a temperature higher than the temperature at which the thermal oxidation treatment was performed, whereby a silicon oxide film is formed on the front surface of an SOI layer. This provides a method for forming a silicon oxide film of an SOI wafer, the method that can prevent an SOI wafer from being warped after thermal oxidation treatment even when an SOI wafer having a thick oxide film on the back surface is used and a silicon oxide film for forming a device is formed by thermal oxidation on the front surface on the SOI layer side, and can reduce exposure failure and adsorption failure caused by warpage of the SOI wafer and enhance yields of device fabrication.
    Type: Application
    Filed: April 25, 2008
    Publication date: May 6, 2010
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Isao Yokokawa, Nobuhiko Noto, Shin-ichi Yamaguchi
  • Patent number: 7702413
    Abstract: The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: April 20, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukihiro Ushiku, Akira Ogawa, Hidenori Kakinuma, Shunji Shuto, Masahiro Abe, Tatsuo Akiyama, Shigeru Komatsu
  • Publication number: 20100090227
    Abstract: Methods are provided for improving inversion layer mobility and providing low defect density in a semiconductor device based upon a silicon carbide (SiC) substrate. More specifically, embodiments of the present method provide for the formation of a gate oxide on a silicon carbide substrate comprising oxidizing the substrate with a gaseous mixture comprising oxygen at a temperature of at least about 1300° C. Semiconductor devices, such as MOSFETS, based upon a substrate treated according to the present method are expected to have inversion layer mobilities of at least about 12 cm2/Vs.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 15, 2010
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Victor Lienkong Lou, Kevin Sean Matocha, Gregory Thomas Dunne
  • Patent number: 7695981
    Abstract: A seed layer is formed on a substrate using a first biological agent. The seed layer may comprise densified nanoparticles which are bound to the biological agent. The seed layer is then used for a deposition of a metal layer, such as a barrier layer, an interconnect layer, a cap layer and/or a bus line for a solid state device.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: April 13, 2010
    Assignee: Siluria Technologies, Inc.
    Inventors: Haixia Dai, Khashayar Pakbaz, Michael Spaid, Theo Nikiforov
  • Patent number: 7696103
    Abstract: Processes for the purification of silicon carbide structures, including silicon carbide coated silicon carbide structures, are disclosed. The processes described can reduce the amount of iron contamination in a silicon carbide structure by 100 to 1000 times. After purification, the silicon carbide structures are suitable for use in high temperature silicon wafer processing.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: April 13, 2010
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Larry Wayne Shive, Brian Lawrence Gilmore
  • Patent number: 7682988
    Abstract: A method of reducing threshold voltage shift of a MOSFET transistor resulting after temperature and voltage stress, and an integrated circuit device fabricated according to the method. The method includes the steps of forming a nitrided dielectric layer on a semiconductor substrate, and subjecting the nitrided dielectric layer to an anneal at low pressure.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: March 23, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Husam N. Alshareef, Rajesh Khamankar, Ajith Varghese, Cathy A. Chancellor, Anand Krishnan, Malcolm J. Bevan
  • Publication number: 20100068895
    Abstract: A substrate processing apparatus includes a processing chamber that processes a substrate, and a substrate placing base enclosed in the processing chamber, and a substrate transporting member that allows the substrate to wait temporarily on the substrate placing base, and exhaust holes provided so as to surround the substrate placing base, and a retracting space that allows the substrate transporting member to move in between lines each connecting the exhaust hole and an upper end of the substrate placing base and the substrate placing base.
    Type: Application
    Filed: September 11, 2009
    Publication date: March 18, 2010
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Hidehiro Yanai, Masakazu Sakata, Akira Takahashi
  • Patent number: 7678651
    Abstract: A method for fabricating a semiconductor device includes: providing a substrate structure in which a plurality of gate lines are already formed; forming a capping layer over the substrate structure; oxidizing the capping layer; and forming an insulation layer over the oxidized capping layer. The capping layer may include a nitride-based material. The insulation layer may include substantially the same material as the capping layer. The oxidizing of the capping layer may comprise performing a radical oxidation process.
    Type: Grant
    Filed: June 28, 2006
    Date of Patent: March 16, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventor: Ki-Won Nam
  • Patent number: 7674724
    Abstract: An oxidizing method for an object to be processed according to the present invention includes: an arranging step of arranging a plurality of objects to be processed in a processing container whose inside can be vacuumed, the processing container having a predetermined length, a supplying unit of an oxidative gas being provided at one end of the processing container, a plurality of supplying units of a reducing gas being provided at a plurality of positions in a longitudinal direction of the processing container; an atmosphere forming step of supplying the oxidative gas and the reducing gas into the processing container in order to form an atmosphere having active oxygen species and active hydroxyl species in the processing container; and an oxidizing step of oxidizing surfaces of the plurality of objects to be processed in the atmosphere.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Keisuke Suzuki, Toshiyuki Ikeuchi, Kota Umezawa
  • Patent number: 7674722
    Abstract: In the present invention, when a gate insulation film in a DRAM is formed, an oxide film constituting a base of the gate insulation film is plasma-nitrided. The plasma nitridation is performed with microwave plasma generated by using a plane antenna having a large number of through holes. Nitrogen concentration in the gate insulation film formed by the plasma nitridation is 5 to 20% in atomic percentage. Even without subsequent annealing, it is possible to effectively prevent a boron penetration phenomenon in the DRAM and to reduce traps in the film causing deterioration in driving capability of the device.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: March 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Tatsuo Nishita, Shuuichi Ishizuka, Yutaka Fujino, Toshio Nakanishi, Yoshihiro Sato
  • Patent number: 7670963
    Abstract: A method for fabricating a nonvolatile charge trap memory device is described. The method includes first forming a tunnel dielectric layer on a substrate in a first process chamber of a single-wafer cluster tool. A charge-trapping layer is then formed on the tunnel dielectric layer in a second process chamber of the single-wafer cluster tool. A top dielectric layer is then formed on the charge-trapping layer in the second or in a third process chamber of the single-wafer cluster tool.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: March 2, 2010
    Assignee: Cypress Semiconductor Corportion
    Inventors: Krishnaswamy Ramkumar, Sagy Levy
  • Publication number: 20100034232
    Abstract: A laser amplification structure comprising an active medium and at least two electrodes disposed on either side of the active medium, the active medium comprising a first layer of a silicon oxide doped with rare earth ions, wherein the first silicon layer is co-doped with silicon nanograins and rare earth ions.
    Type: Application
    Filed: November 21, 2006
    Publication date: February 11, 2010
    Inventors: Fabrice Gourbilleau, David Bréard, Richard Rizk, Jean-Louis Doualan
  • Patent number: 7659206
    Abstract: A method of treating a substrate comprises depositing silicon oxycarbide on the substrate and removing the silicon oxycarbide from the substrate. The silicon oxycarbide on the substrate is decarbonized by exposure to an energized oxygen-containing gas that heats the substrate and converts the layer of silicon oxycarbide into a layer of silicon oxide. The silicon oxide is removed by exposure to a plasma of fluorine-containing process gas. Alternatively, the remaining silicon oxide can be removed by a fluorine-containing acidic bath. In yet another version, a plasma of a fluorine-containing gas and an oxygen-containing gas is energized to remove the silicon oxycarbide from the substrate.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: February 9, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Krishna Vepa, Yashraj Bhatnagar, Ronald Rayandayan, Venkata Balagani
  • Patent number: 7659214
    Abstract: A method for growing an oxynitride film on a substrate includes positioning the substrate in a process chamber, heating the process chamber, flowing a first wet process gas comprising water vapor into the process chamber, and reacting the substrate with the first wet process gas to grow an oxide film on the substrate. The method further includes flowing a second wet process gas comprising water vapor and a nitriding gas comprising nitric oxide into the process chamber, and reacting the oxide film and the substrate with the second wet process gas to grow an oxynitride film. In another embodiment, the method further comprises annealing the substrate containing the oxynitride film in an annealing gas. According to one embodiment of the method where the substrate is silicon, a silicon oxynitride film can be formed that exhibits a nitrogen peak concentration of approximately 3 atomic % or greater.
    Type: Grant
    Filed: September 30, 2007
    Date of Patent: February 9, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Kimberly G. Reid, Anthony Dip
  • Publication number: 20100029092
    Abstract: A method is provided with a step of supplying a reacting furnace (200) with a plurality of gases which react each other and an inert gas and oxidizing a substrate (20) under an atmospheric pressure, and a step of carrying out the substrate (20) after oxidizing from the reacting furnace. In the oxidizing step, the partial pressure of the oxidizing gas is kept constant by changing a flow quantity of the inert gas in accordance with atmospheric pressure variation, and a flow quantity of the inert gas is calculated based on a previously calculated flow quantity of a gas generated by the reaction of the gases and a gas remained without being consumed by the reaction.
    Type: Application
    Filed: March 30, 2006
    Publication date: February 4, 2010
    Applicant: HITACHI KIKUSAI ELECTRIC INC.
    Inventors: Naoto Nakamura, Iwao Nakamura, Ryota Sasajima
  • Patent number: 7655524
    Abstract: Embodiments relate to a semiconductor device and a method for manufacturing a semiconductor device. In embodiments, a transistor including the gate electrode and a source/drain may be formed between isolation layers and a contact may be connected to the source/drain. A barrier layer may be formed at a boundary between the isolation layer and the source/drain and may physically isolate the isolation layer from the source/drain.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: February 2, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jong Bok Lee
  • Patent number: 7655574
    Abstract: An insulting film is modified by subjecting the insulting film to a modification treatment comprising a combination of a plasma treatment and a thermal annealing treatment. There is provided a method of enhancing the characteristic of an insulating film by improving deterioration in the characteristic of the insulating film due to carbon, a suboxide, a dangling bond or the like contained in the insulating film.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: February 2, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Takuya Sugawara, Yoshihide Tada, Genji Nakamura, Shigenori Ozaki, Toshio Nakanishi, Masaru Sasaki, Seiji Matsuyama, Kazuhide Hasebe, Shigeru Nakajima, Tomonori Fujiwara
  • Publication number: 20100012949
    Abstract: Substrate, in particular in silicon carbide, covered by a thin film of stoichiometric silicon nitride, for the manufacture of electronic components and method for obtaining said film. To obtain the film on the substrate (1) in the presence of at least one nitrogen gas, the substrate is covered with a film (2) of a material that is permeable to said gas and the film of silicon nitride is capable of forming at the interface between the substrate and the film of the material. The invention applies for example to microelectronics.
    Type: Application
    Filed: July 4, 2006
    Publication date: January 21, 2010
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE, UNIVERSITE PARIS SUD (PARIS XI)
    Inventor: Patrick Soukiassian
  • Publication number: 20100013017
    Abstract: A method of manufacturing a semiconductor device including implanting an element selected from fluorine and nitrogen, over the entire region of a semiconductor substrate; oxidizing the semiconductor substrate to thereby form a first oxide film over the surface of the semiconductor substrate; selectively removing the first oxide film in a partial region; oxidizing the semiconductor substrate in the partial region to thereby form a second oxide film thinner than the first oxide film in the partial region; and forming gates to thereby form transistors.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 21, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Gen Tsutsui
  • Patent number: 7648923
    Abstract: A method of fabricating a flash memory device is disclosed. The method comprises forming a first insulating layer on a semiconductor substrate; accumulating nitrogen at an interface between the semiconductor substrate and the first insulating layer to form a second insulating layer at the interface; and implanting oxygen into the second insulating layer to convert the second insulating layer to a third insulating layer.
    Type: Grant
    Filed: December 24, 2007
    Date of Patent: January 19, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Eun-Shil Park, Kwon Hong, Jae Hong Kim, Jae Hyoung Koo
  • Publication number: 20100006860
    Abstract: A method of manufacturing a semiconductor device based on a SiC substrate (12), comprising the steps of forming (201) an oxide layer (14) on a Si-terminated face of the SiC substrate (12) at an oxidation rate sufficiently high to achieve a near interface trap density below 5×1011 cm?2; and annealing (202) the oxidized SiC substrate in a hydrogen-containing environment, in order to passivate deep traps formed in the oxide-forming step, thereby enabling manufacturing of a SiC-based MOSFET (10) having improved inversion layer mobility and reduced threshold voltage. It has been found by the present inventors that the density of DTs increases while the density of NITs decreases when the Si-face of the SiC substrate is subject to rapid oxidation. According to the present invention, the deep traps formed during the rapid oxidation can be passivated by hydrogen annealing, thus leading to a significantly decreased threshold voltage for a semiconductor device formed on the oxide.
    Type: Application
    Filed: August 29, 2007
    Publication date: January 14, 2010
    Applicant: NXP, B.V.
    Inventors: Thomas C. Roedle, Elnar O. Sveinbjornsson, Halldor O. Olafsson, Gudjon I. Gudjonsson, Carl F. Allerstam
  • Publication number: 20100009545
    Abstract: Methods of forming oxide layers on silicon carbide layers are disclosed, including placing a silicon carbide layer in a chamber such as an oxidation furnace tube that is substantially free of metallic impurities, heating an atmosphere of the chamber to a temperature of about 500° C. to about 1300° C., introducing atomic oxygen in the chamber, and flowing the atomic oxygen over a surface of the silicon carbide layer to thereby form an oxide layer on the silicon carbide layer. In some embodiments, introducing atomic includes oxygen providing a source oxide in the chamber and flowing a mixture of nitrogen and oxygen gas over the source oxide. The source oxide may comprise aluminum oxide or another oxide such as manganese oxide. Some methods include forming an oxide layer on a silicon carbide layer and annealing the oxide layer in an atmosphere including atomic oxygen.
    Type: Application
    Filed: July 14, 2009
    Publication date: January 14, 2010
    Inventors: Mrinal K. Das, Anant K. Agarwal, John W. Palmour, Dave Grider
  • Patent number: 7645709
    Abstract: Methods of fabricating an oxide layer on a semiconductor substrate are provided herein. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes placing a substrate to be oxidized on a substrate support in a vacuum chamber of a plasma reactor, the chamber having an ion generation region remote from the substrate support; introducing a process gas into the chamber, the process gas comprising at least one of hydrogen (H2) and oxygen (O2)—provided at a flow rate ratio of hydrogen (H2) to oxygen (O2) of up to about 3:1—or water vapor (H2O vapor); and generating an inductively coupled plasma in the ion generation region of the chamber to form a silicon oxide layer on the substrate.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: January 12, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Thai Cheng Chua, James P. Cruse, Cory Czarnik
  • Publication number: 20100003834
    Abstract: Disclosed is a method to convert a low resistance cell in a MRAM device to a capacitive cell. The low resistance cell has a plurality of layers on a substrate. At least one layer remote from the substrate is sensitive to oxygen infusion. The method includes removing a cap layer of the cell and applying an oxygen barrier around the cell to expose at least a part of a surface of the at least one layer remote from the substrate. The at least one layer is oxidized. The oxygen barrier is removed.
    Type: Application
    Filed: June 29, 2009
    Publication date: January 7, 2010
    Applicant: Showa Denko HD Singapore Pte Ltd
    Inventor: Kor Seng ANG
  • Patent number: 7641736
    Abstract: A method of manufacturing an SiC single crystal wafer according to the present invention includes the steps of: (a) preparing an SiC single crystal wafer 10 with a mirror-polished surface; (b) oxidizing the surface of the SiC single crystal wafer 10 with plasma, thereby forming an oxide layer 12 on the surface of the SiC single crystal wafer; and (c) removing at least a portion of the oxide layer 12 by a reactive ion etching process. Preferably, the surface of the wafer is planarized by repeatedly performing the steps (b) and (c) a number of times.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: January 5, 2010
    Assignee: Hitachi Metals, Ltd.
    Inventor: Taisuke Hirooka
  • Patent number: 7642152
    Abstract: A method of fabricating spacers is provided. The method includes providing a substrate with a device structure formed thereon. The device structure comprises a gate structure and a pair of source/drain regions. Then, a spacer material layer is formed over the substrate to cover the substrate and the device structure. Thereafter, an etching process is performed to remove a portion of the spacer material layer so that spacers are formed on the respective sidewalls of the gate structure. After that, a plasma treatment step is performed to form a spacer protection layer on the surface of the substrate, the spacers and the gate structure.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: January 5, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Chuan-Kai Wang, Yi-Hsing Chen, Chia-Jui Liu, Juan-Yi Chen, Ming-Yi Lin
  • Patent number: 7638439
    Abstract: A peripheral processing method includes: by at least one of locally heating the periphery of a workpiece including a silicon-based substrate and selectively supplying reacting activation species to the periphery, allowing oxidation rate on the periphery to be higher than oxidation rate of native oxide film on a surface of the silicon-based substrate, thereby forming a first oxide film along the periphery, the first oxide film being thicker than the native oxide film.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: December 29, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeo Kubota, Atsushi Shigeta, Kaori Yomogihara, Makoto Honda, Hirokazu Ezawa
  • Patent number: 7638442
    Abstract: A process for forming a silicon nitride layer on a gate oxide film as part of formation of a gate structure in a semiconductor device includes: forming a layer of silicon nitride on top of a gate oxide film on a semiconductor substrate by a nitridation process, heating the semiconductor substrate in an annealing chamber, exposing the semiconductor substrate to N2 in the annealing chamber, and exposing the semiconductor substrate to a mixture of N2 and N2O in the annealing chamber.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: December 29, 2009
    Assignee: ProMOS Technologies, Inc.
    Inventors: Cheng-Ta Wu, Da-Yu Chuang, Yen-Da Chen, Lihan Lin
  • Patent number: 7635623
    Abstract: A method of forming a capacitor includes forming a conductive first capacitor electrode material comprising TiN over a substrate. TiN of the TiN-comprising material is oxidized effective to form conductive TiOxNy having resistivity no greater than 1 ohm·cm over the TiN-comprising material where x is greater than 0 and y is from 0 to 1.4. A capacitor dielectric is formed over the conductive TiOxNy. Conductive second capacitor electrode material is formed over the capacitor dielectric. Other aspects and implementations are contemplated, including capacitors independent of method of fabrication.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: December 22, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Noel Rocklein, F. Daniel Gealy
  • Publication number: 20090311877
    Abstract: Embodiments of the present invention provide methods of forming oxide layers on semiconductor substrates. In some embodiments, a method of forming an oxide layer on a semiconductor substrate includes forming an oxide layer on a substrate using an oxidation process having a first process gas at a first temperature less than about 800 degrees Celsius; and annealing the oxide layer formed on the substrate in the presence of a second process gas and at a second temperature. The oxidation process may be a plasma or thermal oxidation process performed at a temperature of about 800 degrees Celsius or below. In some embodiments, the post oxidation annealing process may be a spike or soak rapid thermal process, a laser anneal, or a flash anneal performed at a temperature of at least about 700 degrees Celsius, at least about 800 degrees Celsius, or at least about 950 degrees Celsius.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 17, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: CHRISTOPHER S. OLSEN, Yoshitaka Yokota, Rajesh Mani, Johanes Swenberg
  • Publication number: 20090305488
    Abstract: The invention relates to the manufacture of an epitaxial layer, with the following steps: providing a semiconductor substrate; providing a Si—Ge layer on the semiconductor substrate, having a first depth; —providing the semiconductor substrate with a doped layer with an n-type dopant material and having a second depth substantially greater than said first depth; performing an oxidation step to form a silicon dioxide layer such that Ge atoms and n-type atoms are pushed into the semiconductor substrate by the silicon dioxide layer at the silicon dioxide/silicon interface, wherein the n-type atoms are pushed deeper into the semiconductor substrate than the Ge atoms, resulting in a top layer with a reduced concentration of n-type atoms; removing the silicon dioxide layer; growing an epitaxial layer of silicon on the semiconductor substrate with a reduced outdiffusion or autodoping.
    Type: Application
    Filed: November 29, 2005
    Publication date: December 10, 2009
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Philippe Meunier-Beillard, Hendrik G.A. Huizing
  • Publication number: 20090294776
    Abstract: Silicon layer highly sensitive to oxygen and method for obtaining said layer. This layer (2), formed on a substrate (4) for example of SiC, has a 3'2 structure. To obtain it, it is possible to substantially uniformly deposit silicon on a surface of the substrate. The invention can be applied for example to microelectronics.
    Type: Application
    Filed: July 4, 2006
    Publication date: December 3, 2009
    Applicants: Commissarita A L'Energie Atomique, Universite Paris Sud (Paris XI)
    Inventors: Patrick Soukiassian, Fabrice Semond
  • Patent number: 7623937
    Abstract: The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for diagnosing a state of the processing apparatus; and a parameter fitting apparatus for maintaining a parameter of the self-diagnostic system when an inspection result of the semiconductor substrate having undergone the process has been determined to be correct, and for changing the parameter of the self-diagnostic system when the inspection result has been determined to be incorrect.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: November 24, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukihiro Ushiku, Akira Ogawa, Hidenori Kakinuma, Shunji Shuto, Masahiro Abe, Tatsuo Akiyama, Shigeru Komatsu
  • Patent number: 7622402
    Abstract: The surface of an insulating film disposed on an electronic device substrate is irradiated with plasma based on a process gas comprising at least an oxygen atom-containing gas, to thereby form an underlying film at the interface between the insulating film and the electronic device substrate. A good underlying film is provided at the interface between the insulating film and the electronic device substrate, so that the thus formed underlying film can improve the property of the insulating film.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: November 24, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Takuya Sugawara, Yoshihide Tada, Genji Nakamura, Shigenori Ozaki, Toshio Nakanishi, Masaru Sasaki, Seiji Matsuyama, Kazuhide Hasebe, Shigeru Nakajima, Tomonori Fujiwara
  • Patent number: 7618891
    Abstract: The present invention relates to a method for forming self-aligned metal silicide contacts over at least two silicon-containing semiconductor regions that are spaced apart from each other by an exposed dielectric region. Preferably, each of the self-aligned metal silicide contacts so formed comprises at least nickel silicide and platinum silicide with a substantially smooth surface, and the exposed dielectric region is essentially free of metal and metal silicide. More preferably, the method comprises the steps of nickel or nickel alloy deposition, low-temperature annealing, nickel etching, high-temperature annealing, and aqua regia etching.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: November 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: Sunfei Fang, Randolph F. Knarr, Mahadevaiyer Krishnan, Christian Lavoie, Renee T. Mo, Balasubramanian Pranatharthiharan, Jay W. Strane
  • Patent number: 7618901
    Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting The presence of O3 in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: November 17, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej Singh Sandhu, Randhir P S Thakur
  • Patent number: 7615499
    Abstract: A method is presented in which a layer which is to be oxidized is processed, in a single-substrate process. The process temperature during the processing is recorded directly at the substrate or at a holding device for the substrate. The method includes introducing a substrate, which bears a layer to be oxidized uncovered in an edge region in a layer stack, into a heating device, passing an oxidation gas onto the substrate, heating the substrate to a process temperature, which is recorded during the processing via a temperature of a holding device which holds the substrate, and controlling the substrate temperature to a desired temperature or temperature curve during the processing.
    Type: Grant
    Filed: July 26, 2003
    Date of Patent: November 10, 2009
    Assignee: Infineon Technologies AG
    Inventors: Hin-Yiu Chung, Thomas Gutt
  • Publication number: 20090273061
    Abstract: A double-structure silicon on insulator (SOI) substrate with a silicon layer, an insulation film (silicon oxide film), a silicon layer, and an insulation film in this order from the side of the surface. The upper-layer insulation film is formed so as to have a uniform distribution of depth while the lower-layer insulation film is formed so as to have a non-uniform distribution of depth so that a thick portion may be formed in the silicon layer along a predetermined path. The refractive index of Si is 3.5 and the refractive index of SiO2 is 1.5. The thick portion of the silicon layer provides a core and the insulation films corresponding to this thick portion provide clads, thereby forming an optical waveguide along the predetermined path. The silicon layer at the side of the surface has a uniform thickness, thereby enabling characteristics of MOS devices fabricated on various portions of the silicon layer to be met with each other easily and facilitating a design of the electrical device as a whole.
    Type: Application
    Filed: November 17, 2006
    Publication date: November 5, 2009
    Applicant: SONY CORPORATION
    Inventor: Koichiro Kishima
  • Patent number: 7611949
    Abstract: A method of fabricating a metal-oxide-semiconductor (MOS) transistor is provided. First, a patterned hard mask layer with an opening therein is formed over the substrate. A spacer is formed on the sidewall of the patterned hard mask layer in the opening. An isotropic etching process is performed on the substrate to form a recess in the substrate. An ion implant process is performed on the substrate in the lower portion of the recess using oxidation-restrained ions. The spacer is removed. Then, a thermal process is performed to form a gate oxide layer on the surface of the substrate within the recess such that the gate oxide layer in the upper portion of the recess is thicker than that in the lower portion of the recess.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: November 3, 2009
    Assignee: ProMOS Technologies, Inc.
    Inventors: San-Jung Chang, Jim Lin