Abstract: A dynamic block transfer size adjustment mechanism independently defines block transfer size for each memory portion, which may include files in a file system, virtual storage segments in a memory system, or extents in physical storage. By specifying block transfer size for a memory portion independently from other memory portions, the performance of the computer system may be enhanced. In addition, the block transfer size of one or more memory portions may be dynamically adjusted according to how the memory portion is used. In an alternative embodiment, the block transfer size may also be specified for each process that accesses a portion of memory. Thus, a single file may be accessed with a first block transfer size by a first process, and may be accessed with a second (different) block transfer size by a second process.

Abstract: A storage includes: host interface units; file control processors which receives a file input/output request and translates the file input/output request into a data input/output request; file control memories which store translation control data; groups of disk drives; disk control processors; disk interface units which connect the groups of disk drives and the disk control processors; cache memories; and inter-processor communication units. The storage logically partitions these devices to cause the partitioned devices to operate as two or more virtual NASs.

Abstract: An ACPI (Non-Volatile Sleeping) NVS memory region is allocated and defined so that a system BIOS can allocate a placeholder for the different parameters that are passed from the ACPI ASL code to the system management mode (SMM) handler for execution of real mode calls. The different parameters will be updated by runtime ACPI ASL code depending on what needs to be passed to the SMM handler. The SMM handler invokes appropriate calls based on retrieving of different parameters in the ACPI NVS memory region that have been passed from the ACPI ASL code.

Abstract: A method and apparatus provides a mask key that is used instead of mask data. In an embodiment of the present invention, a write mask key is generated by a memory controller and transferred to a memory device that uses the write mask key to determine whether to write a data value to a storage array. A plurality of decoders, an OR logic gate tree and a binary propagation tree is used to provide the write mask key that reduces latency while using the approximate same circuit area and allows for the use of standard software tools in an embodiment of the present invention. A plurality of log2 decoders is coupled to a plurality of OR logic gates in the OR logic gate tree.

Abstract: An interface for managing incremental data storage includes a write function that appends an entry to an incremental log, a read function that retrieves a most recent log entry corresponding to a block address, and a snapshot function that automatically partitions the incremental log into an additional volume. The interface may also include a policy assignment function that associates specified policies with explicitly or implicitly specified resources, a read entry function that retrieves sequential entries from the incremental log, and a compact volume function. The provided functions and associated apparatus, method, and system, facilitate management of incremental data including snapshot, remote copy, data compaction, policy management, data restoration, and other operations on data storage devices and systems.

Abstract: One embodiment of the present invention provides a system that facilitates keeping track of memory usage of tasks in a shared heap without performing a full garbage-collection operation. The system operates by determining a memory usage by each task in a young generation of the shared heap. Once the memory usage for each task has been determined, the system then adds the memory usage for each task in the young generation of the shared heap to a global memory usage for each task (obtained during a preceding full garbage-collection operation) to produce an actual memory usage for each task.

Abstract: A second storage conventionally authenticates a host computer, but this is weak in a disguise attack. Further, since there is provided only an option of two ways: connection authorization and connection rejection, an intrusion into the host computer directly leads to destruction of data in the second storage. Therefore, a plurality of network transportation ports are provided and connected to different networks, respectively, and an access right to data in a second storage is specified for the transportation port. Furthermore, it can be specified whether or not the access for each I/O command is authorized.

Abstract: A storage system is provided that includes a plurality of storage devices and a data structure, accessible to the storage system, that includes a plurality of records corresponding to a plurality of network devices that are coupled to the storage system. Each record includes configuration data that identifies each of the plurality of storage devices to which data access by a respective one of the plurality of network devices is authorized. Each record may further include visibility data that identifies whether certain types of non-data access, such as requests for general information relating to a respective storage device, by a respective one of the plurality of network devices is permitted, even though data access to the respective storage device by the respective one of the plurality of network devices is not authorized.

Abstract: A system and methods for sharing configuration information with multiple services, or processes, via shared memory. The configuration information, typically, comprises runtime information utilized by processes during operation, including without limitation, information describing data communication connections between the local computer and other computing resources (i.e., port and wire information), and information defining numeric values or character string values (i.e., genre and record information). The system architecture includes a plurality of APIs which: reside at the local computer; populate, manage, and control access to a shared memory containing the configuration information; and, are executable only by processes executing at the local computer, thereby limiting access to the shared memory. Access to the configuration information is further limited to only those processes identified as having appropriate permission.

Abstract: A semiconductor integrated circuit device includes a plurality of internal memories, a main processor, which constitutes a first processing unit having a codec function, and a video interface and graphics processor, which constitute a second processing unit for video display processing. The semiconductor integrated circuit device operates while being connected to a CPU, which is an external processing unit, and an external memory. The semiconductor integrated circuit device is provided with a memory configuration controller for controlling the memory allocation to the first, the second, and the external processing unit in accordance with an application.

Abstract: A computer architecture and programming model for high speed processing over broadband networks are provided. The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided. A hardware sandbox structure is provided for security against the corruption of data among the programs being processed by the processing units. The uniform software cells contain both data and applications and are structured for processing by any of the processors of the network. Each software cell is uniquely identified on the network.

Abstract: Methods and arrangements to interface memory are described. Many embodiments comprise comparing a transaction or access from a source to memory addresses associated with the source to determine whether an address associated with the transaction is accessible by the source. Some embodiments may comprise defining protected memory. Several embodiments may comprise defining protected memory by, for example, determining a configuration for memory. Such embodiments may comprise protecting a memory location or limiting access to memory addresses associated with a protected memory location. Some of these embodiments may comprise accessing registers to define protected memory and verifying accesses to a memory location according to the definition of protected memory. Further embodiments may comprise generating an association between a source of an access and a memory location and storing the association to facilitate access to the memory location by the source.

Abstract: A storage system accesses a storage device according to the host I/O request and internal I/O request for preventing a time out error of the host I/O due to a stagnation of command processing. The command processing section performs system load management, where the host I/O requests which are not managed by the storage system are managed according to the system load of the storage system, and for the host I/O requests which exceed the system load, the host I/O request is not processed but an error is replied, and the host retries the command to suppress the stagnation of command processing in the system.

Abstract: A method for managing a range of memory in a flash memory space in which a plurality of data objects are stored. A volume defined for the range of memory has a first end and second end, with a respective list of data objects associated with each end. The volume can be resized, moved, and reallocated in the flash memory space without recompilation.

Abstract: In some embodiments, a system includes a first memory assembly coupled to a first channel and a second memory assembly coupled to a second channel. The system includes a memory controller to write first and second primary data sections to the first and second memory assemblies, respectively, and write first and second redundant data sections to the second and first memory assemblies, respectively, wherein the first and second redundant data sections are redundant with respect to the first and second primary data sections, respectively. Other embodiments are described and claimed.

Abstract: A storage includes: host interface units; file control processors which receives a file input/output request and translates the file input/output request into a data input/output request; file control memories which store translation control data; groups of disk drives; disk control processors; disk interface units which connect the groups of disk drives and the disk control processors; cache memories; and inter-processor communication units. The storage logically partitions these devices to cause the partitioned devices to operate as two or more virtual NASs.

Abstract: A network device for monitoring a memory partitioned by an identifier can include at least one port configured to receive at least one packet. The at least one packet includes an identifier relating to priority of the at least one packet. The network device can also include a buffer memory having at least one buffer configured to store the at least one packet, and a counter configured to modify a counter value therein when the buffer memory is accessed with respect to the at least one data packet, wherein the counter corresponds to the identifier with respect to the at least one packet.

Abstract: The present invention relates to a storage system, including a first storage unit having a first storage volume for storing data, and a second storage unit having a second storage volume communicably connected with the first storage unit, wherein the first storage unit further comprises a replication data transmission unit for transmitting the replication of data to a second storage unit when the data is written to the first storage volume, the second storage unit further comprises a replication data reception unit for writing the replication of the data transmitted by the replication data transmission unit to the second storage volume, the first storage unit further comprises a disk heart beat write unit for repeatedly writing a first heart beat message to the first storage volume at intervals within a predetermined time, and the second storage unit further comprise a disk heart beat detection unit for detecting the replication of the first heart beat message to be written to the second storage volume by the

Abstract: A computer system comprises first and second computer boards, each having a processor, onboard memory, an onboard bus, e.g. a processor bus, and a bus-to-bus bridge for interconnecting the onboard bus with an external bus; the boards have remote slave drivers, and communication drivers, comprising communication management functions, and forming communication chains or channels between the remote slave drivers and the onboard memories.

Abstract: A hardware Secure Processing Unit (SPU) is described that can perform both security functions and other information appliance functions using the same set of hardware resources. Because the additional hardware required to support security functions is a relatively small fraction of the overall device hardware, this type of SPU can be competitive with ordinary non-secure CPUs or microcontrollers that perform the same functions. A set of minimal initialization and management hardware and software is added to, e.g., a standard CPU/microcontroller. The additional hardware and/or software creates an SPU environment and performs the functions needed to virtualize the SPU's hardware resources so that they can be shared between security functions and other functions performed by the same CPU.

Abstract: An area and a process file are assigned to each program to be protected. The process or processes that may run in the corresponding area is or are stored in a process file. When the program is running, a process attempting to access the program is checked to confirm whether the accessing process is included in the corresponding process file. The accessing process is executed only if it is included in the process file.

Abstract: A method of controlling an industrial process by a programmable process control has the steps of taking data in form of resulting values which are decisive for the process, storing the data in a storage of a programmable process control, during starting a control program reading pre-defined configuration data which are stored in a storage in the control and connected with a control program, based on the configuration data selecting a subset of the resulting values adapted to a resulting value storage available in the control, and subsequently storing it in this storage.

Abstract: A method and apparatus for providing multiple queues that share a single memory buffer. A memory buffer is divided into a plurality of fixed length memory segments. Queues are created by chaining one or more memory segments together. Memory segments are allocated on a dynamic basis when needed by a queue. Multiple queues are created wherein each queue consists of a set of one or more memory segments. A list is used to track the memory segments making up a queue. The pointers to the memory segments are stored in a pointer table or a linked list termed a next segment pointer table. Multiple queues are handled by creating multiple linked lists, one for each queue. Each memory segment has associated with it a corresponding next segment pointer. A segment pointer is assigned to each memory segment and is adapted to contain the address of the next segment in the queue.

Abstract: A method, apparatus, and signal-bearing medium for improving the performance of a cache when request streams with different spatial and/or temporal properties access the cache. A set in the cache is partitioned into subsets with different request streams using different subsets within the cache. In this way, interference between the different request streams is reduced.

Abstract: An apparatus and a method for controlling memory in a base station modem supporting multi-users including a memory divided into logical blocks for supporting the multi-users, and a controller for allocating the memory blocks dynamically in hardware. This allows non-continuous memory allocation and the size of memory can be increased or reduced during operation through the dynamic allocation structure of the memory.

Abstract: A distributed-memory multi-processor system includes a plurality of cells communicatively coupled to each other and collectively including a plurality of processors, caches, main memories, and cell controllers. Each of the cells includes at least one of the processors, at least one of the caches, one of the main memories, and one of the cell controllers. Each of the cells is configured to perform memory migration functions for migrating memory from a first one of the main memories to a second one of the main memories in a manner that is invisible to an operating system of the system.

Abstract: A computer system acquires mapping information of data storage regions in respective layers from a layer of DBMSs to a layer of storage subsystems, grasps correspondence between DB data and storage positions of each storage subsystem on the basis of the mapping information, decides a cache partitioning in each storage subsystem on the basis of the correspondence and sets the cache partitioning for each storage subsystem. When cache allocation in the DBMS or the storage subsystem needs to be changed, information for estimating the cache effect due to the change in cache allocation acquired by the DBMS is used for estimating the cache effect in the storage subsystem.

Abstract: Methods, apparatus, and program product are disclosed for use in a computer system to provide for dynamic allocation of a directory memory in a node memory controller in which one or more coherent multiprocessor nodes comprise the computer system. The directory memory in a node is partitioned between a snoop directory portion and a remote memory directory portion. During a predetermined time interval, snoop directory entry refills and remote memory directory entry refills are accumulated. After the time interval has elapsed, a ratio of the snoop directory entry refills to the number of remote memory directory entry refills is computed. The ratio is compared to a desired ratio. Respondent to a difference between the ratio and the desired ratio, adjustments are made to the allocation of the memory directory between the snoop directory and the remote memory directory.

Abstract: Data object management for a range of memory. The range of memory has first and second opposite ends. A plurality of data objects are written to a first contiguous region of memory located at the first end of the range of memory. At least one of the valid data objects of the plurality of data objects are copied to a second contiguous region of memory located at the second end of the range of memory when a reclamation process is requested. The valid data objects copied from the first contiguous region of memory are marked as invalid data in the first contiguous region of memory subsequent to the valid data objects being copied to the second end of the range of memory, and the memory in which invalid data objects in the first contiguous region of memory are located is erased.

Abstract: A database system for selecting rows from a partitioned database table is disclosed. The partitioned database table includes rows and columns and is divided into partitions with at least one of the partitions in the table being populated by one or more rows. The system includes one or more nodes, each of the one or more nodes providing access to one or more CPUs. Each of the one or more CPUs provides access to one or more virtual processes. Each process is configured to manage data, including the partitioned database table, stored in one of a plurality of data-storage facilities. The system also includes a partitioned table access component configured to select rows from the table by creating a file context, which stores at least location data for a row and a first value associated with the row, for each populated partition, determining the lowest first value stored by the file contexts, and identifying rows with a particular first value by reading the file contexts.

Abstract: When communications among a plurality of processors employed in a network storage system are required, any of the processors initiating a communication on the transmission side issues a request to an I/O processing apparatus, which is used for controlling a disk unit and a disk cache common to the processors, in order to allocate an area in the common disk cache as a communication buffer. At such a request, the I/O processing apparatus allocates a specific area in the common disk cache as a communication buffer and gives a notice of the allocation to the requesting processors on the transmission side. Receiving the notice, the transmission-side processors write data to be transferred into the specific area of the disk cache and, then, the reception-side processors fetch the transferred data from the specific area.

Abstract: A memory model for a run-time environment is disclosed that includes a process-specific area of memory where objects in call-specific area of memory and session-specific area of memory can be migrated to at the end of a database call. User-specific objects can be then migrated to the session-specific area of memory. In one embodiment, the process-specific area of memory can be saved in a disk file and used to hot start another instance of an application server.

Abstract: A method of performing multiple operations on a flash memory device is described. This is made possible through the implementation of multiple partitions within the flash memory. The partitions are used to store data, application code, and system code. Low level functions within the system code process the data and handle preemption functions within the flash memory.

Abstract: A data library system with managed device access comprises at least one partition, a plurality of data transfer elements each of the data transfer elements assigned to a partition, a plurality of data storage element slots, each of the slots assigned to a partition, a library controller comprising a virtual controller for each partition, the virtual controller directing movement of the media to and from the slots assigned to a same partition and to and from the data transfer elements assigned to the same partition, and at least one bridge operatively disposed between at least one user and the library, each of the bridges present the data transfer elements and the virtual controllers of each partition to the users as logical components beginning at a same designation for each partition.

Abstract: At the time of a backup process of the sharing disk in a disk shared file system, the write cache of each computer is reflected on a sharing disk, and data of the sharing disk is copied in a backup medium as a batch. Further, blocks to be backed up are listed to be copied in the backup medium as a batch. Then, the log of each computer is stored in a log medium, and the data at the start point of a backup process is formed using the log.

Abstract: An apparatus has host ports for coupling hosts to data storage devices. The data storage devices are configured into logical storage units, and the apparatus is programmed with a mapping of the hosts to respective logical storage units. The apparatus decodes a host identifier and a logical storage unit specification from each data access request received at each host port, and determines whether or not the decoded host identifier and logical storage unit specification are in conformance with the mapping in order to permit or deny data access of the logical storage unit through the host port. For example, the apparatus includes a switch for routing the data storage access requests from the host ports to ports that provide access to the data storage, and a set of logical volumes of storage are accessible from each of the ports that provide access to the data storage.

Abstract: An apparatus comprising a shared memory and a multiprocessor logic circuit. The shared memory may be configured to store data. The multiprocessor logic circuit may comprise a plurality of processors and a message circuit. The message circuit may be configured to pass messages between the processors.

Abstract: In one embodiment of the invention, a virtual volume is divided into “filled” and “empty” virtual volume (VV) regions. Empty VV regions are mapped to a special zero logical disk that does not consist of any physical disk regions. When a host writes to an empty VV region, a logical disk (LD) region is allocated to the empty VV region so the formerly empty VV region becomes a filled VV region mapped to the allocated LD region. If there are no LD regions available, a new logical disk is created. Additional physical storage can be added to the storage server to create new logical disks as the use of the virtual volume grows. Physical allocation warning points and limits allow the system administrator to be alerted to and to control physical allocation for each individual VV and the set of VVs drawing from the same data allocation control structure (DC).

Abstract: A distributed processing system which enables a plurality of computers to make quick access to a shared storage unit. A storage quota management unit manages storage quotas, which limit the total amount of data that each user can store on the shared storage unit. When a write request to the shared storage unit is issued at a certain computer, a user identification unit identifies the requesting user. Then a free quota calculation unit calculates the remaining free storage quota of the identified user. A reserve space allocation unit allocates an appropriate reserve space to the computer according to the remaining free storage quota, allowing the computer to use the allocated reserve space at its discretion to handle the user's data write request.

Abstract: Methods, apparatus, and program product are disclosed for use in a computer system in which one or more multiprocessor nodes comprise the computer system. The methods and apparatus provide for configurable allocation of a memory in a node memory controller. In a single node implementation of the computer system, substantially all of the memory is allocated to a snoop directory used to store directory entries for cache lines used by processors in the node. In computer system implementations having more than one node, the amount of the memory allocated to the snoop directory and the amount of the memory allocated to a remote memory directory is controlled respondent to predetermined sizes respondent to the number of nodes in the computer system.

Abstract: An embodiment of this invention pertains to a system and method for balancing memory accesses to a low cost memory unit in order to sustain and guarantee a desired line rate regardless of the incoming traffic pattern. The memory unit may include, for example, a group of dynamic random access memory units. The memory unit is divided into memory channels and each of the memory channels is further divided into memory lines, each of the memory lines includes one or more buffers that correspond to the memory channels. The determination as to which of one or more buffers within a memory line an incoming information element is stored is based on factors such as the number of buffers pending to be read within each of the memory channels, the number of buffers pending to be written within each of the memory channels, and the number of buffers within each of the memory channels that has data written to it and is waiting to be read.

Abstract: An efficient memory system to implement a multi-list, multi-priority task management scheme. In one embodiment, a single list which is dynamically partitioned among multiple priority levels and effectively implements multiple priority lists. This dynamic re-allocation of memory space available to each priority level is handled using a single write pointer and multiple read pointers. There are as many read pointers as there are desired priority levels. One application is scheduling tasks so that all pending tasks are performed at least n?1 times before any pending task is performed for the nth time. An example of a task that may be scheduled is the retransmission of data in a communication system.

Abstract: Apparatus and methods for synchronizing a distributed mirror. A computer system incorporating the invention may divide a mirror source into N chunks, assigning N storage processors responsibility for respective chunks of the mirror. The storage processors then may communicate among themselves to synchronize a distributed mirror. The storage processors may communicate mirror source blocks or their addresses and host-initiated (user) data requests. A storage processor may assist the synchronization of a mirror. The processor may accept responsibility for a chunk of a mirror source and communicate with a second storage processor responsible for another chunk of the mirror source to synchronize the mirror. The storage processor may track addresses of source blocks currently in use for synchronization, as well as addresses of source blocks to be synchronized after the blocks currently in use for synchronization.

Abstract: A method and apparatus for combining cost effectiveness of data signal ports sharing a common memory storage device with reliable data signal communication of data signal ports each having a dedicated memory storage device. In one embodiment, data signals are received at a number of data signal ports of a data signal communication platform. A data signal bandwidth capability of a memory storage device of the data communication platform is determined. Once the data signal bandwidth capability of the memory storage device is determined, the memory storage device is segmented to improve utilization of the data signal bandwidth capability. As a result, cost effectiveness of data signal ports sharing a common memory storage device and reliability of data signal communication of data signal ports each having a dedicated memory storage device is combined.

Abstract: In one embodiment, a method of remote attestation for a special mode of operation. The method comprises storing an audit log within protected memory of a platform. The audit log is a listing of data representing each of a plurality of IsoX software modules loaded into the platform. The audit log is retrieved from the protected memory in response to receiving a remote attestation request from a remotely located platform. Then, the retrieved audit log is digitally signed to produce a digital signature for transfer to the remotely located platform.

Abstract: A method is provided for creating a plurality of partitions on a removable medium of a removable device connected to a computer system. When the computer is started (S1), the operating system and a device driver communicate with each other (S2). The device driver provides a plurality of drive letters for the removable device, so that the media is divided into partitions corresponding to the number of the drive letters. A drive for a media with fewer partitions is regarded to have no media loaded.

Abstract: A multinodal multiprocessor computer system and method is provided in which a first processor can acquire exclusive access to a first memory location in a shared memory, and at the same time a second processor can access to a second memory location of the shared memory that is located in the same node or in any other node of the computer system. Memory controllers in each node of the computer system control access to the shared memory. A switch coupled to each of the memory controllers maintains a lock register, which is shadowed by each of the memory controllers, for controlling access to the first memory location.

Abstract: A signal record reproduction device 1 of the invention comprises a microcomputer 12 and a memory 17. A series of data blocks are divided into a plurality of items of element data. The element data is interleaved and stored to the memory 17. A memory incorporated in the microcomputer 12 stores a table and a function expression for deriving address data representing an address to store each element data in memory regions positioned sufficiently apart one another in address space.

Abstract: A packet switch having a structure of writing a variable length packet received from each of input lines into a shared buffer memory on a fixed length data block unit basis, wherein a buffer controller forms an input queue for each input line and, when the last data block of a variable length packet is registered in the input queue, links a linked address list for the input queue to one or a plurality of output queues corresponding to one or a plurality of packet destination output lines.

Abstract: A system and method for emulating conventional block appended checksums on storage devices that generally do not support such checksums in a block is provided. A grouping of data sectors with one or more checksum sectors is generated. This grouping is mapped to/from a file system data structure associated with a traditional block appended checksum disk drive.