Computer Power Control Patents (Class 713/300)
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Patent number: 11196706Abstract: In one embodiment, a computer-implemented method comprises storing, in one or more data repositories, a plurality of channel records, each channel record including a channel identification (ID) and channel status indicator; receiving, at a computing device, a join request for a client account to join a channel, the join request including a first channel ID; determining whether a channel record of the plurality of channel records stored in the one or more data repositories includes a channel ID that matches the first channel ID; in response to determining that each channel record of the plurality of channel records does not include a channel ID that matches the first channel ID, creating and storing, in the one or more data repositories, a first channel record that includes: the first channel ID and a channel status indicator set to active; receiving, at the computing device, a first notification from a programmed message transport service that a channel corresponding to the first channel ID is set to inactiveType: GrantFiled: May 16, 2019Date of Patent: December 7, 2021Assignees: ATLASSIAN PTY LTD., ATLASSIAN INC.Inventors: Julien Hoarau, Jerome Touffe-Blin, Patrick Streule
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Patent number: 11194373Abstract: Various embodiments comprise prioritizing frequency allocations in thermally- or power-constrained computing devices. Computer elements may be assigned ‘weights’ based on their priorities. The computer elements with higher weights may receive higher frequency allocations to assure they receive priority in processing more quickly. The computer elements with lower weights may receive lower frequency allocations and suffer a slowdown in their processing. Elements with the same weight may be grouped together for the purpose of frequency allocation.Type: GrantFiled: April 20, 2020Date of Patent: December 7, 2021Assignee: Intel CorporationInventors: Asma Al-Rawi, Federico Ardanaz, Jonathan M. Eastep, Nikhil Gupta, Ankush Varma, Krishnakanth V. Sistla, Ian M. Steiner
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Patent number: 11194741Abstract: A control device is used to adjust an output voltage of a voltage generator, and includes a master circuit, a slave circuit, and a power-scaling control circuit. The master circuit is coupled to a first bus. The slave circuit is coupled to a second bus. In a normal mode, the first and second buses are connected to each other via the power-scaling control circuit, the master circuit accesses the slave circuit via the first and second buses. In an adjustment mode, the power-scaling control circuit controls the master circuit to stop accessing the slave circuit, and the power-scaling control circuit adjusts the output voltage. When the master circuit sends a trigger signal, the power-scaling control circuit enters the adjustment mode. When the master circuit does not send the trigger signal, the power-scaling control circuit enters the normal mode.Type: GrantFiled: December 31, 2019Date of Patent: December 7, 2021Assignee: NUVOTON TECHNOLOGY CORPORATIONInventors: Cheng-Chih Wang, Chih-Ping Lu, Yung-Chi Lan, Chun-Chi Chen
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Patent number: 11188142Abstract: A rules-based mechanism is described for powering down racks in an ordered and autonomous way in a data center. Power shelf controllers (PSCs), on different racks or on the same rack, communicate together through a network, called the PSC network, separate from the data network. The PSCs are aware of the other PSCs that share the same input power domain. When the racks are configured for use, each PSC is assigned a priority value, based upon the management provisioning layer assignment. Each PSC creates a table of all the other PSCs and tracks each assigned priority value. When a power event occurs, the PSC can power down components within the rack in accordance with the priority table. Recovery can also be carried out in conformance with the priority table.Type: GrantFiled: December 11, 2018Date of Patent: November 30, 2021Assignee: Amazon Technologies, Inc.Inventors: Christopher James BeSerra, David Edward Bryan, Gavin Akira Ebisuzaki, Michael Jon Moen, Roey Rivnay
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Patent number: 11188133Abstract: The present disclosure describes a system 400 for transmitting power to a remote Power over Ethernet (PoE) subsystem by forwarding Powered Device (PD) input voltage where the subsystem includes a PD and a Power Sourcing Equipment (PSE) device. Included is a master PSE device 402, a first subsystem 410, and a second subsystem 428. The first subsystem 410 includes a first PD 418 that includes a first power switching device 426 and a first PSE device 424. The first power switching device 426 forwards the input power from the first PD 418 to the first PSE 424 without disturbing the PoE handshaking between the devices. The first power switching device 426 uses a switching device with level detection that detects the required input voltage. The second subsystem 428 receives the power from the first subsystem's 410 first PSE device 424. And the second subsystem 428 operates in a manner similar to the first subsystem 410.Type: GrantFiled: April 9, 2020Date of Patent: November 30, 2021Assignee: ClearOne, Inc.Inventors: Ed Thurmond, Richard Herrera, Byra Ferkovich, Pichet Ong, Peter Manley
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Patent number: 11181961Abstract: A chassis includes power supply units configured to be a primary source of power for several information handling systems. A chassis management controller monitors a power capacity of the power supply units, and sends a measure of first available power of the power supply units to one of the information handling systems. If the power limit of a sled connector is at least equal to the first power requirement of the information handling system, then it may be determined whether a total power available for the information handling system is at least equal to the first power requirement of the one information handling system. If the total power available for the information handling system is at least equal to the first power requirement of the information handling system, then the information handling system may be powered on.Type: GrantFiled: April 7, 2020Date of Patent: November 23, 2021Assignee: Dell Products L.P.Inventors: Doug E. Messick, Aaron M. Rhinehart, Ayedin Nikazm
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Patent number: 11181971Abstract: Embodiments of an apparatus and method are disclosed that may allow for managing power of a computing system. The apparatus may include a clock generation circuit, a bus interface unit, and a control circuit. The clock generation circuit may be configured to generate multiple clock signals. Each clock signal may provide a timing reference to different functional blocks within a device coupled to the communication bus. The bus interface unit may be configured to receive messages from the device via the communication bus. The messages may include a latency value and a request to activate a low power mode. The control circuit may be configured to deactivate one or more of the multiple clock signals dependent upon the latency value and multiple threshold values.Type: GrantFiled: February 3, 2020Date of Patent: November 23, 2021Assignee: Apple Inc.Inventors: David S. Warren, Inna Levit, Timothy R. Paaske
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Patent number: 11183095Abstract: Methods, systems, and devices that support a dynamic screen refresh rate are described. An electronic device may dynamically (e.g., autonomously, while operating) adjust the rate at which a screen is refreshed, such as to balance considerations such as user experience and power consumption by the electronic device. For example, the electronic device may use an increased refresh rate when executing applications for which user experience is enhanced by a higher refresh rate and may use a decreased refresh rate when executing other applications. As another example, the electronic device may use different refresh rates while executing different portions of the same application, as some aspects of an application (e.g., more intense portions of a video game) may benefit more than others from a higher refresh rate. The electronic device may also account of rother factors, such as battery level, when setting or adjusting the refresh rate of the screen.Type: GrantFiled: June 30, 2020Date of Patent: November 23, 2021Assignee: Micron Technology, Inc.Inventors: Ashish Ranjan, Carly M. Wantulok, Prateek Trivedi, Carla L. Christensen, Jun Huang, Avani F. Trivedi
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Patent number: 11181959Abstract: The present disclosure describes a system 400 for transmitting power to a remote Power over Ethernet (PoE) subsystem by forwarding Powered Device (PD) input voltage where the subsystem includes a PD and a Power Sourcing Equipment (PSE) device. Included is a master PSE device 402, a first subsystem 410, and a second subsystem 428. The first subsystem 410 includes a first PD 418 that includes a first power switching device 426 and a first PSE device 424. The first power switching device 426 forwards the input power from the first PD 418 to the first PSE 424 without disturbing the PoE handshaking between the devices. The first power switching device 426 uses a switching device with level detection that detects the required input voltage. The second subsystem 428 receives the power from the first subsystem's 410 first PSE device 424. And the second subsystem 428 operates in a manner similar to the first subsystem 410.Type: GrantFiled: January 17, 2021Date of Patent: November 23, 2021Assignee: ClearOne, Inc.Inventors: Ed Thurmond, Richard Herrera, Byra Ferkovich, Pichet Ong, Peter Manley
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Patent number: 11181960Abstract: Methods and systems for managing power for a Power over Ethernet (PoE) device are disclosed herein. The method may include obtaining, by a supervisor, power information from a plurality of power supply units (PSUs) to obtain total consumed power; obtaining, by the supervisor, a total system power capacity value associated with the plurality of PSUs; and calculating, by the supervisor, a total available PoE power value using the total consumed power and the total system power capacity value; and making a first determination, by the supervisor, using the total available PoE power value and a PoE power table, whether a powered device should stop receiving power.Type: GrantFiled: August 28, 2019Date of Patent: November 23, 2021Assignee: Arista Networks, Inc.Inventors: Eric Jahfei Won Yam, Robert Calvin Cyphers, Charles Melvin Aden, Eudean Michael Sun, Dipankar Bhatt Acharya
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Patent number: 11181969Abstract: An information handling system includes a graphics processing unit and an embedded controller. The embedded controller is communicatively coupled to the graphics processing unit, and executes instructions to perform one or more operations. The embedded controller to set an active count associated with a graphics processing unit to a predetermined value. The embedded controller to monitor an active pin of the graphics processing unit. The embedded controller to receive the temperature of the graphics processing unit from the temperature sensor. In response to the determination that the temperature of the graphics processing unit satisfies a first temperature threshold: the embedded controller to change a state in a power state table to a high power state based on the temperature of the graphics process unit and the active count, wherein the state of the power state table is associated with a central processing unit of the information handling system.Type: GrantFiled: April 2, 2019Date of Patent: November 23, 2021Assignee: Dell Products, LPInventors: Chung S. Wu, Kurt D. Gillespie, Thomas A. Shows, Adolfo S. Montero
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Patent number: 11177665Abstract: A computer controls voltage supply for a system that includes a plurality of active cables. The computer determines that a first voltage source included in a first cable has failed to provide a required amount of voltage to the first cable. The computer switches the first cable to a second voltage source included in a second cable. The second voltage source provides voltage to the first cable.Type: GrantFiled: November 26, 2019Date of Patent: November 16, 2021Assignee: International Business Machines CorporationInventors: Pavel Roy Paladhi, Prasanna Jayaraman, Nam Huu Pham, Daniel M. Dreps
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Patent number: 11176075Abstract: A hybrid bus hub circuit and related apparatus are provided. The bus hub circuit can be configured to bridge a radio frequency front-end (RFFE) bus with a number of auxiliary buses of different types. Each of the auxiliary buses may support a fixed number of slaves identified respectively by a unique slave identification (USID). The hybrid bus hub circuit can be configured to selectively activate an auxiliary bus(es) for communication with the RFFE bus, thus making it possible to reuse a same set of USIDs among the auxiliary buses without causing potential identification conflict. As such, it may be possible to support more slaves in an apparatus with a single RFFE bus. As a result, it may be possible to reduce pin count requirement for an RFFE master and/or enable flexible heterogeneous bus deployment in the apparatus.Type: GrantFiled: June 4, 2019Date of Patent: November 16, 2021Assignee: Qorvo US, Inc.Inventors: Christopher Truong Ngo, Alexander Wayne Hietala
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Patent number: 11169590Abstract: Various implementations described herein are directed to a device having an output pad that provides an input-output (IO) voltage from an IO power supply. The device may include core ramp detection circuitry that detects a first ramp of a core voltage from a core power supply and provides a core ramp sensing signal. The device may include output logic circuitry that couples the output pad to ground after receiving the core ramp sensing signal so as to reduce leakage of the IO power supply.Type: GrantFiled: July 19, 2019Date of Patent: November 9, 2021Assignee: Arm LimitedInventors: Ranabir Dey, Vinay Chenani, Kundan Srivastava, Vijaya Kumar Vinukonda
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Patent number: 11169594Abstract: A host apparatus, into which a card having a nonvolatile semiconductor memory is inserted, issues a check command to the card. The check command instructs to send information on whether the card supports a termination process in which the card shifts into a state ready for a stop of power supply from the host apparatus.Type: GrantFiled: June 30, 2020Date of Patent: November 9, 2021Assignee: Kioxia CorporationInventor: Akihisa Fujimoto
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Patent number: 11165735Abstract: Systems and methods for email validation are disclosed. The email validation includes transforming format of emails to a predefined format understandable the present system and application of text mining component on the transformed format. The email validation further includes obtaining details from a repository related to a historical pattern associated with an email validation requirement and a cognitive learning operation employed for the historical email validation to ascertain an outcome of the historical validation for similar emails. The email validation also includes predicting misdirection of the email and change in configuration of the email account based on the validation of the email.Type: GrantFiled: August 31, 2020Date of Patent: November 2, 2021Assignee: ACCENTURE GLOBAL SOLUTIONS LIMITEDInventors: Vinu Varghese, Anil Kumar, Peter S. Carpenter, Nirav Sampat, Balaji Janarthanam, Shikhar Srivastava, Arun Viswanath, Basaveswara Kiran Dumpala, Narayan Sethi, Elaine T. Bombal
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Patent number: 11157328Abstract: Methods and apparatus for a distributed processing quality of service algorithm for system performance optimization under thermal constraints are disclosed. An example method includes transmitting, at a first time, a first kernel assignment to a system on chip, the first kernel assignment including an indication of a plurality of kernels assigned to a first sub-system of the system on chip, determining, at the first time, a temperature associated with hardware of the system on chip, when the temperature is above a threshold temperature, generating a second kernel assignment including an indication of a first subset of the plurality of kernels assigned to the first sub-system and an indication of a second subset of the plurality of kernels assigned to a second sub-system of the system on chip, and transmitting, at a second time later than the first time, the second kernel assignment to the system on chip.Type: GrantFiled: September 14, 2016Date of Patent: October 26, 2021Assignee: INTEL CORPORATIONInventor: Katrin Matthes
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Patent number: 11150618Abstract: Aspects of the present disclosure include anonymous, asynchronous, and randomized control schemes for distributed energy resources (DERs). Such control schemes may include packetized energy management (PEM) control schemes for managing DERs that may provide near-optimal tracking performance under imperfect information and consumer quality of service (QoS) constraints.Type: GrantFiled: May 23, 2019Date of Patent: October 19, 2021Assignee: University of Vermont and State Agricultural CollegeInventors: Jeffrey Frolik, Paul Hines, Mads Almassalkhi
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Patent number: 11151069Abstract: A USB hub and an operating method thereof are provided. The USB hub includes a first USB connector coupled to a first device, a second USB connector coupled to a second device, a first power switch, a second power switch, a power converter, and a third power switch. The first power switch has a first end coupled to a power pin of the first USB connector. The second power switch has a first end coupled to a second end of the first power switch, and a second end coupled to a power pin of the second USB connector. The power converter has an input coupled to the second end of the first power switch. The third power switch has a first end coupled to an output of the power converter, where a second end of the third power switch is coupled to the power pin of the second USB connector.Type: GrantFiled: May 21, 2020Date of Patent: October 19, 2021Assignee: VIA LABS, INC.Inventor: Li-Feng Pan
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Patent number: 11146425Abstract: An IO-link device (20) configured as slave for transmitting/receiving signal data with a master module (19), the IO-link device comprising: a sensor or actuator (11) configured to produce output measurement signals; a first microcontroller (21) operatively coupled to the sensor or actuator and configured to receive the measurement signals and generate data based on the measurement signals, and a transceiving module (22) which comprises a physical layer transceiver (24) configured to receive/transmit signal data from/to the master module (19), and a second microcontroller (23) operatively coupled and in bi-directional communication with the transceiver, wherein the transceiver (24) is configured to receive signal data associated with a request from the master module (19) and transmit signal data associated with the request to the second microcontroller (23) and the second microcontroller (23) is configured to receive the signal data from the transceiver and to execute a device IO-Link protocol stack, the seconType: GrantFiled: December 27, 2018Date of Patent: October 12, 2021Assignee: DATALOGIC IP TECH S.R.L.Inventors: Fabio Bagalá, Marco Mestieri
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Patent number: 11137815Abstract: Embodiments of the present invention provide methods and apparatus for metering GPU workload in real time. Metering of the GPU workload is performed by a Workload Metering (WLM) algorithm implemented in software or firmware that calculates a duty cycle for the graphics engine. The duty cycle forces the graphics engine to transition from a busy state to an idle state periodically based on measured power consumption, and engages race-to-sleep techniques to place the engine or engines in a low power state during the forced idle times, thereby reducing the overall power draw of the GPU to meet a predetermined power budget. According to some embodiments, the WLM algorithm is deployed on a microcontroller of a power management unit (PMU).Type: GrantFiled: March 15, 2018Date of Patent: October 5, 2021Assignee: NVIDIA CorporationInventor: Amit Pabalkar
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Patent number: 11139652Abstract: Power supply and method for supplying power. One example power supply includes a first power source, a second power source, and a control circuit. The first power source provides electrical current to a first power output terminal. The first power source also provides electrical current to a second power output terminal. The second power source has a voltage level that is lower than the first power source. The control circuit is configured to measure a load current supplied to the second power output terminal. The control circuit is also configured to compare the measured load current to a threshold. Responsive to detecting the measured load current being higher than the threshold, the control circuit is configured to connect the second power source to the second power output terminal to provide electrical current thereto.Type: GrantFiled: May 29, 2018Date of Patent: October 5, 2021Assignee: MOTOROLA SOLUTIONS, INC.Inventors: Jeffrey L. Cutcher, Rajesh Baliram Singh, Daniel L. Cronin, Rolando Hernandez
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Patent number: 11137814Abstract: An application power controller controls power supplied from rechargeable battery packs to a set of aircraft in-flight processing systems that are executing applications. Operations access a repository of application information to obtain a list of applications to be executed by the aircraft in-flight processing systems and power consumption information for the applications. Further operations obtain information from the battery monitor indicating health and capacity of the battery packs. The operations initiate an application deactivation action based on determining that the indicated health and/or capacity of the battery packs does not satisfy a battery protection rule defining constraints on battery usage. The operations then select one of the applications from among the list that is to be deactivated responsive to the application deactivation action, and communicate a command to at least one of the in-flight application processing systems to trigger the selected application to cease being executed.Type: GrantFiled: April 30, 2019Date of Patent: October 5, 2021Assignee: Thales Avionics, Inc.Inventors: Khosro Rabii, James Rengert
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Patent number: 11137817Abstract: A non-transitory, computer-readable recording medium stores therein an arrangement search program that causes a computer that searches arrangement of virtual machines in plural servers in a facility including the plural servers to execute a process that includes setting an initial value of a parameter concerning the arrangement of the plurality of virtual machines in the plurality of servers, based on at least any one of first performance information on power consumption of the plurality of servers, second performance information on power consumption of air conditioning equipment installed in the facility, third performance information on power consumption of power source equipment installed in the facility, and heat coupling information on heat coupling among the plurality of servers and among the plurality of servers and the air conditioning equipment; and updating the parameter by a sequential parameter estimation method, so as to optimize power consumption of the overall facility.Type: GrantFiled: September 24, 2018Date of Patent: October 5, 2021Assignee: FUJITSU LIMITEDInventor: Tomotake Sasaki
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Patent number: 11134320Abstract: A sensor management unit includes an obtaining unit that obtains sensing data from a sensing device to generate sensing data of a plurality of sensing items, a detection unit that detects an overloaded state of the sensing device, a retrieval unit that determines, based on a detection result obtained by the detection unit, at least one sensing item to be retrieved from of the plurality of sensing items and retrieves the determined sensing item, and an output unit that outputs the retrieved sensing item to an external device.Type: GrantFiled: July 25, 2018Date of Patent: September 28, 2021Assignee: OMRON CorporationInventors: Shuichi Misumi, Tetsuji Yamato, Takeshi Naito, Ryota Yamada
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Patent number: 11132050Abstract: A computing device apparatus facilitates use of a deep low power mode that includes powering off the device's CPU by including a hardware implemented process to trigger storage of data from the device's volatile storage elements in non-volatile memory in response to entering the low power mode. A hardware based power management unit controls the process including interrupting a normal processing order of the CPU and triggering the storage of the data in the non-volatile memory. In response to a wake-up event, the device is triggered to restore the data stored in the non-volatile memory to the volatile memory prior to execution of a wake up process for the CPU from the low power mode. The device includes a power storage element such as a capacitor that holds sufficient energy to complete the non-volatile data storage task prior to entering the low power mode.Type: GrantFiled: June 25, 2019Date of Patent: September 28, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Michael Zwerg, Steven Craig Bartling, Sudhanshu Khanna
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Patent number: 11132049Abstract: Methods and apparatus for adaptive power profiling in a baseband processing system. In an exemplary embodiment, an apparatus includes one or more processing engines. Each processing engine performs at least one data processing function. The apparatus also includes an adaptive power profile (APP) and a job manager that receives job requests for data processing. The job manager allocates the data processing associated with the job requests to the processing engines based on the adaptive power profile. The adaptive power profile identifies a first group of the processing engines to perform the data processing associated with the job requests, and identifies remaining processing engines to be set to a low power mode.Type: GrantFiled: August 20, 2019Date of Patent: September 28, 2021Assignee: Marvell Asia Pte, Ltd.Inventors: Kalyana S Venkataraman, Gregg A Bouchard, Eric Marenger, Ahmed Shahid
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Patent number: 11133053Abstract: Techniques, apparatus, and devices for managing power in a memory die are described. A memory die may include an array of memory cells and one or more voltage sensors. Each voltage sensor may be on the same substrate as the array of memory cells and may sense a voltage at a location associated with the array. The voltage sensors may generate one or more analog voltage signals that may be converted to one or more digital signals on the memory die. In some cases, the analog voltage signals may be converted to digital signals using an oscillator and a counter on the memory die. The digital signal may be provided to a power management integrated circuit (PMIC), which may adjust a voltage supplied to the array based on the digital signal.Type: GrantFiled: April 30, 2020Date of Patent: September 28, 2021Assignee: Micron Technology, Inc.Inventors: Fuad Badrieh, Thomas H. Kinsley, Baekkyu Choi
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Patent number: 11132040Abstract: A Universal Serial Bus (USB) dock includes ports, a processor, and instructions to cause the processor, below a level of an operating system running applications and accessing the USB dock, identify a first port of the plurality of ports as a priority port. The processor may be further caused to detect a connection to the dock. The processor may be further caused to determine whether a candidate port to which the connection is made is the priority port. The processor may be further caused to, based on a determination that the candidate port is the priority port, recover power from other ports and advertise power capabilities of the priority port to a USB element connecting to the dock.Type: GrantFiled: September 28, 2018Date of Patent: September 28, 2021Assignee: MICROCHIP TECHNOLOGY INCORPORATEDInventors: Brigham Steele, Andrew Rogers, Shannon Cash, Matthew Kalibat
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Patent number: 11132046Abstract: Power governance circuitry is provided to control a performance level of a processing unit of a processing platform. The power governance circuitry comprises measurement circuitry to measure a current utilization of the processing unit at a current operating frequency and to determine any change in utilization or power and frequency control circuitry is provided to update the current operating frequency to a new operating frequency by determining a new target quantified power expenditure to be applied in a subsequent processing cycle depending on the determination of any change in utilization or power. A new operating frequency is selected to satisfy the new target quantified power based on a scalability function specifying a variation of a given value of utilization or power with the operating frequency. A processing platform and machine readable instructions are provided to set a new quantified target power of a processing unit.Type: GrantFiled: December 15, 2017Date of Patent: September 28, 2021Assignee: Intel CorporationInventors: Barnes Cooper, Harinarayanan Seshadri, Rajeev Muralidhar, Noor Mubeen
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Patent number: 11126250Abstract: An information handling system includes first and second power supplies and a power assist unit. The power supplies are each configured to provide power to a power rail to power a load of the information handling system, to provide input power indications that indicates whether or not the power supplies are receiving good input power, and to provide a output power indications that indicates whether or not the power supplies are providing good power to the power rail. The power assist unit is coupled to the power rail and includes a power storage element, a converter coupled to the power storage element and to the power rail, and a controller. The controller receives a hold-up signal from the information handling system, and in response to receiving the hold-up signal, directs the converter to provide power from the power storage element to the power rail. The hold-up signal is based upon the input power indications and upon the output power indications.Type: GrantFiled: October 30, 2018Date of Patent: September 21, 2021Assignee: Dell Products L.P.Inventors: Mark A. Muccini, Guangyong Zhu, Thomas R. Thibodeau, Lei Wang
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Patent number: 11126252Abstract: A computer system and a power management method thereof are provided. The computer system includes a storage apparatus and a processor. The processor is coupled to the storage apparatus. The processor obtains a state transition time of the storage apparatus. The state transition time is the time the storage apparatus takes to enter a power state and leave the power state. The processor changes a transition tolerance time according to the state transition time. In response to an idle timeout, the processor determines whether the storage apparatus enters the power state according to a comparison result between the transition tolerance time and the state transition time. Accordingly, power consumption and performance are improved.Type: GrantFiled: November 28, 2019Date of Patent: September 21, 2021Assignee: Acer IncorporatedInventors: Guan-Yu Hou, Tz-Yu Fu
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Patent number: 11126253Abstract: An electronic device includes a main circuit including a processor, a sub circuit that transits between a first state and a second state, and a power supply circuit that supplies electric power to the main circuit and the sub circuit. An electrical distance between the main circuit and the power supply circuit is shorter than an electrical distance between the main circuit and the sub circuit. When the processor determines to cause the sub circuit to transit from the second state to the first state, the processor increases electric power supplied from the power supply circuit to the sub circuit. The sub circuit transits from the second state to the first state in response to increase of the electric power supplied from the power supply circuit.Type: GrantFiled: January 27, 2020Date of Patent: September 21, 2021Assignee: Seiko Epson CorporationInventor: Yukio Okamura
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Patent number: 11126255Abstract: The present disclosure relates to systems, methods, and computer readable media for enabling a power shelf unit to communicate a power throttle signal to devices of a power rack (or other grouping of devices) via a busbar. In particular, systems disclosed herein involve detecting a trigger condition associated with throttling power on server devices of a server rack. In response to detecting the trigger condition, systems here cause a direct current (DC) power supply voltage to change from an operating voltage to a notification voltage for a period of time to alert or otherwise communicate to server devices coupled to the busbar of the trigger condition. Causing the DC power supply voltage to change to the notification voltage may cause processors on server devices to throttle power consumption in accordance with one or more power capping policies implanted thereon.Type: GrantFiled: June 29, 2020Date of Patent: September 21, 2021Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Banha Sok, Rameez Kadar Kazi, Mark Andrew Shaw, Fredrick Anthony Constantino
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Patent number: 11117210Abstract: A welding-type system includes a welding-type power supply to output welding-type power, and a controller connected to the welding-type power supply. The controller is configured to set a value of a control variable of a control loop of the welding-type power supply, the control loop controlling the welding-type power. The controller is also configured to adjust the value of the control variable while monitoring the control loop. In response to detecting oscillation in the control loop, the controller is configured to determine a weld circuit inductance associated with a weld circuit of the welding-type system based on a relationship between the adjusted control variable value and the weld circuit inductance.Type: GrantFiled: August 26, 2019Date of Patent: September 14, 2021Assignee: Illinois Tool Works Inc.Inventor: Richard M. Hutchison
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Patent number: 11119548Abstract: Technology to dynamically throttle power in a power delivery system is described. In one embodiment, a power delivery system includes a controller associated with a port to supply power. The controller manages a power budget available to the port based on a current state of one or more system parameters. The power budget available to the port can be throttled when the power delivery system operates under stress conditions and adjusted when the power delivery system is no longer operating under stress conditions.Type: GrantFiled: March 20, 2020Date of Patent: September 14, 2021Assignee: Cypress Semiconductor CorporationInventors: Ajay Venkideswaran, Debraj Bhattacharjee, Kailas Iyer
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Patent number: 11119563Abstract: A power management application running in a Chassis Management Controller reads utilization values of each server node dynamically in real time and assigns a respective priority to each server node based on its utilization value. The range of the utilization values is divided into terciles and the corresponding priorities assigned to the terciles are as HIGH, MEDIUM and LOW. The priorities are uses as guidelines for allocating power from a manageable power budget to each server node. A chassis power budget specified by an administrator includes the manageable power and unmanageable power used, for example, to power utilities, such as fans. Care is taken that a HIGH priority server node always receives its maximum power consumption rate, with the LOW priority server node receiving no less than its maximum power consumption rate. The MEDIUM priority server node receives at least the mean between its maximum and minimum power consumption rate.Type: GrantFiled: September 16, 2019Date of Patent: September 14, 2021Assignee: Cisco Technology, Inc.Inventors: Vikram Bodireddy, Sriranjan Bose
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Patent number: 11113246Abstract: An illustrative pseudo-file-system driver uses deduplication functionality and resources in a storage management system to provide an application and/or a virtual machine with access to a locally-stored file system. From the perspective of the application/virtual machine, the file system appears to be of virtually unlimited capacity. The pseudo-file-system driver instantiates the file system in primary storage, e.g., configured on a local disk. The application/virtual machine requires no configured settings or limits for the file system's storage capacity, and may thus treat the file system as “infinite.” The pseudo-file-system driver intercepts write requests and may use the deduplication infrastructure in the storage management system to offload excess data from local primary storage to deduplicated secondary storage, based on a deduplication database.Type: GrantFiled: October 2, 2019Date of Patent: September 7, 2021Assignee: Commvault Systems, Inc.Inventors: Amit Mitkar, Paramasivam Kumarasamy, Rajiv Kottomtharayil
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Patent number: 11115921Abstract: A battery powered wireless apparatus, method, and system. A battery powered wireless node operates to communicating with a gateway on a local area network through the network communication device, cease communication with the gateway after a predetermined period for a predetermined interval of time, and communicate with the gateway continuously when an event occurs.Type: GrantFiled: May 24, 2019Date of Patent: September 7, 2021Assignee: California Eastern Laboratories, Inc.Inventors: James Paul Hartman, Damon Mark Stewart
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Patent number: 11108574Abstract: Technologies for switch link and ply management for variable oversubscription ratios include powering up and down links of one or more network plys according to bandwidth demand, desired oversubscription ratio and/or other parameters. Telemetry data representing one or more network traffic metrics of one or more switch plies is monitored to determine respective power states of the plurality of links associated with the one or more switch plies as a function of a desired oversubscription ratio calculated based on the telemetry data. The respective power state of the plurality of links is set accordingly.Type: GrantFiled: September 26, 2019Date of Patent: August 31, 2021Assignee: Intel CorporationInventors: Mrittika Ganguli, Joe Carvalho, Gary Muntz, Matthew J. Adiletta
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Patent number: 11106186Abstract: Aspects of the present disclosure include anonymous, asynchronous, and randomized control schemes for distributed energy resources (DERs). Such control schemes may include packetized energy management (PEM) control schemes for managing DERs that may provide near-optimal tracking performance under imperfect information and consumer quality of service (QoS) constraints.Type: GrantFiled: May 23, 2019Date of Patent: August 31, 2021Assignee: University of Vermont and State Agricultural CollegeInventors: Jeffrey Frolik, Paul Hines, Mads Almassalkhi
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Patent number: 11106267Abstract: A method for managing clock frequency in a multi-core integrated circuit includes determining a minimum allowable operating clock frequency and a maximum allowable operating clock frequency for an integrated circuit having a plurality of processor cores. A plurality of clock sources is configured to provide a corresponding plurality of clock frequencies between the minimum allowable operating clock frequency and the maximum allowable operating clock frequency. A total number of active processor cores is determined. If it is determined that all of the plurality the processor cores are active, all active processor cores are operated at the minimum allowable operating clock frequency. If it is determined that the total number of active processor cores is lower than a threshold number, the clock frequency of one or more active processor cores is increased based on available electrical current budget.Type: GrantFiled: November 27, 2019Date of Patent: August 31, 2021Assignee: Amazon Technologies, Inc.Inventors: Larisa Goffman-Vinopal, Udi Sherel, Anat Arbely, Yaniv Shapira
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Patent number: 11101736Abstract: A system may include a power supply configurable to generate any of a plurality of output voltages on a power supply output node. The system also may include a voltage auto-detection power distribution (PD) controller coupled to the power supply. The voltage auto-detection PD controller is configured to monitor an input signal for detection of presence of a device coupled to the system via a cable and assert combinations of a plurality of control signals. For each combination of control signals, the voltage auto-detection PD controller measures a value of an output voltage from the power supply, stores the measured value, and generates a plurality of packets for transmission to the device. Each packet contains a parameter indicative of a measured output voltage.Type: GrantFiled: October 9, 2019Date of Patent: August 24, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Deric Wayne Waters
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Patent number: 11099628Abstract: An apparatus is provided, where the apparatus includes a plurality of components, wherein an individual component has a corresponding throttling priority of a plurality of throttling priorities. The apparatus further includes logic to selectively throttle one or more of the plurality of components. In an example, an order in which the one or more of the plurality of components are to be throttled may be based on the plurality of throttling priorities.Type: GrantFiled: September 27, 2018Date of Patent: August 24, 2021Assignee: Intel CorporationInventors: Avinash Ananthakrishnan, Jeremy Shrall
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Patent number: 11102070Abstract: Some embodiments of the invention provide a network forwarding element that can be dynamically reconfigured to adjust its data message processing to stay within a desired operating temperature or power consumption range. In some embodiments, the network forwarding element includes (1) a data-plane forwarding circuit (“data plane”) to process data tuples associated with data messages received by the IC, and (2) a control-plane circuit (“control plane”) for configuring the data plane forwarding circuit. The data plane includes several data processing stages to process the data tuples. The data plane also includes an idle-signal injecting circuit that receives from the control plane configuration data that the control plane generates based on the IC's temperature. Based on the received configuration data, the idle-signal injecting circuit generates idle control signals for the data processing stages.Type: GrantFiled: April 1, 2019Date of Patent: August 24, 2021Assignee: Barefoot Networks, Inc.Inventor: Remy Chang
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Patent number: 11101633Abstract: A DC and/or an AC power transmission circuit protection system is for protection of a cabling medium. The circuit protection system includes a power supply, a powered device and a circuit protection module that includes an over-current and/or over-voltage circuit module and/or a heat circuit protector. The protection system is disposed between the power supply and the powered device, and interrupts an electrical current that flows through the cabling medium when the over-current and/or over-voltage circuit module and/or the circuit protector exceeds a predetermined level. There is also provided a method to dispose the circuit protection system and the circuit protection module within the circuit and to interrupt the circuit when over-current and/or over-voltage circuit module and/or heat circuit protector exceeds a predetermined level.Type: GrantFiled: February 11, 2019Date of Patent: August 24, 2021Inventor: Frederick M. Foster
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Patent number: 11100014Abstract: A data processing apparatus is provided, comprising controller circuitry. The controller circuitry includes processing circuitry that executes a stream of instructions. Communication circuitry obtains a command from shared storage circuitry to cause the processing circuitry to execute a subset of instructions in the stream of instructions, and proactively transmit additional data to the shared storage circuitry.Type: GrantFiled: September 9, 2016Date of Patent: August 24, 2021Assignee: Arm LimitedInventor: Carlos Garcia-Tobin
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Patent number: 11092264Abstract: A flexible pipe system includes an unbonded flexible pipe connected to a floating vessel and a sensor system with an optical fibre integrated in the unbonded flexible pipe. Interrogating equipment transmits optical signals into the fibre, receives optical signals reflected from the fibre and detects a parameter of the unbonded flexible pipe. A turret connects the flexible pipe rotationally to the floating vessel via a swivel device that provides a fluid transfer passage between the turret and the vessel. The interrogating equipment is arranged on the turret and is further configured to transfer signals indicative of the detected parameter to receiving equipment on the floating vessel. In this way, optical signals reflected from the fibre can reach the interrogating equipment without distortion in the swivel, so that parameters can be detected with sufficient quality also for floating vessels equipped with a turret mooring system.Type: GrantFiled: July 5, 2017Date of Patent: August 17, 2021Assignee: NATIONAL OILWELL VARCO DENMARK I/SInventors: Bo Asp Moller Andersen, Michael Eilersen, Nicky Weppenaar
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Patent number: 11086799Abstract: A method for configuring a controller in a master control chip can include operations such as: a controller is configured according to a sampling rate, a bit width occupied by data transmission of at least one peripheral and the number of the at least one peripheral plugged into an interface corresponding to the controller; and data transmitted by the at least one peripheral plugged into the interface is received through the configured controller. A configuration parameter of the controller is reconfigured, and then the peripheral may be connected to the interface at timing generated by the controller and the data transmitted by the at least one peripheral is acquired, thereby increasing the types of peripherals supported by the master control chip, and increasing the number of peripherals that can be plugged into the master control chip.Type: GrantFiled: November 19, 2019Date of Patent: August 10, 2021Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.Inventor: Tao Jin
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Patent number: 11088567Abstract: Examples of the disclosure are directed to methods of managing power of various modules of an electronic device to prevent the voltage of the battery from falling to an undervoltage lockout (UVLO) threshold. In some examples, software operating on the electronic device or an associated electronic device (e.g., a paired electronic device) may assign power budgets to one or more modules, thereby preventing each module from drawing its maximum current capacity and causing the battery's voltage level to fall to the UVLO threshold. In some examples, a pre-UVLO threshold (i.e., a threshold higher than the UVLO threshold) may be used to modify the states of one or more modules to save power as the voltage of the battery approaches the UVLO threshold, but before the device must be fully powered off.Type: GrantFiled: July 3, 2019Date of Patent: August 10, 2021Assignee: Apple Inc.Inventors: Cyril De La Cropte De Chanterac, David A. Hardell, Matthew L. Semersky, Yehonatan Perez