Reliability And Availability Patents (Class 714/1)
  • Publication number: 20090013207
    Abstract: A method of predicting the lifetime reliability of an integrated circuit device with respect to one or more failure mechanisms includes breaking down the integrated circuit device into structures; breaking down each structure into elements and devices; evaluating each device to determine whether the device is vulnerable to the failure mechanisms and eliminating devices determined not to be vulnerable; estimating, for each determined vulnerable device, the impact of a failure of the device on the functionality of the specific element associated therewith, and classifying the failure into a fatal failure or a non-fatal failure, wherein a fatal failure causes the element employing the given device to fail; determining, for those devices whose failures are fatal, an effective stress degree and/or time; determining one or more of a failure rate and a probability of fatal failure for the devices, and aggregating the same across the structures and the failure mechanisms.
    Type: Application
    Filed: August 11, 2008
    Publication date: January 8, 2009
    Applicant: International Business Machines Corporation
    Inventors: Pradip Bose, Zhigang Hu, Jude A. Rivers, Jeonghee Shin, Victor Zyuban
  • Patent number: 7475166
    Abstract: A method, computer program product, and distributed data processing system that allows a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, to validate that a direct memory access address referenced by an incoming I/O transaction that was initiated through a memory mapped I/O operation are associated with a virtual adapter or virtual resource that is referenced by the incoming memory mapped I/O operation is provided. Specifically, the present invention is directed to a mechanism for sharing conventional PCI (Peripheral Component Interconnect) I/O adapters, PCI-X I/O Adapters, PCI-Express I/O Adapters, and, in general, any I/O adapter that uses a memory mapped I/O interface for communications. A single physical I/O adapter validates that one or more direct memory access addresses referenced by an incoming I/O transaction initiated through a memory mapped I/O operation are associated with a virtual adapter or virtual resource that is referenced by the incoming memory mapped I/O operation.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: January 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Richard Louis Arndt, Giora Biran, Harvey Gene Kiel, Vadim Makhervaks, Renato John Recio, Leah Shalev, Jaya Srikrishnan
  • Publication number: 20090006883
    Abstract: Described herein is technology for, among other things, accessing error report information. It involves various techniques and tools for analyzing and interrelating failure data contained in error reports and thereby facilitating developers to more easily and quickly solve programming bugs. Numerous parameters may also be specified for selecting and searching error reports. Several reliability metrics are provided to better track software reliability situations. The reliability metrics facilitate the tracking of the overall situation of failures that happen in the real word by providing metrics based on error reports (e.g., failure occurrence trends, failure distributions across different languages).
    Type: Application
    Filed: June 27, 2007
    Publication date: January 1, 2009
    Applicant: Microsoft Corporation
    Inventors: Dongmei Zhang, Yingnong Dang, Xiaohui Hou, Song Huang, Jian Wang
  • Patent number: 7472138
    Abstract: A system and method in a data processing system for recovering data in a file system. A request to modify a data block in the file system is detected. In response to detecting the request to modify the data block, metadata describing the data block in the file system is written in a log. In response to detecting an error during the writing of the metadata, an error counter is incremented. Finally, in response to a request to recover the data in the file system, the metadata is read only if the error counter is less than or equal to a predetermined value.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Janet Elizabeth Adkins, Joon Chang, Ashley D. Lai
  • Patent number: 7467068
    Abstract: The present invention is a method and an apparatus for detecting dependability vulnerabilities in production IT environments. In one embodiment, a method for detecting a dependability vulnerability in a production IT environment includes injecting a synthetic disturbance into the production IT environment and observing the response of the production IT environment to the synthetic disturbance.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: December 16, 2008
    Assignee: International Business Machines Corporation
    Inventors: Aaron B. Brown, John W. Sweitzer
  • Patent number: 7467198
    Abstract: An execution architecture, a development architecture and an operations architecture for a netcentric computing system. The execution architecture contains common, run-time services required when an application executes in the netcentric computing system. The development architecture is the production environment for one or several systems development projects as well as for maintenance efforts. The purpose of the development environment is to support the tasks involved in the analysis, design, construction, and maintenance of business systems, as well as the associated management processes. It is important to note that the environment should adequately support all the development tasks, not just the code/compile/test/debug cycle. The operations architecture is a combination of tools and support services required to keep a production system up and running efficiently.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: December 16, 2008
    Assignees: Accenture LLP, Accenture ANS
    Inventors: Marina Goodman, Tor Mesoy, Stanton J. Taylor, Scott R. Reiter, Michael T. Bowen, Ralph Auriemma, Tamara D. Alairys, Christopher M. Degiorgio, Lizbeth Johnson Coleman
  • Patent number: 7464119
    Abstract: A computer automated system for measuring software reliability is provided. The system comprises a data store including mean-time-between-failure and mean-time-to-repair metrics for applications and an analysis component. The analysis component determines a reliability index for an application and generates a report associating the reliability index with the application. The reliability index is determined based on dividing the mean-time-between-failure of the application by the mean-time-to-repair of the application. An embodiment of the computer automated system further includes a maintenance financial index that is used to evaluate the development plan, where the maintenance financial index is based on the product of the reliability index multiplied by a delivery rate metric. The delivery rate metric is proportional to a software size metric and inversely proportional to a software development effort metric.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: December 9, 2008
    Assignee: Sprint Communications Company L.P.
    Inventors: Abdul G. Akram, George W. Hoff, Jerry F. Matson
  • Publication number: 20080294931
    Abstract: A method (which can be computer implemented) for assisted remediation of at least one problem with a computer system includes the steps of obtaining data from the computer system, the data being indicative of the at least one problem; hypothesizing at least a first candidate remediation process for the problem from among a plurality of annotated remediation process descriptions, based at least in part on the data; associating at least a first attribute with the at least first candidate remediation process; and facilitating presentation of the at least first candidate remediation process with the associated attribute to a remediation agent.
    Type: Application
    Filed: May 21, 2007
    Publication date: November 27, 2008
    Applicant: International Business Machines Corporation
    Inventors: David F. Bantz, Thomas E. Chefalas, Srikant Jalan
  • Patent number: 7444554
    Abstract: This invention provides a storage apparatus for inhibiting temperature increase in a chassis caused when a cooling fan or a module is detached and replaced due to the failure thereof. The storage apparatus comprises a controller for controlling data transfer, a power source supplying a power to a hard disk drive and the controller and having a fan, and a base chassis. The controller monitors a state of other controller and the power source, rotates the fan of the power source corresponding to the module in which a failure is detected at a first high speed higher than a normal rotational speed when detecting the failure of the other controller or the power source, and rotates the fan rotated at the first high speed at a second high speed higher than the first high speed when detecting the detachment of the module in which the failure is detected.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: October 28, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Hori, Kiyoshi Honda
  • Patent number: 7441243
    Abstract: A system, method, and service associated with a computing grid or a virtual organization include a request for proposal (RFP) generator, where the RFP describes a data processing task. The RFP is provided to multiple resource providers via the computing grid where each of the resource providers is potentially suitable for performing the data processing task on behalf of the resource consumer. An RFP response processor receives and evaluates RFP responses generated by one or more of the resource providers. An exception processor accessible to the RFP response processor evaluates any exception in the RFP to determine if the exception disqualifies the RFP response. The exceptions may include, for example, job time limit exceptions, resource requirement exceptions, hardware/software platform requirement exceptions and others. Exception rules may be defined to guide the evaluation of the exception.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: October 21, 2008
    Assignee: International Business Machines Corporation
    Inventors: Craig W Fellenstein, Rick Allen Hamilton, II, Joshy Joseph, James Wesley Seaman
  • Publication number: 20080256383
    Abstract: A method of predicting the lifetime reliability of an integrated circuit device with respect to one or more failure mechanisms includes breaking down the integrated circuit device into structures; breaking down each structure into elements and devices; evaluating each device to determine whether the device is vulnerable to the failure mechanisms and eliminating devices determined not to be vulnerable; estimating, for each determined vulnerable device, the impact of a failure of the device on the functionality of the specific element associated therewith, and classifying the failure into a fatal failure or a non-fatal failure, wherein a fatal failure causes the element employing the given device to fail; determining, for those devices whose failures are fatal, an effective stress degree and/or time; determining one or more of a failure rate and a probability of fatal failure for the devices, and aggregating the same across the structures and the failure mechanisms.
    Type: Application
    Filed: April 16, 2007
    Publication date: October 16, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pradip Bose, Zhigang Hu, Jude A. Rivers, Jeonghee Shin, Victor Zyuban
  • Patent number: 7433880
    Abstract: A system, method and computer program for processing data having a plurality of data values contained in a plurality of data fields of varying types and lengths that includes encoding data values of the data fields into integer values, forming one or more first binary words from the binary form of the integer values, identifying a selected combination of the data fields, unpacking integer values of encoded data values of the identified data fields from the one or more first binary words, combining the unpacked integer values to form one or more second binary words, and employing each of the one or more second binary words as an input parameter to a selected function to derive output information collectively representing data values of the identified data fields. At least some portion of at least one of the one or more first binary words are formed from the binary form of the integer values encoded from at least two different data fields.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: October 7, 2008
    Assignee: Atwell Computer Medical Innovations, Inc.
    Inventors: Vondal C. Hutchins, Joyce Hutchins
  • Patent number: 7434085
    Abstract: A computer system and method for providing high availability. The computer system includes an application level, an operating system level supporting the application level, and a firmware level supporting the operating system level. The firmware level includes a microprocessor having a system management mode that functions independently from the operating system level. The system management mode is configurable to execute system management code to monitor each of the levels of the computer system and to correct malfunctions in the levels in response to a system management interrupt.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: October 7, 2008
    Assignee: Intel Corporation
    Inventor: Nick Ramirez
  • Publication number: 20080238633
    Abstract: A computer system (1) includes a housing. An RFID tag (4) can be placed as a rating plate on the housing of the computer system (1).
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Inventor: Franz Siebert
  • Patent number: 7428656
    Abstract: A method of performing a retry procedure may begin with detecting an error in a first zone of a data storage medium. Upon detecting the error, it is determined whether any retry procedure of a sequence of retry procedures has been performed upon detecting a previous error in the first zone. If a first retry procedure of the sequence was unsuccessfully performed upon detecting the previous error, there is performed a second retry procedure that follows next after the first retry procedure in the sequence.
    Type: Grant
    Filed: November 2, 2004
    Date of Patent: September 23, 2008
    Assignee: Seagate Technology LLC
    Inventors: CheeWai Lum, KokChoon See, LianYong Tan, KokSeng Lim
  • Publication number: 20080229139
    Abstract: We explore techniques for designing nonblocking algorithms that do not require advance knowledge of the number of processes that participate, whose time complexity and space consumption both adapt to various measures, rather than being based on predefined worst-case scenarios, and that cannot be prevented from future memory reclamation by process failures. These techniques can be implemented using widely available hardware synchronization primitives. We present our techniques in the context of solutions to the well-known Collect problem. We also explain how our techniques can be exploited to achieve other results with similar properties; these include long-lived renaming and dynamic memory management for nonblocking data structures.
    Type: Application
    Filed: May 30, 2008
    Publication date: September 18, 2008
    Inventors: Mark S. Moir, Victor M. Luchangco, Maurice Herlihy
  • Publication number: 20080222446
    Abstract: an apparatus comprises a data display unit which causes a display device to output display data that indicates a drawing screen complying with the display request, a reliability decision unit which decides a legality of a transmission source of the display request, and which makes an output request for information capable of confirming a reliability of the display data that the data display unit causes the display device to output, on the basis of a result of the decision, and an output unit which outputs the information capable of confirming the reliability of the display data as complies with the output request from the reliability decision unit, separately from the display data that is caused to be outputted by the data display unit.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 11, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kouichi Yasaki, Naoki Nishiguchi, Kazuaki Nimura
  • Patent number: 7424604
    Abstract: A processor programmed to write to a memory location a first weighted value corresponding to the processor to overwrite a second weighted value stored in the memory location and associated with another processor. The processor is also programmed to compare the first weighted value of the processor with the second weighted value associated with the other processor and to select the processor if the first weighted value of the processor is better than the second weighted value.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: September 9, 2008
    Assignee: Intel Corporation
    Inventor: Todd A. Schelling
  • Patent number: 7421623
    Abstract: Systems, methods and media for controlling temperature of a system are disclosed. More particularly, hardware, software and/or firmware for controlling the temperature of a computer system are disclosed. Embodiments may include receiving component temperatures for a group of components and selecting a component to perform an activity based at least partially on the component temperatures. In one embodiment, the lowest temperature component may be selected to perform the activity. Other embodiments may provide for determining an average temperature of the components, and if the average temperature exceeds a threshold, delaying or reducing the performance of the components. In some embodiments, components may include computer processors, memory modules, hard drives, etc.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: September 2, 2008
    Assignee: International Business Machines Corporation
    Inventor: Julianne Frances Haugh
  • Publication number: 20080209253
    Abstract: Provided are a method, system, and article of manufacture, wherein a plurality of data arrays coupled to a storage controller is maintained. Data arrays are selected from the plurality of data arrays based on predetermined selection rules. Data is stored redundantly in the selected data arrays by writing the data to the selected data arrays.
    Type: Application
    Filed: February 26, 2007
    Publication date: August 28, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jacob Lee Sheppard, Robert Akira Kubo, Kurt Allen Lovrien
  • Patent number: 7418525
    Abstract: Local drive presence is provided for local and remote drives by maintaining a plurality of uninterrupted protocol connections between a plurality of I/O controllers and a plurality of device interfaces through which peripheral bus commands are transmitted. Preferably, the I/O controllers are each housed in a separate server blade and provide each blade with access to the local and remote drives. At each of the device interfaces, rather than attaching an actual storage device, peripheral bus commands received at the device interfaces are serialized and conditionally passed or suppressed to and from the shared drive which is shared amongst the plurality of uninterrupted protocol connections. Preferably, the plurality of uninterrupted protocol connections is maintained such that the shared drives can be simultaneously shared. In one embodiment, the local drives are provided in a media tray which is shared amongst a plurality blades.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: August 26, 2008
    Assignee: International Business Machines Corporation
    Inventors: James William Dalton, Eric Richard Kern
  • Publication number: 20080201600
    Abstract: A data protection method of a storage device is provided. In the method, a system management interrupt program orders a hardware control unit to obtain a type and an address message of an error in a block in a first storage device, and stores the type and address message in a second storage device. An interrupt service routine (ISR) reads the type and address message of the error from the second storage device. The ISR orders an operating system to search for a block that may be accessed normally and not damaged in the first storage device, and sets the block as a reserved block. The ISR transmits the address message of the error to the OS, such that the OS copies the data in the block having the error to the reserved block, thereby increasing the available capacity of the storage device and improving the reliability of the computer.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 21, 2008
    Applicant: INVENTEC CORPORATION
    Inventor: Ying-Chih Lu
  • Patent number: 7409588
    Abstract: A server to be changed is added to a destination unit in terms of configuration. The server to be changed is started to restore the database in the database storage region to which the server has access and to restore the transaction for the process that was executed when the server failed. The destination of the failed server (a system destination unit) when failure occurs is determined to stabilize the throughput of the entire system after the switchover of the system in the event of failure. The destination server is determined according to an instruction given in advance by the user. The database management system statistically determines the destination server in accordance with a policy designated by the user. Alternatively, the database management system dynamically determines the destination server according to the policy designated by the user when failure occurs.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: August 5, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Katsushi Yako, Norihiro Hara, Tooru Kawashima, Masami Hikawa
  • Patent number: 7409539
    Abstract: The present invention relates to boot code processing of a computer system, and in particular to a method and respective system for managing boot code of a computer system, wherein the system comprises at least a first and a redundant second boot memory portion, and wherein the system is booted from one of said portions, referred to as the active booting portion, the other boot portion being in a stand-by mode and being referred to as inactive boot portion.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: August 5, 2008
    Assignee: International Business Machines Corporation
    Inventors: Andreas Arnez, Joern Engel, Frank Haverkamp
  • Publication number: 20080184057
    Abstract: Systems, methods and apparatus are disclosed for employing redundant arrays to configure non-volatile memory. The present invention may include a substrate including a plurality of memory arrays, wherein the memory arrays include a data array and at least three redundant configuration arrays. The configuration arrays may each be adapted to be programmed with identical configuration information associated with operation of the data array. Majority voting logic with an output coupled to configuration inputs of the data array and inputs coupled to each of the redundant configuration arrays may be employed. The majority voting logic may be adapted to determine a configuration for the data array based upon an outcome of a majority vote function applied to the configuration information stored in the configuration arrays. Numerous other aspects are disclosed.
    Type: Application
    Filed: January 31, 2007
    Publication date: July 31, 2008
    Inventors: Tyler Thorp, Brent Haukness
  • Publication number: 20080178035
    Abstract: Methods, systems, and program products are provided for failback to a primary communications adapter. Embodiments of the present invention include receiving, in a driver for a primary communications adapter and a backup communications adapter, a link up event for the primary communications adapter; inferring that the primary communications adapter is capable of receiving packets; setting the backup communications adapter to idle; and activating the primary communications adapter. In typical embodiments, the primary communications adapter includes a plurality of linked communications adapters comprising an EtherChannel pseudo-adapter.
    Type: Application
    Filed: March 31, 2008
    Publication date: July 24, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vinit Jain, Jorge Rafael Nogueras
  • Patent number: 7403957
    Abstract: In an image forming apparatus for forming an image in accordance with control codes stored in a plurality of memory media, when the control codes stored in the plurality of memory media to control the image forming apparatus is rewritten, rewrite execution codes adapted to execute rewrite of the control codes are transferred to predetermined one of the plurality of memory media from an external apparatus, and rewrite of the control codes is performed in accordance with the transferred rewrite execution codes.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: July 22, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideyuki Ikegami, Tokuharu Kaneko, Shokyo Koh, Tsuyoshi Muto
  • Patent number: 7401248
    Abstract: A method for deciding a destination server among a plurality of servers to which applications are migrated upon occurrence of a failure on one of the servers is provided. The method includes the steps of obtaining required performance information of each of the applications when each of the plurality of servers is normally operating, obtaining furnishing performance information of each of the plurality of servers in operation, specifying at least one of the servers having a composition capable of running the applications migrated upon occurrence of a failure on one of the servers, comparing the required performance information and the furnishing performance information, and specifying one of the servers that has an application execution performance closest to an application execution performance on the server having the failure, and that meets a specified availability.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: July 15, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Nakahara, Kunihisa Nitta
  • Patent number: 7398191
    Abstract: One embodiment of the present invention provides a system that computes a distance metric between computer system workloads. During operation, the system receives a dataset containing metrics that have been collected for a number of workloads of interest. Next, the system uses splines to define bases for a regression model which uses a performance indicator y as a response and uses the metrics (represented by a vector x) as predictors. The system then fits the regression model to the dataset using a penalized least squares (PLS) criterion to obtain functions f1, . . . , fP, which are smooth univariate functions of individual metrics that add up to the regression function f, such that y=f(x)+?= ? i = 1 P ? f i ? ( x i ) + ? , wherein ? represents noise. Finally, the system uses the fitted regression function to define the distance metric.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: July 8, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Ilya Gluhovsky, Jan L. Bonebakker
  • Patent number: 7398529
    Abstract: A computerized method for managing objects created in a directory service of a distributed computing environment, including a component for backing up and restoring a single or plurality of directory service objects, a component for delegating security privileges to permit access to directory service objects, a component for retrieving data in policy storage format and representing the data in human-readable form, a component having a graphical user interface including a display capable of searching and reporting policy storage data in human readable form, a component capable of replicating a single or plurality of directory service objects across the domain tree boundaries of the directory service, a component for analyzing the effect a particular setting will have on a particular target represented as a directory service object before the setting is added to the directory service.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: July 8, 2008
    Assignee: NetIQ Corporation
    Inventors: Senthil Prabakaran, Vladimir Kazachkov, Dilip Radhakrishnan
  • Patent number: 7398181
    Abstract: An aspect of the present invention is a method for retrieving reliability data in a system. The method includes coupling a device to the system, collecting the reliability data with the device and retrieving the reliability data from the device.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: July 8, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: David A. Moore
  • Publication number: 20080155301
    Abstract: The specification and drawings present a new method, apparatus and software product for performance enhancement of a memory device (e.g., a memory card) using a pre-erase mechanism. The memory device can be, e.g., a memory card, a multimedia card or a secure digital card, etc. A new command or commands can be used to inform a memory device controller when the data in one particular sector, allocation unit or block can be deleted. Using that information the memory device controller then can be able to do some internal maintenance, e.g., by moving valid data from a fragmented erase block to another so that the fragmented erase block can be cleared and erased for future use as well as performing effective wear levelling maintenance and write performance optimization.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventors: Marko T. Ahvenainen, Kimmo Mylly, Jani Hyvonen
  • Publication number: 20080155300
    Abstract: The present invention discloses a method of updating a dual redundant chassis management system, and the method is applied in a server. If the server obtains a change message, it creates a virtual channel between an active chassis management system and a standby chassis management system, so that the active chassis management system can be updated according to the change message, and the change message can be sent to the standby chassis management system through the virtual channel. After the active chassis management system and the standby chassis management system are updated, the virtual channel is closed to provide sufficiency transmission bandwidth and stability for data transmissions, when the server synchronously updates the active chassis management system and the standby chassis management system.
    Type: Application
    Filed: December 21, 2006
    Publication date: June 26, 2008
    Applicant: INVENTEC CORPORATION
    Inventor: Chih-Ching Yang
  • Publication number: 20080148180
    Abstract: A strategy is described for detecting anomalies in the operation of a data processing environment. The strategy relies on parameter information to detect the anomalies in a detection operation, the parameter information being derived in a training operation. The parameter information is selected such that the detection of anomalies is governed by both a desired degree of sensitivity (determining how inclusive the detection operation is in defining anomalies) and responsiveness (determining how quickly the detection operation reports the anomalies). The detection operation includes specific algorithms for determining undesired trending and spiking in the performance data.
    Type: Application
    Filed: December 14, 2006
    Publication date: June 19, 2008
    Applicant: Microsoft Corporation
    Inventors: Yaodong Liu, Cary L. Mitchell, John Dunagan, Dana K. Fujimoto
  • Patent number: 7389216
    Abstract: A system and method for testing the reliability of a target module is presented. A reliability testing module executes a testing script by directing the target module to perform various functions, and by further consuming system resources by executing test applications. The behaviors of the target module are recorded and evaluated, and a reliability score is generated for the target module. The reliability score enables a user to compare the reliability of a first target module to that of a second.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: June 17, 2008
    Assignee: Microsoft Corporation
    Inventors: Gershon Parent, Shanon Isaac Drone, Troy David Barnes
  • Patent number: 7386751
    Abstract: A generic service management system is disclosed. The generic service management system comprises a registration scheme; a search-and-execution scheme; and a detection-and-replacement scheme, used for detecting and replacing the invalid service provider, such as a semiconductor equipment manager. The present invention provides a GEV (Generic Evaluator) having the capabilities of error-detecting and data backup, and further combines Jini infrastructure and the programming technology of design by contract. The GEV archives the credit values of all the service providers for letting a client (such as a factory manager) to select a service provider having a higher credit value.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: June 10, 2008
    Assignee: National Cheng Kung University
    Inventors: Fan-Tien Cheng, Haw-Ching Yang, Chia-Ying Tsai
  • Patent number: 7386551
    Abstract: An apparatus for and method of utilizing an internet terminal coupled to the world wide web to access an existing proprietary data base management system having a dialog-based request format. The user request is received by a web server from the world wide web and converted into one or more sequenced data base management commands. These data base management commands are sequentially presented to the data base management system and the intermediate products stored. After all of the sequenced data base management commands have been executed, the web server combines the intermediate products to form a complete response to the initial user request. The response is transferred to the user over the world wide web. However, should the data base management system be unavailable to honor the service request of a user, an unavailability message is transferred from the data base management system indicating the unavailability.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: June 10, 2008
    Assignee: Unisys Corporation
    Inventor: Niels Gebauer
  • Publication number: 20080115007
    Abstract: An original data stream is encoded into a high priority data stream and a low priority data stream. The high priority data stream is encoded so as to permit decoding of the high priority data steam independently of the low priority data stream. The high priority data stream is transmitted twice, while the low priority data claim 25. is transmitted in two portions, but only once. If both the first portion and the second portion of the low priority data stream are received, and at least one complete transmission of the high priority data stream is received, then the two data streams are combined to produce a signal output of high quality. However, if any portions of the low priority data stream is lost then the low priority data stream is not used, and only the high priority data stream is used to produce output. Overall throughput is greater than would be achieved if the original data stream were transmitted with complete redundancy.
    Type: Application
    Filed: November 9, 2007
    Publication date: May 15, 2008
    Applicant: QUALCOMM INCORPORATED
    Inventor: Ahmad Jalali
  • Patent number: 7370239
    Abstract: A process control system includes a plurality of input/output (I/O) devices and a controller in communication using a bus. Each I/O device has an interface for communicatively linking the I/O device with the bus, and includes a device processor which, upon detection of a potential I/O device fault, severs the communication link provided by the interface with the bus to thereby remove the I/O device from the bus and to prevent the I/O device from keeping other I/O devices on the bus from communicating over the bus.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: May 6, 2008
    Assignee: Fisher-Rosemount Systems, Inc.
    Inventors: Michael D. Apel, Steve Dienstbier
  • Patent number: 7369969
    Abstract: A holding device for a sensor signal comprises a signal input receiving a sensor signal, a signal output and a storage device coupled to the signal input and output. The storage device is designed to store a signal value in a first state and to update it based on the sensor signal in a second state. The storage device stores the signal value for a time period which is greater than a first predetermined time duration, independently of a supply voltage of the storage device. The holding device outputs the signal value present in the storage device. The holding device furthermore comprises a monitoring device, which is effectively coupled to the storage device and determines whether the sensor signal present at the signal input is valid. The monitoring device ensures that the storage device is in the second state only when the monitoring device identifies that the sensor signal is valid.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 6, 2008
    Assignee: Infineon Technologies AG
    Inventor: Wolfgang Scherr
  • Publication number: 20080095043
    Abstract: A computer platform management unit operating mode arbitration method and system is proposed, which is designed for use with a computer platform having multiple management units, such as a blade server, and which is characterized by the utilization of a network interface for message exchanges between the management units, and the utilization of a random timer to set a waiting time length for local management unit to wait for a response from neighboring management unit that tells whether its current operating mode is active mode or standby mode. If no response is received, the local management unit is set to active mode; otherwise, it is set to an operating mode other than the current operating mode of the neighboring management unit. This feature allows the mechanism of operating mode arbitration on the blade server to be more simplified such that the implementation thereof is more cost-effective.
    Type: Application
    Filed: October 24, 2006
    Publication date: April 24, 2008
    Applicant: Inventec Corporation
    Inventor: Chun-Liang Lee
  • Patent number: 7360110
    Abstract: In one embodiment, a method is contemplated. A first parameterization is generated, which describes a desired result in at least a first dimension of a plurality of dimensions of a protection system. The first parameterization is evaluated over a plurality of parameterizations. Each of the plurality of parameterizations corresponds to a respective one of a plurality of instances of a second dimension of the plurality of dimensions. A computer readable medium comprising instructions that implement the method and a system implementing the method are also contemplated.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: April 15, 2008
    Assignee: Symantec Operating Corporation
    Inventors: Shelley A. Schmokel, Steven Kappel, Guido Westenberg, Branka Rakic, Peter A. Barber, Julianne M. Urban, Linda Cerni
  • Patent number: 7359833
    Abstract: An information processing system comprises a fault storage area which stores fault data relating to specific faults, an information issuing portion which issues information, an intermediate information processing portion, and an information filter portion. The intermediate information processing portion receives and outputs information issued by the information issuing portion, and upon receiving an anomaly in response to output of information, prior to notifying the information issuing portion of the anomaly, re-outputs the output information at least once, but if an anomaly is received even after re-output at least once, notifies the information issuing portion of the anomaly.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: April 15, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Yoshitaka Aoki, Kenichi Soejima
  • Patent number: 7356424
    Abstract: The present invention is directed to a diagnostic compiler for use with a pipeline analog-to-digital converter (ADC) having code sequences corresponding to stages thereof. In one embodiment, the diagnostic compiler includes a transition locator configured to determine transition locations for the code sequences. The diagnostic compiler also includes a characteristics indicator coupled to the transition locator and configured to provide at least one characteristic of the ADC based on the transition locations.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: April 8, 2008
    Assignee: Texas Instruments Incorporated
    Inventor: Patrick T. Bohan
  • Patent number: 7352621
    Abstract: A method and apparatus is described herein for managing bad blocks/sectors in a nonvolatile memory. Upon detecting an input/output fault to a target block in a nonvolatile memory, the target block is remapped to a spare block, if the block is predicted as a bad block. Remapping is done for blocks used to store code both in serial execution code sequences and code sequences utilizing address translation. The remapping of bad blocks/sectors in nonvolatile memory allows nonvolatile memory in computer systems to be robust and resilient in handling bad blocks.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: April 1, 2008
    Assignee: Intel Corporation
    Inventors: Michael A. Rothman, Vincent J. Zimmer
  • Patent number: 7353306
    Abstract: A bi-directional reflective memory channel between a pair of storage controllers is used to maintain a mirrored copy of each storage controller's native buffer contents within the buffer of the other storage controller. To maintain such mirrored copies, buffer write operations that fall within a reflective memory segment of one storage controller are automatically reflected across this channel to the other storage controller for execution, and vice versa. The write operations are preferably transmitted across the reflective memory channel using a protocol that provides for error checking, acknowledgements, and retransmissions. This protocol is preferably implemented entirely in automated circuitry, so that the mirrored copies are maintained without any CPU intervention during error-free operation. When a failover occurs, the surviving storage controller uses the mirrored copy of the failed storage controller's native buffer contents to assume control over the failed storage controller's disk drives.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: April 1, 2008
    Assignee: iStor Networks, Inc.
    Inventors: Roger T. Thorpe, Erasmo Brenes, Stephen O'Neil, Alec Shen
  • Patent number: 7350012
    Abstract: A configurable switching fabric port is disclosed having, in a particular configuration. A first interface that employs port interface resources and leaves at least one interface resource dormant and a second interface utilizing the dormant resource. One particular fault non-tolerant architecture, the RapidIO System, is specifically addressed. One implementation of this system incorporates transmission and reception ports configurable as 16 and 8 bit interfaces. In the 8-bit configuration, an 8-bit interface incorporates the least significant 8-bits of signal resources. Further, in the reduced, or 8-bit configuration, the most significant port interface resources of the 16 bit port are surplus.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: March 25, 2008
    Assignee: Tundra Semiconductor Corporation
    Inventors: Victor Menasce, Stephane Gagnon
  • Patent number: 7350090
    Abstract: An information handling system having a plurality of blade server modules (BSMs) and power supply units (PSUs) uses a module monitor board (MMB) to monitor and control a power budget of the PSUs by each individual BSM requesting authorization from the MMB in order to power ON and boot-up. A blade management controller (BMC) may communicate with the MMB over a communications bus. However, if the firmware application controlling the BMC has been corrupted the BMC it may run in a “boot block” mode and not contain the intelligence necessary to obtain power ON authorization from the MMB. A single, existing input-output (I/O) line from the MMB to the BMC may be utilized to indicate power ON authorization for the respective BSM. The MMB and BMC may be adapted for preventing the BSM from powering ON without proper authorization from the MMB and that the BMC will always power ON the BSM when enough power is available from the PSU.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: March 25, 2008
    Assignee: Dell Products L.P.
    Inventors: Phil Baurer, Bryan Krueger
  • Patent number: 7349479
    Abstract: Five electronic control units (ECU) control vehicle devices using CAN protocol. Each of ECUs is provided with a resistor and a switch for activating the resistor. A first and fifth ECUs are arranged on the leftmost and rightmost ends. Resistors of the first and fifth ECUs are used as terminating resistors to a two-wire communications line. When the two-wire communications line is broken, the first ECU sends a test signal while other ECUs excluding the fifth ECU turn on the switches from right to left. When the test signal can be received, a broken point is located on the right side of ECU that turns on its switch at this time. Thereafter ECUs on the left side of the broken point conduct communication.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: March 25, 2008
    Assignee: Denso Corporation
    Inventors: Takeshi Suganuma, Yoshimitsu Fujii
  • Patent number: 7342874
    Abstract: Failover protection is provided on the same facilities for a network connection passing through a high-availability router having shared resources managed by two control processors that respectively maintain a forwarding information bases (FIB). The two processors run asynchronously in a master/standby relationship. Integrity of processes running on the control processors is monitored and a forwarding engine forwards packets according to a FIB maintained by an in-service one of the control processors. If one of the control processors fails, the other control processor uses the same bandwidth on the same facility to continue forwarding packets for a network connection. Identifiers in each packet associated with the network connection are used to indicate the reserved bandwidth associated with the network connection.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: March 11, 2008
    Assignee: Nortel Networks Limited
    Inventors: Scott S. Pegrum, Matthew M. Yuen, Nabila Ould-Brahim, Gregory A. Wilbur