State Error (i.e., Content Of Instruction, Data, Or Message) Patents (Class 714/49)
  • Publication number: 20130080843
    Abstract: In particular embodiments, a method includes analyzing a binary decision diagram (BDD) representing a data stream from a sensor to determine a compression rate of the BDD and indicating a sensor malfunction in the sensor if the compression rate of the BDD deviates from a specified compression rate range.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 28, 2013
    Applicant: Fujitsu Limited
    Inventors: Stergios Stergiou, Jawahar Jain, Tsuneo Nakata
  • Publication number: 20130073914
    Abstract: Storage management systems and methods are presented. In one embodiment, a method comprises: performing a hierarchical configuration information process, including accessing information regarding hierarchical relationships of components associated with a storage environment; performing a storage resource consumption detection process, including detecting consumption of storage resources included in the storage environment; and performing a coordinated consumption analysis process in which at least part of an analysis of the consumption of the storage resources is coordinated across multiple levels of an active spindle hierarchy. In one embodiment, a reaction process is performed. The reaction process can include performing an automated consumption notification process and an automated reclamation process based upon results of the storage resource consumption detection process.
    Type: Application
    Filed: March 14, 2012
    Publication date: March 21, 2013
    Applicant: Symantec Corporation
    Inventors: Vidyut Kaul, Subhadeep De, Venkeepuram Satish
  • Patent number: 8402323
    Abstract: A disk controller comprising a disk formatter configured to receive data being transferred between a disk and a host. A buffer controller is in communication with the disk formatter, a buffer configured to store the data being transferred between the disk and the host, and the host. The buffer is external to each of the disk controller and the host. The buffer controller is configured to regulate transfer of the data between the buffer and the disk formatter. An error correction module is in communication with the disk formatter and the buffer controller. The error correction module is configured to generate an error correction mask to correct errors in the data. The error correction mask is applied to the data prior to the buffer controller transferring the data to the buffer.
    Type: Grant
    Filed: February 20, 2012
    Date of Patent: March 19, 2013
    Assignee: Marvell International Ltd.
    Inventors: Yujun Si, Theodore Curt White, Stanley Ka Fai Cheong
  • Patent number: 8386869
    Abstract: A defect portion in a signal is processed by receiving an input signal. A location of a defect portion within the input signal and an amplitude of the defect portion is determined. An adjusted signal is generated by adjusting the amplitude of the defect portion using the determined location of the defect portion and the determined amplitude of the defect portion. Information associated with the adjusted signal is decoded.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: February 26, 2013
    Assignee: Link—A—Media Devices Corporation
    Inventors: Yu Kou, Zheng Wu
  • Patent number: 8381037
    Abstract: A method, an apparatus, and a computer program product in a data processing system are presented for using hardware assistance for gathering performance information that significantly reduces the overhead in gathering such information. Performance indicators are associated with instructions or memory locations, and processing of the performance indicators enables counting of events associated with execution of those instructions or events associated with accesses to those memory locations. The performance information that has been dynamically gathered from the assisting hardware is available to the software application during runtime in order to autonomically affect the behavior of the software application, particularly to enhance its performance. For example, the counted events may be used to autonomically control an execution-path selection within the software application.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: February 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Jimmie Earl DeWitt, Jr., Frank Eliot Levine, Christopher Michael Richardson, Robert John Urquhart
  • Patent number: 8381036
    Abstract: Embodiments relate to systems and methods for storing machine state history related to detected faults in a package update process. A classification tool can interface with a data store that can store machine state data on a client. The classification tool can record an initial machine state on the client and initiate a package update on the client. The classification tool can further record an updated machine state of the client subsequent to initiating the package update and detect a fault condition in the client subsequent to initiating the package update. The classification tool can examine the initial machine state and the updated machine state to categorize one or more causes of the fault condition as either related to the package update or to systemic conditions of the client. The classification tool can further notify a user of the client of the one or more causes of the fault condition.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: February 19, 2013
    Assignee: Red Hat, Inc.
    Inventors: Seth Kelby Vidal, James Antill
  • Patent number: 8375256
    Abstract: A method and a system is provided for the processing of data or signals with a number of functional units which are each adapted to apply one or several functions to the data or signals, and which are connected with each other via a connection matrix for the exchange of data or signals between the functional units. At least one functional unit of the system is programmable and/or configurable such that it performs a particular function out of a number of different functions. The connection matrix is programmed and/or configured such that the functional units are connected with each other in a particular configuration out of a number of different configurations.
    Type: Grant
    Filed: May 18, 2009
    Date of Patent: February 12, 2013
    Assignee: Infineon Technologies AG
    Inventors: Wilhard von Wendorff, Detlev Leisengang
  • Patent number: 8370689
    Abstract: A method and system for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a portion of a file and a checksum representing data within the memory block at a first time. Based at least in part on determining that the memory block is mapped to the same portion of the same file at a second time, it is indicated that the checksum represents expected data within the memory block. A system for verifying memory device integrity is also disclosed.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: February 5, 2013
    Assignee: UTC Fire & Security Americas Corporation, Inc.
    Inventors: Timothy Steven Potter, Donald Becker, Bruce Montgomery, Jr., Dave Dopson
  • Patent number: 8359497
    Abstract: A method, computer program product, and system determining the cause of serialization failures is described. A method may comprise, if a first object that has been serialized with all references to member fields by the first object removed passes deserialization, restoring, via at least one of a client electronic device and a server computer, a first reference to a first member field by the first object. The method may further comprise serializing, via at least one of the client electronic device and the server computer, the first object with the restored first reference to the first member field. The method may also comprise, if the serialized first object with the restored first reference to the first member field fails deserialization, determining, via at least one of the client electronic device and the server computer, that the first reference to the first member field by the first object causes the failure.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: January 22, 2013
    Assignee: International Business Machines Corporation
    Inventors: Matthew James Ponsford, Richard Bremner, Kenneth Sabir
  • Patent number: 8359481
    Abstract: A coprocessor includes a calculation unit for executing at least one command, and a securization device. The securization device includes an error detection circuit for monitoring the execution of the command so as to detect any execution error, putting the coprocessor into an error mode by default as soon as the execution of the command begins, and lifting the error mode at the end of the execution of the command if no error has been detected, an event detection circuit for monitoring the appearance of at least one event to be detected, and a masking circuit for masking the error mode while the event to be detected does not happen, and declaring the error mode to the outside of the coprocessor if the event to be detected happens while the coprocessor is in the error mode. Application in particular but not exclusively to coprocessors embedded in integrated circuits for smart cards.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: January 22, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Frederic Bancel, Nicolas Berard
  • Patent number: 8356304
    Abstract: Logical processors/hardware contexts are assigned to different jobs/threads in a multithreaded/multicore environment. There are provided a number of different sorting algorithms, from which one is periodically selected on the basis of whether the present algorithm is giving satisfactory results or not. The period is preferably a super-context interval. The different sorting algorithms preferably include a software/OS priority. A second sorting algorithm may include sorting according to hardware performance measurements. The judgement of satisfactory performance is preferably based on the difference between a desired number of time quantum attributed per super-context switch interval to each job/thread and a real number of time quantum attributed per super-context switch interval to each job/thread.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: January 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ali El-Moursy, Hisham El-Shishiny
  • Patent number: 8352803
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving, at a policy and charging rules node (PCRN), a request from a requesting node for an establishment of a first service data flow (SDF); generating a first rule set for implementing the first SDF in response to the request; transmitting a first rule of the rule set to a first node for installation of the first rule; waiting for a period of time for a response from the first node; determining from the response whether installation of the first rule at the first node failed or succeeded; and if installation of the first rule succeeded, transmitting a second rule of the first rule set to a second node for installation of the second rule.
    Type: Grant
    Filed: June 7, 2010
    Date of Patent: January 8, 2013
    Assignee: Alcatel Lucent
    Inventors: Ajay Kirit Pandya, Robert Alexander Mann, Mike Vihtari
  • Patent number: 8352804
    Abstract: The invention relates to systems for secure interrupt handling, a method for verifying a priority of a winning service request node and a method and an apparatus for verifying integrity of service requests. In accordance with an aspect of the invention, there is provided a method for verifying a priority of a winning service request node (SRN) established in an arbitration between a plurality of service request nodes (SRNs) performed by an interrupt controller, the method comprising: storing the priority of the winning SRN in the interrupt controller; encoding the priority of the winning SRN, wherein the encoding allows for error detection; transmitting the encoded priority from the winning SRN to the interrupt controller; and verifying the priority of the winning SRN by comparing the encoded priority transmitted by the winning SRN with the priority of the winning SRN established in the arbitration and stored in the interrupt controller.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: January 8, 2013
    Assignee: Infineon Technologies AG
    Inventors: Frank Hellwig, Antonio Vilela
  • Publication number: 20130007537
    Abstract: An information processing apparatus is capable of automatically determining whether an operation log needs to be written to an external device when the external device is connected to the information processing apparatus and saving the operation log into the external device when necessary. A determination is made as to whether or not content for retrieving an operation log is present in an external device upon detection of connection of the external device. The operation log is retrieved from a holding unit if a result of the determination shows that the user interface control unit is in an error condition. The retrieved operation log is saved into a storage unit of the external device.
    Type: Application
    Filed: June 22, 2012
    Publication date: January 3, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Shinichi KANEMATSU
  • Patent number: 8346992
    Abstract: According to some embodiments, a message generated by a downstream device is received at upstream device. The message may, for example, be received via a peripheral interface and may not require a response. It may then be determined that an error is associated with the message, and an alert message may be sent from the upstream device to the downstream device via the peripheral interface.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: January 1, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Ajai K. Singh, David Puffer
  • Patent number: 8341463
    Abstract: A system management procedure combines operations for performing operation management in a computer system, the system management knowledge capable of specifying a post-status of each constituent element of the computer system, the post-status being expected as a result that the operations are executed in accordance with the system management procedure, are previously stored in databases. Then, it is judged that a failure occurs, when an actual state of the computer system as a result that the operations are executed based on the system management procedure, is inconsistent with the expected post-status. When the failure occurred, a revising method capable of making the actual state of the computer system as the result that the operations are executed in the system management procedure, to be consistent with the expected post-status, is derived to be proposed.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: December 25, 2012
    Assignee: Fujitsu Limited
    Inventor: Shinji Kikuchi
  • Publication number: 20120324279
    Abstract: The present disclosure provides a method and apparatus for backing up a subversion repository. In one embodiment, a method of backing up a subversion repository wherein a version attribute of a backup repository is preset and identifies a latest version of the backup repository, the method comprises: synchronizing the backup repository based on the version attribute of the backup repository; in an event of successful synchronization, updating the version attribute of the backup repository with an identification of a synchronized version; and in an event of unsuccessful synchronization, determining that a current version to be a non-synchronizable version, backing up an original repository by duplicating a copy of the original repository, and updating the version attribute of the backup repository with an identifier of the non-synchronizable version.
    Type: Application
    Filed: November 30, 2010
    Publication date: December 20, 2012
    Applicant: ALIBABA GROUP HOLDING LIMITED
    Inventor: Jing Zhang
  • Publication number: 20120324297
    Abstract: Various exemplary embodiments relate to a method and related network node including one or more of the following: receiving, at a policy and charging rules node (PCRN), a request from a requesting node for an establishment of a first service data flow (SDF); generating a first rule set for implementing the first SDF in response to the request; transmitting a first rule of the rule set to a first node for installation of the first rule; waiting for a period of time for a response from the first node; determining from the response whether installation of the first rule at the first node failed or succeeded; and if installation of the first rule succeeded, transmitting a second rule of the first rule set to a second node for installation of the second rule.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: Alcatel-Lucent Canada, Inc.
    Inventors: Ajay Kirit Pandya, Robert Alexander Mann, Mike Vihtari
  • Publication number: 20120308009
    Abstract: Disclosed are methods and apparatus for detecting mismatch of ciphering parameters, such as Count-C, in a wireless device and recovery therefrom. The methods and apparatus for detection include examining a predefined ciphered field, such as a Length Indicator field, in one or more received Radio Link Control (RLC) Protocol Data Units (PDUs). Next, a determination of when the field is invalid over a predetermined sample number of PDUs is performed. Mismatch of ciphering parameters can then be determined when a predetermined number of samples of the field detected as invalid exceed a predetermined threshold. Additionally, recovery of PDUs after mismatch detections is disclosed using a range of Hyper-Frame Numbers (HFNs) to decipher buffered PDUs, and then check which of the HFNs eliminate the parameter mismatch by again determining if parameter mismatch occurs using the methods and apparatus for detection.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 6, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Ajay K. Venkatsuresh, Suresh Sanka
  • Patent number: 8327190
    Abstract: A candidate-patch selecting apparatus includes a detector configured to detect a failure of a computer; an obtaining unit configured to obtain record information for the computer, recorded at the time when the failure detected by the detector occurred; an extractor configured to extract from the record information obtained by the obtaining unit, information identifying the failure; an identifying unit configured to identify, based on a database that stores therein patches and respective selection conditions, a patch for which selection conditions are satisfied by the extracted information identifying the failure; and an output unit configured to output an identification result acquired by the identifying unit.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 4, 2012
    Assignee: Fujitsu Limited
    Inventor: Tetsuya Shinboku
  • Patent number: 8327194
    Abstract: An embodiment of the invention pertains to an integrated circuit that includes at least one data processing circuit that is configured to generate error data. The integrated circuit further includes a nonvolatile memory, and also a controller circuit that is coupled to the at least one data processing circuit and the nonvolatile memory. The controller circuit is configured to detect the error data. The controller circuit automatically initiates a write operation to store the error data in the nonvolatile memory in response to detecting the error data.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: December 4, 2012
    Assignee: Xilinx, Inc.
    Inventor: Sabih Sabih
  • Publication number: 20120304024
    Abstract: A method of processing data in a data processor comprising at least two data processing units. The method comprises performing different data processing steps in the data processing units concurrently during a parallel operation, and replicating performances of selected identical data processing steps in the data processing units during a non-synchronised redundant operation. The non-synchronised redundant operation comprises an initial performance of the selected identical data processing steps in one of the data processing units and a replicate performance of the data processing steps starting later than the initial performance, preferably in another of the data processing units. Initial result data representative of results from the initial performance are registered, and compared with replicate result data representative of results from the replicate performance, and an error signal is produced in case of discrepancy.
    Type: Application
    Filed: February 16, 2010
    Publication date: November 29, 2012
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Michael Rohleder, Joachim Fader, Frank Lenke, Markus Baumeister
  • Publication number: 20120304023
    Abstract: A field device for determining a process parameter value, comprising a measurement device for determining a process parameter value; circuitry for determining the reliability of the process parameter value; and signaling circuitry for providing the process parameter value and an indication of the reliability of the process parameter value to a host system via a current loop. The signaling circuitry is configurable between a first state in which the indication of the reliability is provided as a digital signal and the process parameter value is provided as an analog DC-value, and a second state in which the indication of the reliability is provided as a predetermined analog DC-value. Hereby, the number of unplanned process interruptions may be reduced when the host system is capable of receiving digital signals.
    Type: Application
    Filed: May 26, 2011
    Publication date: November 29, 2012
    Inventor: Tomas Wennerberg
  • Patent number: 8321724
    Abstract: A device includes a taxonomy schema; a display link base; a calculation link base; an XBRL document memory unit which stores an instance; an error inference unit which compares a calculated value of an input value of the instance corresponding to an item element of the calculation value in accordance with the calculation link base with the input value of the instance corresponding to the calculated value based on the display link base, detects a discrepancy between the calculation value and the input value, specifies a calculation tree structure of the calculation link base including the item element in which the discrepancy is detected and a display tree structure of the display link base including the item element in which the discrepancy is detected, and infers that a state of too many or too few item elements is regarded as a discrepancy error in the case that such an item element is set only in either one of the trees and that the item element has an input that is consistent with an absolute value of the
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: November 27, 2012
    Assignee: Fujitsu Limited
    Inventor: Kazuya Tanahashi
  • Patent number: 8321877
    Abstract: An image processing apparatus capable of previously checking a setting mistake when a macro button is generated and preventing a macro using a reserved word from being inappropriately executed. A macro acquisition unit obtains the macro. A user information acquisition unit obtains user information associated with a user of the image processing apparatus. A replacing unit, when the macro obtained by the macro acquisition unit is a macro including a reserved word that is to be replaced with a portion of the user information, replaces the reserved word with the portion of the user information obtained by the user information acquisition unit. A check unit checks whether the macro replaced by the replacing unit can be normally executed. A notification unit notifies a check result of the check unit to a previously defined user.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: November 27, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hideo Asahara
  • Patent number: 8321867
    Abstract: A method and an apparatus to increase conformance of a storage implementation of a data set to a storage policy are presented. In one embodiment, the method includes performing a conformance check of a data set state and an associated data management policy. The method includes identifying a set of tasks that can be performed to increase conformance of the data set state to the associated policy, and generating a task list using tasks from the set of tasks. The method further includes outputting an indication of the task list to a user and accepting from the user an approval of the task list before generating and executing a second task list.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: November 27, 2012
    Assignee: Network Appliance, Inc.
    Inventors: James H. Holl, II, Peter Smoot, Sahn Lam, Anawat Chanhunthod, Hemanth Pannem
  • Publication number: 20120297242
    Abstract: An image processing apparatus includes an image processing unit configured to perform image processing, a storage unit configured to be capable of storing an application program installed in the image processing apparatus, a first determination unit configured to determine whether the application program had ever been installed in the image processing apparatus, and a control unit configured to selectively control the image processing unit to be operable and control the image processing unit not to operate according to the determination by the first determination unit if an error has occurred in the storage unit.
    Type: Application
    Filed: May 16, 2012
    Publication date: November 22, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Mamoru Osada
  • Publication number: 20120290883
    Abstract: A computer implemented method for automatically for determining errors in concurrent program using lock localization graphs for capturing few relevant lock/unlock statements and function calls required for reasoning about interference at a thread location at hand, responsive to first and second threads of a concurrent program, constructing generalized lock causality graphs and computing cycle signatures, and determining errors in the concurrent program responsive to computing an interference graph and data flow analysis.
    Type: Application
    Filed: November 11, 2011
    Publication date: November 15, 2012
    Applicant: NEC LABORATORIES AMERICA, INC.
    Inventor: Vineet Kahlon
  • Publication number: 20120290884
    Abstract: An information processing apparatus which includes at least two controllers and is capable of positively detecting a startup error. Memory devices are connected to the controllers, respectively. A CPU of each controller accesses the memory device connected to the other controller via a bus bridge, identifies a startup stage to which the startup process has proceeded during the start of the self-controller, writes the identified startup stage as startup information into the memory device connected to the other controller, and detects whether or not an abnormality occurs during the startup of the other controller with reference to the startup information written into the memory device connected to the self-controller.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 15, 2012
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Jun HAMAGUCHI
  • Publication number: 20120290882
    Abstract: A system is configured to monitor a received signal. In response to detecting a fault condition associated with the received signal, the system sets a fault status indicator to indicate occurrence of the detected fault condition. The system sets a state of the fault status indicator for at least a predetermined amount of time to indicate occurrence of the detected fault condition. Subsequent to setting the fault status indicator for at least the predetermined amount of time to indicate the occurrence of the detected fault condition, the system monitors integrity of the signal again. After the predetermined amount of time, in response to detecting that there is no longer a fault associated with the monitored signal, the system modifies the fault status indicator to indicate absence of the fault condition.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 15, 2012
    Inventor: David L. Corkum
  • Publication number: 20120284570
    Abstract: At an instruction pipeline of a data processor, pipeline resource conflicts are detected by setting, for each executing instruction, one or more assignment indicators to indicate which pipeline resources are to be utilized for executing the instruction. The instruction pipeline detects a pipeline resource conflict if an instruction is assigned a pipeline resource for which the assignment indicator is set. In addition, for selected pipeline resources, such as registers in a register file, the instruction pipeline can detect a pipeline resource conflict if more than one instruction attempts to access the pipeline resource when the assignment indicator for the resource is set. In response to detecting a pipeline resource conflict, the instruction pipeline is flushed and returned to a checkpointed state, thereby protecting the instruction pipeline from architectural state errors.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 8, 2012
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventor: Syed Zohaib M. Gilani
  • Publication number: 20120284571
    Abstract: The present invention extends to methods, systems, and computer program products for monitoring the health of distributed systems. Embodiments of the invention provide distributed, self-maintained, continuous health monitoring. Using XML and pluggable infrastructure, a logical view of an appliance can be provided. The logical view abstracts physical implementation details of the appliance. Monitoring agents can correlate different distributed system failures and events and reason over collected health information.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 8, 2012
    Applicant: Microsoft Corporation
    Inventors: Igor Stanko, Matthew K. Peebles, Namyong Lee, Artem D. Yegorov
  • Patent number: 8301180
    Abstract: A portable electronic device is provided. The portable device comprises a wireless transceiver to receive and transmit messages and a messaging client. The messaging client receives a first message from the wireless transceiver, wherein the first message is from a first peer messaging client, parses the first message to read a first message sequence count, compares the first message sequence count to a first expected message sequence count, and based on a miscompare of the first message sequence count with the first expected message sequence count transmits a corrective message to the wireless transceiver for transmitting to the first peer messaging client.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: October 30, 2012
    Assignee: Sprint Communications Company L.P.
    Inventors: Michael A. Gailloux, Kenneth W. Samson
  • Patent number: 8291269
    Abstract: Embodiments of the invention relate to memory management methods and systems for object-oriented databases (OODB). In an embodiment, a database includes a plurality of memory-mapped file segments stored on at least one nonvolatile memory medium and not in main memory. An application program connects to the database with a plurality of writing processes to simultaneously write to an in-memory database, each writing process updating its own disk-based logfile, such that the effective disk writing speed is substantially increased and lock conflicts reduced.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: October 16, 2012
    Assignee: Advent Software, Inc.
    Inventors: Kwang T. Ro, Brian L. Andersen, Stephen K. McGrogan
  • Patent number: 8286027
    Abstract: An I/O device includes a host interface that may receive and process transaction packets sent by a number of processing units, with each processing unit corresponding to a respective root complex. The host interface includes an error handling unit having error logic implemented in hardware that may determine, as each packet is received, whether each transaction packet has an error and to store information corresponding to any detected errors. The error handling unit may include an error processor that may be configured to execute error processing instructions to determine any error processing operations based upon the information. The error processor may also generate and send one or more instruction operations, each corresponding to a particular error processing operation. The error handling unit may also include an error processing unit that may execute the one or more instruction operations to perform the particular error processing operations.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: October 9, 2012
    Assignee: Oracle International Corporation
    Inventors: John E. Watkins, Elisa Rodrigues, Abbas Morshed
  • Patent number: 8280603
    Abstract: Systems and methods for determining aircraft brake pedal sensor failure are provided. A brake pedal sensor and/or a brake pedal may be “failed” if brake pedal sensor readings unlikely to be generated as a result of human input are detected. The method comprises acquiring brake pedal measurements from a brake pedal sensor, determining a state of the brake pedal sensor, and providing a notification of the state. Each brake pedal measurement comprises a brake pedal deflection amount. The brake pedal sensor test algorithm may be conducted at regular intervals, in preparation for aircraft landing, at the request of a human operator, and the like.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: October 2, 2012
    Assignee: Goodrich Corporation
    Inventor: Eric D. Cahill
  • Patent number: 8281189
    Abstract: A method of correcting corrupted primitives transmitted between a serial advanced technology attachment (SATA) host and a SATA device includes analyzing a current state, a previously transmitted primitive, or a previously received primitive; selecting at least one candidate primitive according to at least one of the current state, the previously transmitted primitive and the previously received primitive; predicting the identity of a current primitive according to at least one candidate primitive and a received current primitive; and replacing the corrupted primitive with the predicted primitive when the predicted primitive is different from the current primitive.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: October 2, 2012
    Assignee: Mediatek Inc.
    Inventors: Chuan Liu, Pao-Ching Tseng
  • Publication number: 20120246524
    Abstract: In an encrypted wireless system, when a wireless node detects that it is having problems, it may be programmed to transmit one or more diagnostic messages without encryption, or with reduced encryption. The transmitted diagnostic messages may be received and interpreted by a technician troubleshooting the system. Once the technician troubleshoots and repairs the system, the affected wireless node may detect that it is operating normally, and may cease transmitting the unencrypted, or reduced-encryption, diagnostic messages. In most cases, the wireless system does not need any particular input to initiate the unencrypted, or reduced-encryption, diagnostic message transmissions.
    Type: Application
    Filed: March 25, 2011
    Publication date: September 27, 2012
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Robert J. Thomas, Patrick Gonia
  • Publication number: 20120239256
    Abstract: In an embodiment, a method of determining whether to trigger an event based on data blocks having status data includes electronically receiving the data blocks over a channel, performing a data integrity check on the data blocks to determine whether a particular data block has a transmission fault, calculating a received error metric based on performing the data integrity check, and disabling an event trigger if the received error metric crosses a first error threshold.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 20, 2012
    Applicant: Infineon Technologies AG
    Inventors: Dirk Hammerschmidt, Timo Dittfeld
  • Publication number: 20120239986
    Abstract: A script specifies a script action and an expected reaction in response to the script action. When one of the script actions is executed, a failure is detected indicating that the expected reaction did not occur. In response to the failure, a fallback action is executed.
    Type: Application
    Filed: March 14, 2011
    Publication date: September 20, 2012
    Inventors: Moshe Eran Kraus, Dror Schwartz, Ithai Levi, Amir Kessner
  • Publication number: 20120239987
    Abstract: Execution behavior for processes within a virtual machine is recorded for subsequent replay. The execution behavior comprises a detailed, low-level recording of state changes for processes within the virtual machine. The low-level recording is processed via replay to produce a sliced recording that conforms to time, abstraction, and security requirements for a specific replay scenario. Multiple stages of replay may be arbitrarily stacked to generate different crosscut versions of a common low-level recording.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 20, 2012
    Applicant: VMWARE, INC.
    Inventors: James Eugene CHOW, Tal GARFINKEL, Dominic LUCCHETTI
  • Publication number: 20120239988
    Abstract: The processing load caused by fault monitoring of software components is reduced. Provided is a computing unit (3) that includes an operating system (32) and that is connected with another computing unit via an information transmitting medium (2) in a mutually communicable manner, wherein availability management middleware (31) that is interposed between a software component and the operating system (32) and that launches the software component as a child process, thus serving as a parent process of the software component; the operating system (32) monitors a running status of the software component and reports abnormality information for the software component to the availability management middleware (31) in the case in which an abnormality is detected in the software component; and, upon acquiring the abnormality information, the availability management middleware (31) reports the abnormality information for the software component to the other computing unit.
    Type: Application
    Filed: January 4, 2011
    Publication date: September 20, 2012
    Inventor: Naoki Morimoto
  • Publication number: 20120233507
    Abstract: The described embodiments include a processor with a fault status register (FSR) that executes a Confirm instruction. In these embodiments, when executing the Confirm instruction, the processor receives a predicate vector that includes N elements. For a first set of bit positions in the FSR for which corresponding elements of the predicate vector are active, the processor determines if at least one of the first set of bit positions in the FSR holds a predetermined value. When at least one of the first set of bit positions in the FSR holds the predetermined value, the processor causes a fault in the processor.
    Type: Application
    Filed: May 23, 2012
    Publication date: September 13, 2012
    Applicant: APPLE INC.
    Inventor: Jeffry E. Gonion
  • Publication number: 20120233508
    Abstract: A method is provided for managing errors in a virtualized information handling system that includes an error detection system and a hypervisor allowing multiple virtual machines to run on the information handling system. The hypervisor may assign at least one memory region to each of multiple virtual machines. The error detection system may detect an error, determine a physical memory address associated with the error, and report that address to the hypervisor. Additionally, the hypervisor may determine whether the memory region assigned to each virtual machine includes the physical memory address associated with the error. The hypervisor may shut down each virtual machine for which a memory region assigned to that virtual machine includes the physical memory address associated with the error, and not shut down each virtual machine for which the memory regions assigned to that virtual machine do not include the physical memory address associated with the error.
    Type: Application
    Filed: May 24, 2012
    Publication date: September 13, 2012
    Applicant: DELL PRODUCTS L.P.
    Inventors: Mukund P. Khatri, Brent Alan Schroeder, Surender Brahmaroutu
  • Publication number: 20120233509
    Abstract: An information processing apparatus including a storage area separated into a user space and a kernel space executes, generating a core file of a process existing in the user space, retaining the process with the core file which starts being generated in the user space, and notifying a monitor unit of an identification number of the process with the core file which starts being generated, wherein the monitor unit detects a fault in the process by receiving the identification number allocated to the process.
    Type: Application
    Filed: May 29, 2012
    Publication date: September 13, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Takahiro KOJIMA
  • Patent number: 8264948
    Abstract: A plurality of system board modules are connected to a crossbar module. An error detection unit detects an error in a packet received from a corresponding system board module. When an error is detected by the error detection unit, a transmission control unit issues a completion data generation request. When receiving the completion data generation request, a packet completion unit generates completion data. When receiving an error packet, a selector circuit outputs a completion packet in which completion data is provided in place of a data unit involving error.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: September 11, 2012
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Murakami, Yoshihiro Kusano, Gou Sugizaki, Satoshi Nakagawa
  • Patent number: 8254169
    Abstract: A smart card is foamed of a memory having light-sensing cells to sense externally supplied light and generate a detection signal in response to the externally supplied light being sensed by the light-sensing cells, and a reset control circuit generating a reset signal in response to the detection signal, the reset signal operating to reset the smart card.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: August 28, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Min-Kyu Kim
  • Patent number: 8250413
    Abstract: In one embodiment a computing system comprises one or more processors, a display device coupled to the computing system, and a memory module communicatively connected to the one or more processors. The memory module comprises logic to receive, in a connection server, a service request from a user via a remote connection client; in response to the service request, instantiate a remote computing protocol in a computing resource, monitor a connection state between the remote connection client and the computing resource; and in response to a change in the connection state between the remote connection client and the computing resource, generate a connection state message, and transfer the connection state message to the remote connection client.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 21, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Byron A. Alcorn, Jeffrey Joel Walls
  • Patent number: 8245079
    Abstract: Problems in a network may be diagnosed based on alarm messages received from devices in the network and based on logical circuit path information of the network. In one implementation, a device may log alarm messages, in which each of the logged alarm messages may identify a network device that generated the alarm message and each of the alarm messages are associated with a time value. The device may group the alarm messages in the log of alarm messages based on the time values of the alarm messages to obtain one or more alarm message clusters and analyze the alarm message clusters to locate potential causes of the logged alarm messages.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: August 14, 2012
    Assignee: Verizon Patent and Licensing, Inc.
    Inventors: George L. Hughes, Tahir G. Mulla, Jonathan L. Spieker, Michael L. Turok
  • Publication number: 20120191228
    Abstract: A game apparatus as an information processing apparatus includes a CPU, and the CPU generates data for generation from information specific to the game apparatus and random numbers, and calculates hash value data by using the data for generation. On the other hand, the CPU extracts the apparatus-specific information from the taken data for generation, and determines whether it is correct or not. In a case that it is determined that the apparatus-specific information is correct, hash value data is calculated by using the taken data for generation. Then, the CPU executes game processing regarding the hash value data as a parameter in a case that the taken hash value data and the calculated hash value data are coincident with each other. In a case that the apparatus-specific information is not correct or in a case that the two hash value data is not coincident with each other, the communication game is not started.
    Type: Application
    Filed: May 4, 2011
    Publication date: July 26, 2012
    Applicant: NINTENDO CO., LTD.
    Inventor: Satoru OSAKO