Error Detection Or Correction Of The Data By Redundancy In Operation (epo) Patents (Class 714/E11.112)

  • Patent number: 9003140
    Abstract: A storage system including first storage devices constituting a first logical storage area, second storage devices constituting a second logical storage area; and a storage control apparatus. The storage control apparatus manages the first and second logical storage areas so that the data stored in the first and second logical storage areas have redundancy, and parity data for the data stored in the second logical storage area are stored in parity storage areas arranged in part of the second storage devices. When part of the first storage devices constituting part of the first logical storage area fail, the storage control apparatus generates part of the data stored, before the failure, in the part of the first storage devices, and stores the generated part of the data in at least part of the second parity storage areas in the second logical storage area.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: April 7, 2015
    Assignee: Fujitsu Limited
    Inventors: Kazuhiko Ikeuchi, Hidejirou Daikokuya, Takeshi Watanabe, Norihide Kubota, Atsushi Igashira, Kenji Kobayashi, Ryota Tsukahara
  • Publication number: 20140108879
    Abstract: Serializer-Deserializer (SerDes) operation is optimized for signals based on signal error statistics. Forward Error Correction (FEC) may provide feedback of error statistics or error correction statistics to a SerDes tuner, which uses the statistics to selectively tune or adjust SerDes operating parameters, such as vertical and horizontal sampling or slicing offsets, gain and equalization, to decrease the bit error rate (BER). Statistics report which bits and patterns are corrected and to what values. Knowledge of expected and actual signals is leveraged to correlate detected errors with underlying problems and solutions to optimize SerDes operation. Each node in a network, such as a Ethernet Passive Optical Network (EPON), is enabled to fine tune its operation independently for each logical or physical channel.
    Type: Application
    Filed: October 11, 2012
    Publication date: April 17, 2014
    Inventor: Ryan Hirth
  • Publication number: 20140040656
    Abstract: A system is provided to manage cloud deployment configuration of a computing application. The system comprises a request detector, a retrieving module, a manager loader, a configuration change request detector, and a configuration module. The request detector may be configured to detect a request to install a manager agent on an instance of a virtual machine executing a computing application within a virtualization service. The retrieving module may be configured to obtain a manager agent object for loading the manager agent, and install the manager agent on the instance. The manager loader may be configured to invoke the manager agent to collect metrics for the computing application. The configuration change request detector may be configured to receive an instruction to alter cloud deployment configuration of the computing application. The configuration module may be configured to automatically alter the cloud deployment configuration of the computing application in response to the instruction.
    Type: Application
    Filed: August 26, 2010
    Publication date: February 6, 2014
    Applicant: Adobe Systems Incorporated
    Inventors: Ricky Ho, Jim Donahue
  • Patent number: 8588142
    Abstract: Provided are a method and apparatus of performing a HARQ in a multiple carrier system. A receiver determines the size of a soft buffer to be used in an effective HARQ process on the basis of the maximum number of effective HARQ processes over a plurality of component carriers and stores the received transport block in the soft buffer. The present invention enables the performance of a HARQ in an efficient manner by using multiple carriers in the event the size of the soft buffer is limited.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: November 19, 2013
    Assignee: LG Electronics Inc.
    Inventors: Dong Youn Seo, Joon Kui Ahn, Suck Chel Yang, Jung Hoon Lee, Ki Jun Kim
  • Publication number: 20130191692
    Abstract: An approach is disclosed for performing initialization operations for a graphics processing unit (GPU). The approach includes detecting errors while performing one or more initialization operations. Further, the approach includes releasing a holdoff on a communication link that couples the GPU to a memory bridge and causing debug output to be displayed to a user that indicates the error.
    Type: Application
    Filed: January 24, 2012
    Publication date: July 25, 2013
    Inventors: Lincoln GARLICK, Saket JAMKAR, Steven MUELLER
  • Publication number: 20130173952
    Abstract: An electronic device includes an internal storage module, a baseboard management controller (BMC) and a port. The internal storage module stores a first firmware and a boot application. The port connects to an external storage for storing a second firmware which is a backup of the first firmware. After the electronic device is powered on, the BMC runs the boot application to load the first firmware from the internal storage module. If the first firmware fails to load, the BMC copies the second firmware from the external storage to the internal storage module to replace the first firmware.
    Type: Application
    Filed: August 3, 2012
    Publication date: July 4, 2013
  • Publication number: 20130145205
    Abstract: Described herein are systems and methods related to a plug-in for a visual tool as a real-time knowledge transfer agent between network outages. One embodiment relates to a method comprises retrieving current outage data related to a current operation of a network, retrieving historical outage data related to a prior operation of the network, correlating the current outage data with the historical outage data, and constructing a resolution process plan for repairing a current outage based on correlations between the current outage data and the historical outage data.
    Type: Application
    Filed: December 5, 2011
    Publication date: June 6, 2013
    Inventor: Brian LEE
  • Patent number: 8458398
    Abstract: A computer-readable medium storing a data management program makes a computer manage data redundantly stored in storage devices having storage areas split into slices for data management. The data management program realizes the following functions in the computer. A first function receives irregularity information indicating that each of one or more of the storage devices may be possibly faulty, and stores the irregularity information in a storage; and a second function determines, by reference to the irregularity information, whether or not a first storage device containing a slice to be accessed is possibly faulty, on receipt of access information indicating occurrence of a request to access the slice. When yes is determined, the second function instructs an external device to recover data stored in the slice, where the external device controls a second storage device storing redundant data identical to the data stored in the slice.
    Type: Grant
    Filed: September 14, 2009
    Date of Patent: June 4, 2013
    Assignee: Fujitsu Limited
    Inventors: Yasuo Noguchi, Kazutaka Ogihara, Masahisa Tamura, Yoshihiro Tsuchiya, Tetsutaro Maruyama, Takashi Watanabe, Tatsuo Kumano, Kazuichi Oe
  • Publication number: 20130124928
    Abstract: One or more non-transitory computer-readable media having stored thereon program instructions to facilitate the display of multiple errors is provided. The program instructions, when executed by a computing system, direct the computing system to at least initiate display of a graphical view of an industrial automation environment. The program instructions also direct the computing system to detect a plurality of error conditions related to machine operations within the industrial automation environment, and to determine a plurality of locations within the graphical view associated with the plurality of error conditions. The program instructions further direct the computing system to identify at least one group of error conditions from the plurality of error conditions based on the plurality of locations, and to initiate display of a graphical representation of the at least one group of the error conditions.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 16, 2013
  • Patent number: 8428161
    Abstract: A method of transmitting data from a transmitter to a receiver includes transmitting a first data unit to the receiver via a plurality of antennas, the first data unit including a payload that has a plurality of symbols; determining whether the receiver has successfully received the first data unit; and, in response to determining that the receiver has not successfully received the first data unit, transmitting a second data unit to the receiver, the second data unit including the payload, such that transmitting the second data unit includes transmitting the plurality of symbols via at least one of different antennas and different subcarriers with respect to the first data unit.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: April 23, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Yakun Sun, Jungwon Lee
  • Publication number: 20130042156
    Abstract: Methods, computer-readable media, and computer systems are provided for initiating storage of data on multiple storage devices and confirming storage of the data after the data has been stored on one but not necessarily all of the devices. A storage server receives, from a client, a request to store data. In response to the request, the storage server initiates, in parallel, storage of the data on multiple storage systems. The storage server detects that the data has been stored on any one of the storage systems, such as an auxiliary system, and, in response, indicates, to the client, that the data has been stored. The storage server may flush or discard data on the auxiliary storage system upon detecting that the data has been successfully stored on a target storage system, where the data persists.
    Type: Application
    Filed: January 9, 2012
    Publication date: February 14, 2013
    Inventors: Kesavan P. Srinivasan, Boris Erlikhman, Juan R. Loaiza, Jia Shi, Alexander Tsukerman, Kothanda Umamageswaran
  • Publication number: 20130013970
    Abstract: The invention provides a method for hierarchy management for a HARQ memory, wherein, the HARQ memory includes an on-chip memory including one or more storage blocks, each of which corresponds to a using status bit for indicating whether the storage block is overlayable. The method includes the following steps of: when receiving new data of a coded block, searching the on-chip memory for any overlayable storage block, and if there exists an overlayable storage block, storing the new data into the storage block and setting the using status bit corresponding to the storage block to be un-overlayable; if there is no overlayable storage block, storing the new data into an off-chip memory; and when the new data are checked and pass the check, setting the using status bit corresponding to the storage block in which the new data are stored to be overlayable. The invention also provides a corresponding system.
    Type: Application
    Filed: October 25, 2010
    Publication date: January 10, 2013
    Applicant: ZTE CORPORATION
    Inventors: Jianping Tao, Jiwen Wang
  • Publication number: 20130007729
    Abstract: A system for remote computer access, for configuration, monitoring and repair, designed for computer technical remote support. A standalone system not affected by operating system (OS) or any other software modules malfunctions which runs in protected environment which enables the system to operate even in the case of severe personal computer (PC) failures, including a loss of network connectivity, operating system (OS) failure to boot and including some hardware failures.
    Type: Application
    Filed: January 28, 2009
    Publication date: January 3, 2013
    Inventor: Alexander Sirotkin
  • Publication number: 20120317438
    Abstract: A method and system for providing immunity to a computer system wherein the system includes an immunity module, a recovery module, a maintenance module, an assessment module, and a decision module, wherein the immunity module, the recovery module, the maintenance module and the assessment module are each linked to the decision module. The maintenance module monitors the system for errors and sends an error alert message to the assessment module, which determines the severity of the error and the type of package required to fix the error. The assessment module sends a request regarding the type of package required to fix the error to the recovery module. The recovery module sends the package required to fix the error to the maintenance module, which fixes the error in the system.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 13, 2012
    Inventor: Mehmet Yildiz
  • Publication number: 20120311391
    Abstract: Various systems, processes, products, and techniques may be used to manage failure data for a distributed computer system. In particular implementations, a system and process for managing distributed data for a distributed computer system may include the ability to determine at a service processor of a first node in a distributed computer system that comprises a plurality of nodes whether a failure has occurred in the first node and identify a service processor of a second node in the distributed computer system in which to store failure data if a failure has occurred. The system and process may also include the ability to store at least part of the failure data in the identified service processor and determine whether there is more failure data to store than the identified service processor can store.
    Type: Application
    Filed: June 2, 2011
    Publication date: December 6, 2012
    Inventors: Anis M. Abdul, Andrea Yin-Shih Ma, Ajay K. Mahajan, Nicholas A. Pietraniec
  • Publication number: 20120260122
    Abstract: In one embodiment, a method includes receiving at a multimedia transformation unit, media streams from a plurality of endpoints, transmitting audio components of the media streams to a multipoint conferencing unit, receiving an identifier from the multipoint conferencing unit identifying one of the media streams as an active speaker stream, processing at the multimedia transformation unit, a video component of the active speaker stream, and transmitting the active speaker stream to one or more of the endpoints without transmitting the video component to the multipoint conferencing unit. An apparatus is also disclosed.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Inventors: Rohit Puri, Jim Chou
  • Publication number: 20120089882
    Abstract: A packet combining device for a communication system using hybrid automatic repeat request (HARQ) includes: a HARQ buffer; a combiner configured to combine data which is previously received and stored in the HARQ buffer with newly-received data; and a channel decoder configured to attempt channel decoding by using the combined received data provided from the combiner and provide one or more of log likelihood ratios (LLRs) computed for a systematic bit and a parity bit of the combined received data to the combiner such that the one or more LLRs are combined with the data used for channel decoding.
    Type: Application
    Filed: October 11, 2011
    Publication date: April 12, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyuk KIM, In San Jeon, Seong Min Kim, Bon Tae Koo
  • Publication number: 20120054549
    Abstract: The present invention provides a method and apparatus for saving and restoring soft repair information. One embodiment of the method includes storing soft repair information for one or more cache arrays implemented in a processor core in a memory element outside of the processor core in response to determining that a voltage supply to the processor core is to be disconnected.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 1, 2012
    Inventors: Bill K. Kwan, Atchyuth K. Gorti, Norm Hack, David Kaplan
  • Publication number: 20120036398
    Abstract: A data processor with a plurality of processor cores. Accumulated usage information of each of the plurality of processor cores is stored in a storage device within the data processor, wherein the accumulated usage information is indicative of accumulated usage of each processor core of the plurality of processor cores. The processor uses the accumulated usage information in selecting processor cores to perform processor operations.
    Type: Application
    Filed: October 13, 2011
    Publication date: February 9, 2012
    Inventors: William C. Moyer, David R. Bearden, Ravindraraj Ramaraju
  • Publication number: 20120017113
    Abstract: The control device has a receiving device, an output stage, a checking device and a reset device. The receiving device is used to receive at least one data block including control commands from a data bus, the output stage is used to output an output signal in response to the control commands, the checking device is used to output an error signal if the at least one received data block is faulty and/or if no data block is received within a predetermined time, and the reset device is used to reset the output stage in a predefined state if the checking device outputs the error signal. The control device is thus able to react automatically to faultily transmitted data blocks without having to wait for return messages from a transmitting central processor unit.
    Type: Application
    Filed: February 9, 2007
    Publication date: January 19, 2012
    Inventors: Bernd Tepass, Bernd Nottebom
  • Publication number: 20110276852
    Abstract: A communication device (100) for communicating in accordance with a hybrid automatic repeat request protocol, the communication device (100) comprising a receiving unit (102) adapted for receiving a communication message including soft-bit values, the soft-bit values representing reliability information for received verification data verifying proper transmission of the communication message, a storage unit (104) adapted for storing the soft-bit values, and a storage management unit (106) adapted for dynamically managing storage of the soft-bit values in the storage unit (104) so that soft-bit values failing to fulfil at least one relevance criteria are not maintained in the storage unit (104).
    Type: Application
    Filed: December 18, 2008
    Publication date: November 10, 2011
    Inventors: Stefan Mueller-Weinfurtner, Steffen Reinhardt, Udo Wachsmann
  • Publication number: 20110239073
    Abstract: In a case where the F-RTO algorithm is simply combined with the exponential backoff algorithm which is being suppressed, there is a problem in that one a spurious timeout occurs, the spurious timeout continuously occurs since then. In order to solve the above problem, according to the present invention, in a communication device for transmitting data segments and receiving acknowledgements in response to the data segments, respectively and sequentially, suppressing an application of a backoff algorithm for increasing a retransmission timeout period at the time of retransmitting a data segment, and controlling the retransmission timeout period to retransmit the data segment, the spurious timeout is determined based upon the acknowledgement received immediately after the retransmission of the data segment. In an event of determining the occurrence of the spurious timeout, the retransmission timeout is increased.
    Type: Application
    Filed: December 2, 2009
    Publication date: September 29, 2011
    Applicant: NTT DOCOMO, INC.
    Inventors: Satoru Imai, Katsumi Sekiguchi, Noriyoshi Meuchi
  • Publication number: 20110191623
    Abstract: The invention relates to a method for transmitting control data in a telecommunication network for controlling a service administered by the telecommunication network, especially a server connected to the telecommunication network. According to said method, the telecommunication network provides a data object, especially a contact of an address book, with a function that is special with respect to other data objects. A parameterized message is transmitted by the terminal device for telecommunication via the telecommunication network to a higher order system component of the telecommunication network, said message comprising at least one first parameter for characterizing the data object and a second parameter containing a control information, especially for the activation, deactivation or modification of the service. The higher order system component checks at least one of parameters and the service is controlled depending on the result of the check and in accordance with the control parameter.
    Type: Application
    Filed: August 28, 2009
    Publication date: August 4, 2011
    Inventor: Thomas Dennert
  • Publication number: 20110107170
    Abstract: Provided is a method in which a terminal conducts an operation for retransmission using a frame divided into downlink subframes and uplink subframes, the method including: receiving a data burst transmitted from a base station; determining a feedback frame offset based on the relationship between a range determined based on division information of the frame and a downlink subframe index in which the data burst has been transmitted; determining indices of a frame and uplink subframe for transmitting a feedback signal based on the frame offset; transmitting the feedback signal to the base station in the determined indices of the frame and uplink subframe; and if an NACK message is included in the feedback signal, receiving the data burst retransmitted from the base station.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 5, 2011
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Jisoo PARK, Namsuk Lee, Sook Jin Lee, Yong Seouk Choi
  • Publication number: 20110107138
    Abstract: There is disclosed a high speed switching method for a disk image delivery system fail-over. A management server sends a disk image of an active server in advance to a standby server. When receiving a report that the active server has failed, the management server judges whether or not it is possible for the standby server to perform the service of the failed active server based on service provision management server information held by the management server and if possible, instructs the standby server to perform the service of the active server. Even if the disk image delivered in advance is different from the disk image of the failed active server, switching of the service to the standby server can be performed more quickly through resetting the setting values of unique information and installing the additional pieces of software on the standby server by the management server than redelivering an appropriate disk image.
    Type: Application
    Filed: January 4, 2011
    Publication date: May 5, 2011
    Applicant: HITACHI, LTD.
    Inventors: Takashi Tameshige, Yoshifumi Takamoto, Keisuke Hatasaki
  • Publication number: 20110083037
    Abstract: A reliable streaming system increases reliability of live and on-demand streaming media events through a robust server architecture that allows fast failover and recovery in the event of network, hardware, or other failures. The system provides for failover of encoders, ingest servers, which receive encoded media data from encoders, and origin servers, which serve as the retrieval point of last resort for connecting clients. The system also provides a push proxy mechanism that allows one copy of data to feed redundant servers and pre-warm caches, saving on provisioned bandwidth. In addition, the system provides a distribution server role that allows content to be automatically syndicated to a region when needed. Thus, the reliable streaming system provides a streaming solution with no single point of failure and redundancy and fast failover built into the content network architecture.
    Type: Application
    Filed: November 3, 2009
    Publication date: April 7, 2011
    Inventors: John A. Bocharov, Geqiang (Sam) Zhang, Krishna Prakash Duggaraju, Lin Liu, Jimin Gao
  • Publication number: 20110041015
    Abstract: Detecting a race condition is disclosed. An indication of a store operation to a memory address is received. An identifier of the memory address is stored. The identifier is used to detect an occurrence of a memory operation that is not associated with a previous ordering operation.
    Type: Application
    Filed: October 22, 2010
    Publication date: February 17, 2011
    Applicant: AZUL SYSTEMS, INC.
    Inventors: Daniel Dwight Grove, Ivan Posva, Jack H. Choquette, Cliff N. Click, JR., Jeffrey Gee
  • Publication number: 20100318887
    Abstract: Exemplary method, system, and computer program product embodiments for data verification in a storage system are provided. A read of data is asynchronously submitted to nonvolatile storage media. A read of a first checksum signature is submitted to a solid state, sidefile memory location of a storage controller in the storage subsystem. The first checksum signature is representative of the data previously written to the nonvolatile storage media. A second checksum signature is calculated from the read of the data. The first and second checksum signatures are compared. If a match is not determined, a critical event is reported.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 16, 2010
    Inventor: Liran ZVIBEL
  • Publication number: 20100299554
    Abstract: Long running computer implemented processes are dynamically adapted to improve data consistency. A range of process steps in a long running computer implemented process is specified. Additionally, each of the computer-implemented process partners that are associated with the execution of the long running process are identified within the range of specified process steps. Monitoring information is also collected with regard to at least one identified process partner. An automatic determination is made as to whether each monitored process partner is available before initiating execution of the specified range of process steps in an instance of the long running computer implemented process and a flow of the long running computer implemented process is transformed based at least in part upon the determination as to whether each monitored process partner is available.
    Type: Application
    Filed: May 22, 2009
    Publication date: November 25, 2010
    Applicant: International Business Machines Corporation
    Inventors: Patrick J. O'Sullivan, Gregory Sechuga, Edith H. Stern, Barry E. Willner
  • Publication number: 20100281311
    Abstract: A computer-implemented method and system for reconstructing a response message to an improper accessing request in a web application environment. The method includes: obtaining the URL of a web application to be accessed by the improper accessing request and the error parameter information of the improper accessing request; obtaining a response template based on the obtained URL of the web application to be accessed; and merging the obtained error parameter information of the improper accessing request with the obtained response template to generate a reconstructed response message for the improper accessing request. The system includes: a message obtaining device; a response message template obtaining device; and a response message merging device.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 4, 2010
    Inventors: Bo Gao, Chang Jie Guo, Lin Luo, Shun Xiang Yang, Yu Zhang
  • Publication number: 20100246382
    Abstract: A method of re-establishing a radio bearer in a wireless communication system is disclosed. The method of re-establishing a radio bearer of a user equipment in a wireless communication system comprises establishing a radio bearer; identifying whether an error has occurred in the radio bearer; and selectively re-establishing the radio bearer or all radio bearers of the user equipment in accordance with a type of the radio bearer if the error has occurred in the radio bearer.
    Type: Application
    Filed: October 29, 2008
    Publication date: September 30, 2010
    Applicant: LG ELECTRONICS INC.
    Inventors: Seung June Yi, Young Dae Lee, Sung Duck Chun, Sung Jun Park
  • Publication number: 20100174842
    Abstract: This disclosure describes a processor system that allows non-real time code to execute normally, while permitting a real time interrupt in hardware or software to execute with minimal added latency.
    Type: Application
    Filed: September 9, 2009
    Publication date: July 8, 2010
    Applicant: Texas Instruments Incorporated
    Inventor: Paul Kimelman
  • Publication number: 20100083031
    Abstract: According to an aspect of the embodiment, a message queuing unit of the message processing apparatus stores received messages. A message reception control unit receives a notification of destinations of messages, extracts only the messages for current processes based on a process control table recording current or standby of processes, and transmits the messages to corresponding applications as current processes. On the other hand, the message reception control unit does not transmit the messages to the applications as standby processes.
    Type: Application
    Filed: June 29, 2009
    Publication date: April 1, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Yasuo Koike, Tamaki Tanaka, Shoji Yamamoto
  • Publication number: 20100082880
    Abstract: A pre-code device includes firstly memory circuit, an address decoder, and an alternative logic circuit. The first memory circuit includes a number of memory blocks and at east a replacing block. The memory blocks are pointed by a number of respective physical addresses. The replacing block is pointed by a replacing address. The address decoder decodes an input address to provide a pre-code address. The alternative logic circuit looks up an address mapping table, which maps defect physical address among the physical addresses to the replacing address, to map the pre-code address to the replacing address when the pre-code address corresponds to the defect physical address. The alternative logic circuit correspondingly pre-codes the pre-code data to the replacing block.
    Type: Application
    Filed: September 26, 2008
    Publication date: April 1, 2010
    Inventors: Chun-Hsiung HUNG, Wen-Chiao HO
  • Publication number: 20100058008
    Abstract: A data processing control unit for controlling two or more data processing operations SMI1,SMI2. The data processing control unit may include a control memory in control data may be stored which represents information about access to a main memory by the two or more data processing operations. A control data controller may be connected to the control memory. The control data controller may include a control data controller input or receiving an access request from one or more of the data processing operations. The control data controller may modify the data in the control memory upon receiving the access request. A process controller may be connected to the control memory. The process controller may control at least a part of the data processing operations SMI1.SMI2 based on a comparison of data in the control memory with a criterion.
    Type: Application
    Filed: April 18, 2007
    Publication date: March 4, 2010
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Oleksandr Sakada, Vladimir Litovtchenko
  • Publication number: 20100011243
    Abstract: Methods, systems, and media for enabling a software application to recover from a fault condition, and for protecting a software application from a fault condition, are provided. In some embodiments, methods include detecting a fault condition during execution of the software application, restoring execution of the software application to a previous point of execution, the previous point of execution occurring during execution of a first subroutine in the software application, and forcing the first subroutine to forego further execution and return to a caller of the first subroutine.
    Type: Application
    Filed: April 17, 2007
    Publication date: January 14, 2010
    Inventors: Michael E. Locasto, Angelos D. Keromytis, Salvatore J. Stolfo, Angelos Stavrou, Gabriela Cretu, Stylianos Sidiroglou, Jason Nieh, Oren Laadan
  • Publication number: 20090307538
    Abstract: In response to a hypervisor page fault for memory that is not resident in a shared memory pool, an I/O paging request is sent to an external storage paging space. In response to a paging service partition encountering an I/O paging error, a paging failure indication is sent to the hypervisor. A simulated machine check interrupt instruction is sent from the hypervisor to the shared memory partition and a machine check handler obtains control. The machine check handler performs data analysis utilizing an error log in an attempt to isolate the I/O paging error to a process or a set of processes in the shared memory partition. The process or set of processes associated with the I/O paging error, or the shared memory partition itself, may be terminated. Finally, the shared memory partition may clear or initialize the page associated with the I/O paging error.
    Type: Application
    Filed: June 5, 2009
    Publication date: December 10, 2009
    Inventors: Carol B. Hernandez, David A. Larson, Naresh Nayar, John T. O'Quin, II, Gary R. Ricard, Kenneth C. Vossen
  • Publication number: 20090240977
    Abstract: An error detection system is provided. The system includes a data array that includes one or more data entries. A copy datastore selectively stores a copy of a first single data entry of the data array. An index generator selectively increments an index that references the data array. A first comparator compares the copy with a second single data entry from the data array based on the index. An error generator generates an error signal based on a result from the first comparator.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 24, 2009
    Applicant: International Business Machines Corporation
    Inventors: Brian R. Prasky, Khary J. Alexander, James J. Bonanno
  • Publication number: 20090240979
    Abstract: Techniques that determine a strict subset of multiple processor cores from a set of multiple functional processor cores integrated within a single integrated circuit package. The determined strict subset of multiple processor cores differs from a previously determined strict subset of multiple processor cores from the set of multiple functional processor cores used to initiate an immediately previous core booting. In response to a processor reset, booting of the strict subset of multiple processor cores is initiated. Also, support for selecting multiple modes of operations, either supporting fault tolerance or extended life.
    Type: Application
    Filed: March 24, 2008
    Publication date: September 24, 2009
    Inventors: Edoardo Campini, Shailesh Chaudhry, Frank Geoffrey Gates
  • Publication number: 20090183035
    Abstract: A processor core includes an instruction decode unit that may dispatch a same integer instruction stream to a plurality of integer execution units and may consecutively dispatch a same floating-point instruction stream to a floating-point unit. The integer execution units may operate in lock-step such that during each clock cycle, each respective integer execution unit executes the same integer instruction. The floating-point unit may execute the same floating-point instruction stream twice. Prior to the integer instructions retiring, compare logic may detect a mismatch between execution results from each of the integer execution units. In addition, prior to the results of the floating-point instruction stream transferring out of the floating-point unit, the compare logic may also detect a mismatch between results of execution of each consecutive floating-point instruction stream. Further, in response to detecting any mismatch, the compare logic may cause instructions causing the mismatch to be re-executed.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 16, 2009
    Inventors: Michael G. Butler, Nhon Quach
  • Publication number: 20090172468
    Abstract: A set of disks in a plurality of disk arrays are configured to have one or more spare partitions. Upon detecting a faulty disk in a faulty array, the method involves the steps of: (a) migrating data in the faulty array containing the faulty disk to one or more spare partitions; (b) reconfiguring the faulty array to form a new array without the faulty disk; (c) migrating data from one or more spare partitions in the set of disks to the reconfigured new array; (d) monitoring to identify when overall spare capacity falls below a predetermined threshold; and when the predetermined threshold is exceeded, scheduling a service visit for replacement of the failed disks.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Applicant: International Business Machines Corporation
    Inventors: Bulent Abali, Mohammad Banikazemi, James Lee Hafner, Daniel Edward Poff, Krishnakumar Rao Surugucchi
  • Publication number: 20090125790
    Abstract: A method and apparatus of automatically selecting an optimal ECC algorithm by NAND Flash controller to detect and correct errors to read or write data from or to a flash memory device is described. In one embodiment, the method includes selecting the optimal algorithm by identifying the characteristics of the target flash memory device such as but not limited to redundant data size. The method also includes determining the optimal algorithm based on the application stored in the target flash memory device.
    Type: Application
    Filed: November 13, 2007
    Publication date: May 14, 2009
    Applicant: MCM PORTFOLIO LLC
    Inventors: Sree M. Iyer, Arunprasad Ramiya Mothilal, Santosh Kumar
  • Publication number: 20090100320
    Abstract: A method, transceiver, and computer program storage product transfer data over fiber between a first transceiver and a second transceiver. The second transceiver is determined to support a high integrity cyclic redundancy check associated with substantially an entire data set in a Fibre Channel Protocol exchange between the first transceiver and the second transceiver. A last data frame in a plurality of data frames is formatted for communication to the second transceiver during the Fibre Channel Protocol exchange. The last data frame includes a plurality of data and at least one cyclic redundancy check field associated with the plurality data and at least one additional cyclic redundancy check field associated with the plurality of data frames.
    Type: Application
    Filed: October 10, 2007
    Publication date: April 16, 2009
    Inventors: RAYMOND M. HIGGS, George P. Kuch, Bruce H. Ratcliff
  • Publication number: 20090063894
    Abstract: A system with an autonomic PCI Express hardware detection and failover mechanism includes a plurality of combination root complex capable and endpoint capable devices. A combination root complex capable and endpoint capable device may be selectively configured to operate in either a root complex mode or an endpoint mode. One of the devices assumes the root complex mode and the remaining devices each assume the endpoint mode. Each of the endpoint mode devices is adapted to detect a failure of the root complex mode device. In response to detection of the failure of the root complex mode device, one of the endpoint mode devices assumes root complex mode. An endpoint device may include a timer with a timeout value. Whenever, an endpoint device receives a communication from the root complex device, the endpoint device restarts its timer. If the timer times out with the endpoint device receiving a communication from the root complex device, the endpoint device issues a read request to the root complex device.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 5, 2009
    Inventors: Ronald L. Billau, John D. Folkerts, Ross L. Franke, James S. Harveland, Brian G. Holthaus
  • Publication number: 20090019307
    Abstract: A digital broadcast file data receiving method and a digital broadcast file data receiving apparatus are provided. The digital broadcast file data receiving method and the digital broadcast file data receiving apparatus enable reception and display of proper broadcast file data by detecting an error in a specific data block and receiving the specific data block again in a process of receiving digital broadcast file data.
    Type: Application
    Filed: June 20, 2008
    Publication date: January 15, 2009
    Inventor: Seoung Geun KWON
  • Publication number: 20080222494
    Abstract: There is provided with a communication method including: attempting to receive a media packet from a network; storing a received media packet in a first buffering unit; receiving an FEC packet including redundant data to recover a lost media packet and information which specifies a plurality of media packets associated with the redundant data; storing a received FEC packet in a second buffering unit; selecting the FEC packet from the second buffering unit; dividing FEC operation processing to be carried out using the redundant data included in selected FEC packet and the media packets related to the redundant data into a plurality of processes and sequentially carrying out each process so that one process is carried out every time the receiving of a media packet is attempted; and inserting a media packet recovered through the FEC operation processing in the first buffering unit.
    Type: Application
    Filed: October 30, 2007
    Publication date: September 11, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shunichi Gondo, Daisuke Ajitomi, Yuji Irie, Shigeo Matsuzawa, Kotaro Ise
  • Publication number: 20080134046
    Abstract: An aggregated network-wide status for computer health may be generated by calculating a network health status for each computer on the network, then aggregating the results into a single icon or status based on the worst health of all the network computers. The computer health may be presented as a pictorial map of the network with the health of each system indicated individually, or may be a matrix of each system with the particular components making up the health of the system individually presented.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Applicant: Microsoft Corporation
    Inventors: James Gray, Cyra Richardson, Kynan Antos
  • Publication number: 20080126650
    Abstract: A processing system includes multiple processing units. After multiple event handlers have been dispatched to execute concurrently in different processing units of the processing system in a hidden execution mode, the processing system automatically determines whether the multiple event handlers successfully complete. If an event handler among the multiple dispatched event handlers fails, the processing system automatically dispatches another event handler to perform operations associated with the event handler that failed. In an embodiment, the hidden execution mode is a system management mode (SMM), and the multiple event handlers are dispatched in response to a system management interrupt (SMI) or a platform management interrupt (PMI). In an embodiment, the processing system may determine why the dispatched event handler failed, and may performing a corrective operation before dispatching another event handler to perform the operations associated with the event handler that failed.
    Type: Application
    Filed: September 21, 2006
    Publication date: May 29, 2008
    Inventors: Robert C. Swanson, Michael A. Rothman, Vincent J. Zimmer, Fernando A. Lopez, Mallik Bulusu
  • Publication number: 20080126883
    Abstract: One embodiment of the present invention provides a system that reports reasons for failure during transactional execution. During operation, the system transactionally executes a block of instructions in a program. If the transactional execution of the block of instructions completes successfully, the system commits changes made during the transactional execution, and resumes normal non-transactional execution of the program past the block of instructions. Otherwise, if transactional execution of the block of instructions fails, the system discards changes made during the transactional execution, and records failure information indicating why the transactional execution failed.
    Type: Application
    Filed: July 27, 2006
    Publication date: May 29, 2008
    Inventors: Paul Caprioli, Sherman H. Yip, Shailender Chaudhry
  • Publication number: 20080077824
    Abstract: There is disclosed data storage control circuitry for controlling storage and retrieval of data in a data store in which data is stored in data blocks, each of said data blocks comprising a plurality of bits, said data store comprising at least one faulty bit within at least some of said data blocks.
    Type: Application
    Filed: July 2, 2007
    Publication date: March 27, 2008
    Inventors: Trevor Mudge, Ganesh Dasika, David Roberts