Apparatus for evaluating semiconductor substrate

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Description

FIG. 1 is a front, top, and right side perspective view of an apparatus for evaluating semiconductor substrate according to the design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a top plan view thereof;

FIG. 7 is a bottom plan view thereof;

FIG. 8 is a cross-sectional view taken along line 8-8 of FIG. 2; and,

FIG. 9 is a cross-sectional view taken along line 9-9 of FIG. 2.

The broken lines illustrate portions of the apparatus for evaluating semiconductor substrate that form no part of the claimed design. The hatching shown in FIG. 8 and FIG. 9 represents unclaimed subject matter and forms no part of the claimed design.

Claims

The ornamental design for an apparatus for evaluating semiconductor substrate, as shown and described.

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Other references
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Patent History
Patent number: D989831
Type: Grant
Filed: Oct 13, 2021
Date of Patent: Jun 20, 2023
Assignee: Hitachi High-Tech Corporation (Tokyo)
Inventors: Masayuki Arakawa (Tokyo), Junpei Hokari (Tokyo), Akira Kojima (Tokyo), Masaki Mizuochi (Tokyo), Tomokazu Kobayashi (Tokyo), Takaaki Kikuchi (Tokyo)
Primary Examiner: Patricia A Palasik
Application Number: 29/789,677