Abstract: An object of the present invention is to provide an electrical connection box in which reduction in weight can be achieved by simplification of the construction, while preventing short-circuiting of a positive electrode side busbar and a negative electrode side busbar. An electrical connection box includes: a positive electrode side busbar connected to a positive electrode of a battery; a negative electrode side busbar connected to a negative electrode of the battery; and a case in which the positive electrode side busbar and the negative electrode side busbar are accommodated. The case includes: a bottom wall; a circumferential wall erected from the bottom wall; and a partition wall erected from the bottom wall. The partition wall is a waterproof partition that partitions a positive electrode side busbar accommodating area and a negative electrode side busbar accommodating area.

Abstract: There is provided a wiring board including a stiffener bonded to a circuit board, and a laminate formed by laminating a plurality of insulating layers and a plurality of wiring layers on a face of the stiffener opposite to a face bonded to the circuit board. On both faces of the laminate in a laminating direction, terminal connection parts connected to the wiring layers and connected to a terminal part of an electronic component are formed. Further, a component disposition hole, in which the terminal connection parts formed on one of the faces of the laminate are positioned and the electronic component is disposed, and a through hole for connection to the circuit board are formed in the stiffener.

Abstract: A high-speed router backplane is disclosed. The router backplane uses differential signal pairs on multiple signal layers, each sandwiched between a pair of digital ground layers. Thru-holes are used to connect the differential signal pairs to external components. To reduce routing complexity, at least some of the differential signal pairs route through a via pair, somewhere along their path, to a different signal layer. At least some of the thru-holes and vias are drilled to reduce an electrically conductive stub length portion of the hole. The drilled portion of a hole includes a transition from a first profile to a second profile to reduce radio frequency reflections from the end of the drilled hole.

Abstract: A bump structure for electrically coupling semiconductor components is provided. The bump structure includes a first bump on a first semiconductor component and a second bump on a second semiconductor component. The first bump has a first non-flat portion (e.g., a convex projection) and the second bump has a second non-flat portion (e.g., a concave recess). The bump structure also includes a solder joint formed between the first and second non-flat portions to electrically couple the semiconductor components.

Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations.

Abstract: A method includes manipulating at least one electric signal received from one or more electronic components to provide a slope substantially proportional to a discrete integer data value of n discrete integer data values, n being a positive integer greater than or equal to 3, said discrete integer data value represented by using one of n distinct slopes, said one of n distinct slopes to be transmitted utilizing a particular reference voltage of n predetermined reference voltages. The method further includes transmitting data as the particular reference voltage of the n predetermined reference voltages to at least one electronic component utilizing slope manipulation.

Abstract: A passive electrical component is described including a substrate, at least a first, second and third electrically conductive pad, each disposed on the substrate and at least a first electrical device fixedly attached to the first pad and the second pad. The first electrical device is electrically connected to the first and second pads. The third pad is devoid of electrical connection to either the first or the second pads. The component is recognizable by both a Computer Aided Design program and an automated component assembly machine.

Abstract: A printed circuit board (PCB) is provided. From top to bottom, the PCB sequentially includes: a top layer; an upper solder resist layer; a wiring layer; a lower solder resist layer; a bottom layer; and a hole installation part disposed on the upper solder resist layer, the wiring layer, the lower solder resist layer, and the bottom layer. Wherein, the hole installation part includes a screw hole and a copper exposing region; a copper foil is disposed on the copper exposing region of the upper solder resist layer, the wiring layer, the lower solder resist layer, and the bottom layer; an area of the copper foil is not less than an area of the copper exposing region.

Abstract: A circuit board has a first side and a second side opposite thereto. The board includes vias extending through the substrate from the first side to the second side, and via contact pads on the second side, each of which surrounds a corresponding via. The board includes a pair of surface mount contact pads on the second side. Each surface mount contact pad has a surface area and edges, each of which can have a shape to maximize the surface area while maintaining predetermined minimum separation distances. Each edge except one or more edges that are opposite another surface mount contact pad have a curved shape, and each edge opposite another surface mount contact pad have a linear shape. Curved edges adjacently opposite corresponding via contact pads can have curved shapes can have concave shapes, and curved edges not adjacently opposite via contact pads can have convex shapes.

Abstract: Disclosed herein is a device comprising a first package having a first side with a plurality of connectors disposed thereon and a second package mounted on the first package by the connectors. A molding compound is disposed on the first side of the first package and between the first package and the second package. A plurality of stress relief structures (SRSs) are disposed in the molding compound, the plurality of SRSs each comprising a cavity free of metal in the molding compound and spaced apart from each of the plurality of connectors.

Abstract: A process for producing a substrate for mounting element includes forming a thick conductor layer-provided substrate having a thick conductor layer made of a metal composed mainly of silver (Ag) or copper (Cu), on a surface of an inorganic insulating substrate made of an inorganic insulating material, applying wet blast treatment to the thick conductor layer to planarize the surface of the thick conductor layer to a surface roughness Ra of at most 0.02 ?m, and forming a nickel (Ni)/gold (Au)-plated layer on the thick conductor layer having the surface planarized by the wet blast treatment.

Abstract: A device has a base with a mounting surface with a length and a stack, the stack having a diameter smaller than the length and fastened to the mounting surface. The stack may have a plurality of stack conductive layers in addition to a plurality of insulating layers that separate each of the plurality of stack conductive layers. The stack conductive layers may be separated in a manner that aligns them with corresponding printed circuit board conductive layers when the stack portion of the device is inserted into an aperture in a printed circuit board.

Abstract: A method of detaching a sealing member of a light emitting device which has a substrate, a light emitting element mounted on the substrate and a sealing member that seals the light emitting element, wherein a release layer and/or an air layer is/are provided between the substrate and the sealing member; and the sealing member is detached from the substrate at the release layer and/or the air layer.

Abstract: A transition apparatus for connecting first and second circuit boards is provided. The transition apparatus includes a beam having edges and a length defined between the edges, beam circuitry running along the length of the beam and connections disposed at the edges of the beam to connect the beam circuitry with respective circuitry of the first and second circuit boards at respective interior, opposing surfaces thereof.

Abstract: A flexible circuit connecting device is disclosed, including a base layer having a first surface and a second surface, and conductive traces having a grid-like structure and formed on the first surface and/or the second surface. The conductive traces of the above flexible circuit connecting device are nearly aligned with the base layer, and thus the probability of damage under a stress is reduced. Designed to be a grid-like structure, the conductive traces become more transparent, while satisfying a function of a connector. Besides, the above flexible circuit connecting device has a high density circuit trace, so that the size of the connector can be reduced and the interior space of the electronic components can be saved. In a manufacture process of the above flexible circuit connecting device, the manufacture process can be simplified, manufacture efficiency and production yield can be improved, and manufacture cost can be efficiently reduced.

Abstract: The present disclosure relates to a semiconductor package structure including a semiconductor substrate, a semiconductor chip and a conductive material. The semiconductor substrate includes an insulating layer, a conductive circuit layer and a conductive bump. The conductive circuit layer is recessed from the top surface of the insulating layer, and includes at least one pad. The conductive bump is disposed on the at least one pad. A side surface of the conductive bump, a top surface of the at least one pad and a side surface of the insulating layer together define an accommodating space. The conductive material is electrically connected the conductive bump and the semiconductor chip, and a portion of the conductive material is disposed in the accommodating space.

Abstract: Disclosed herein are a coreless board for a semiconductor package and a method of manufacturing the same. The coreless board for the semiconductor package includes: a support; a build-up layer formed on the support; an external connection terminal formed on the build-up layer; and a solder resist layer formed on the build-up layer so as to expose the external connection terminal.

Abstract: An encapsulation structure for an optoelectronic component may include: a barrier thin-film layer for protecting an optoelectronic component against chemical impurities; a cover layer applied above the barrier thin-film layer and serving for protecting the barrier thin-film layer against mechanical damage; and an intermediate layer applied on the barrier thin-film layer between barrier thin-film layer and cover layer and including a curable material designed such that when the non-cured intermediate layer is applied to the barrier thin-film layer, particle impurities at the surface of the barrier thin-film layer are enclosed by the intermediate layer and the applied intermediate layer has a substantially planar surface, and that after the intermediate layer has been cured, mechanical loads on the barrier thin-film layer as a result of particle impurities during the application of the cover layer are reduced by the intermediate layer.

Abstract: Apparatus, systems and methods for forming a structure that includes a metal and a composite material are disclosed. According to one aspect, a layer stack includes a metal layer with a first surface, the first surface including at least one protruding feature. The layer stack also includes a non-metal layer molded to the first surface of the metal layer, wherein the non-metal layer is molded over and/or around the at least one protruding feature.

Abstract: An apparatus includes a cavity formed in a support structure, the support structure being operable to support a semiconductor device. A circuit element is disposed in the cavity in the support structure, and the cavity in the support structure is filled with an electrically non-conductive filling material so as to at least partially surround the circuit element with the non-conductive filling material. The semiconductor device is electrically connected to the circuit element. In an example embodiment, the circuit element is operable to substantially block direct current that is output by the semiconductor device or another semiconductor device.

Abstract: An electronic component embedded printed circuit board includes a core having a cavity; an electronic component inserted in the cavity; insulating layers laminated on top and bottom of the core and mixed with a coupling agent, which has functional groups respectively acting on an organic material and an inorganic material, to be bonded to an outer peripheral surface of the electronic component; and circuit patterns provided on the insulating layers.

Abstract: A device has a base with a mounting surface with a length and a stack, the stack having a diameter smaller than the length and fastened to the mounting surface. The stack may have a plurality of stack conductive layers in addition to a plurality of insulating layers that separate each of the plurality of stack conductive layers. The stack conductive layers may be separated in a manner that aligns them with corresponding printed circuit board conductive layers when the stack portion of the device is inserted into an aperture in a printed circuit board.

Abstract: A package includes a semiconductor chip. The semiconductor chip includes a test pad, and a plurality of microbump pads, wherein each microbump pad of the plurality of microbump pads is electrically connected to the test pad. The package further includes a substrate; and a plurality of microbumps configured to electrically connect the semiconductor chip to the substrate, wherein each microbump of the plurality of microbumps is electrically connected to a corresponding microbump pad of the plurality of microbump pads. The package further includes a package substrate, wherein the package substrate comprises a bump pad, wherein an area of the bump pad is greater than a combined area of the test pad and the plurality of microbump pads. The package further includes a bump configured to electrically connect the substrate to the package substrate.

Abstract: A multilayer printed wiring board for mounting a semiconductor element includes a core substrate, a first laminated structure on first surface of the substrate and including a conductive circuit layer on the first surface of the substrate, a resin insulating layer and the outermost conductive circuit layer, and a second laminated structure on second surface of the substrate and including a conductive circuit layer on the second surface of the substrate, a resin insulating layer and the outermost conductive circuit layer. The outermost conductive layer in the first structure has solder pads positioned to mount a semiconductor element and solder bumps formed on the pads, respectively, the outermost conductive layer in the second structure has solder pads positioned to mount a wiring board, and the outermost conductive layers in the first and second structures have thicknesses formed greater than thicknesses of the conductive layers on the surfaces of the substrate.

Abstract: Over a flexible substrate are formed column lines for a display. Over the substrate and column lines are formed a reflective hydrophobic mesh defining pixels. Over the mesh and column lines is printed an LED ink containing microscopic LED dies. The LED ink de-wets from the mesh. The ink is then cured to electrically connect the bottom electrodes of the LEDs to the column lines within the openings (cells) of the mesh. A dielectric then encapsulates the LEDs while exposing the top electrodes of the LEDs. Transparent row lines are then formed along the rows of the mesh to electrically contact the top electrodes in each row. The LEDs within any cell can be turned on by address in a pair of row and column lines. Phosphor dots may be printed to over blue-emitting LEDs to create red, green, and blue sub-pixels for a full color display.

Abstract: Semiconductor packages are provided. A semiconductor package may include a semiconductor chip. The semiconductor package may include a substrate and first and second conductive regions on the substrate. In some embodiments, the substrate may be a flexible substrate, and the first and second conductive regions may be on the same surface of the flexible substrate. Display devices including semiconductor packages are also provided. In some embodiments, a display device may include a flexible substrate that is bent such that first and second conductive regions thereof are connected to each other via an intervening third conductive region.

Abstract: A magnetic substrate has such a shape that ridges extending between principal surfaces are cut away by cutout portions. A multilayer body has corners arranged so as to overlap the cutout portions. A coil includes lead portions which are connected with both ends of a coil portion and which are drawn out to the corners. A coil is combined with the coil to constitute a common mode choke coil and includes lead portions which are connected with both ends of a coil portion and which are drawn out to the corners. Connecting portions connect external electrodes to the lead portions and are provided at the cutout portion.

Abstract: A cable connector assembly includes a carrier having an insulative sheet with a substrate side fixedly mounted to a substrate and a contact side opposite the substrate side. A first conductive contact is secured to the contact side of the carrier. The first conductive contact has a pad coupled to a center conductor of a cable and a spring beam extending from the pad of the first conductive contact. The spring beam of the first conductive contact is resiliently deformed against a corresponding printed electronic on the substrate. A second conductive contact is secured to the contact side of the carrier. The second conductive contact has a pad coupled to an outer conductor of the cable and a spring beam extending from the pad of the second conductive contact. The spring beam of the second conductive contact is resiliently deformed against a corresponding printed electronic on the substrate.

Abstract: An apparatus for reducing interference between clock signals may include a circuit board and a first set of clock vias coupled to the circuit board. The apparatus may also include a second set of clock vias coupled to the circuit board in a linear pattern adjacent to the first set of clock vias. The first set of clock vias may transmit a first clock signal and the second set of clock vias may transmit a second clock signal with a frequency that is different from the first clock signal. The system may further include a ground via coupled to the circuit board in line with the second set of clock vias. Each ground via coupled to the circuit board may be positioned outside any region of the circuit board located between the first and second sets of clock vias. Various other apparatuses, systems, and methods are also disclosed.

Abstract: Packaging devices and methods of manufacture thereof for semiconductor devices are disclosed. In some embodiments, a packaging device includes a contact pad disposed over a substrate, and a passivation layer disposed over the substrate and a first portion of the contact pad. A second portion of the contact pad is exposed. A post passivation interconnect (PPI) line is disposed over the passivation layer and is coupled to the second portion of the contact pad. A PPI pad is disposed over the passivation layer. A transition element is disposed over the passivation layer and is coupled between the PPI line and the PPI pad. The transition element includes a hollow region.

Abstract: A process for fabricating a circuit substrate is provided. The process includes the following steps. A carrier is provided. A conductive layer and a dielectric layer are placed on the carrier, and the conductive layer is located between the carrier and the dielectric layer. The dielectric layer is patterned to form a patterned-dielectric layer having first openings partially exposing the conductive layer. Arc-shaped grooves are formed on the exposed part of the conductive layer. A first-patterned-photoresist layer having second openings respectively connecting the first openings is formed. Conductive structures are formed, wherein each of the conductive structures is integrally formed and includes a pad part, a connection part, and a protruding part; the second openings, the first openings and the arc-shaped grooves are respectively filled with the pad parts, the connection parts and the protruding parts. The first patterned photoresist layer, the carrier and the conductive layer are removed.

Abstract: A near field communication electronic device and an antenna may include an antenna module, a near field communication control module and a battery-receiving groove. The antenna module may be electrically connected to the near field communication control module and the antenna module may be disposed around the battery-receiving groove.

Abstract: A surface mount electrical interconnect is disclosed that provides an interface between a PCB and solder balls of a BGA device. The electrical interconnect includes a socket substrate and a plurality of electrically conductive contact members. The socket substrate has a first layer with a plurality of openings configured to receive solder balls of the BGA device and has a second layer with a plurality of slots defined therethrough that correspond to the plurality of openings. The contact members may be disposed in the openings in the first layer and through the plurality of slots of the second layer of the socket substrate. The contact members can be configured to engage a top portion, a center diameter, and a lower portion of the solder ball of the BGA device. Each contact member electrically couples a solder ball on the BGA device to the PCB.

Abstract: A bump structure may include a body portion spaced apart from a pad disposed on a substrate and a first extension extending from a side of the body portion onto the pad. A second extension extends from another side of the body portion.

Abstract: A wire-to-board connector includes a plug which is attached to a wire, and a receptacle which is mounted on a connector mounting surface of a board. The plug and the receptacle are each formed of metal, and the plug is mated with the receptacle to thereby connect the wire to the board. The wire-to-board connector has the following structure. A wire direction corresponding to a longitudinal direction of the wire in the vicinity of the plug when the plug is mated with the receptacle is parallel to the connector mounting surface of the board. A mating direction in which the plug is mated with the receptacle is a direction approaching the connector mounting surface of the board.

Abstract: A printed wiring board having a land for surface-mounting of an electronic component, includes the land having a pair of land pieces arranged in an opposing manner, and each of the land pieces including a plurality of land portions having widths different from each other, and a coupling portion partially coupling a boundary portion between a pair of adjacent ones of the land portions.

Abstract: Each chip in a three-dimensional circuit includes a pair of connections, a test signal generation circuit, and a test result judgment circuit. The connections are electrically connected with an adjacent chip. The test signal generation circuit outputs a test signal to one of the connections. The test result judgment circuit receives a signal from the other of the connections and, from the state of the signal, detects the conducting state of the transmission path for the signal. Before layering the chips, a conductor connects the connections to form a series connection, and the conducting state of each connection is detected from the conducting state of the series connection. After layering the chips, the test signal generation circuit in one chip outputs a test signal, and the test result judgment circuit in another chip receives the test signal, and thus the conducting state of the connections between the chips is tested.

Abstract: A modular power device is used for mounting on a main plate. The modular power device includes a first substrate, a driving module, and a converting module. The first substrate having a first axial direction and a second axial direction perpendicular to the first axial direction is inserted into the main plate to make the second axial direction be perpendicular to the main plate. The driving module is located on one side of the first substrate, and the converting module is located on the other side of the first substrate and includes a second substrate, wherein the second substrate is inserted into the main plate. A length of the converting module is substantially equal to that of the first substrate in the first axial direction, and a width of the converting module is smaller than a length of the first substrate in the first axial direction.

Abstract: The present invention relates to a camera module, the camera module including a PCB (Printed Circuit Board) formed with an image sensor, a holder formed at an upper surface of the PCB and mounted therein with at least one or more lenses, an actuator positioned at the holder, and an electronic circuit pattern layer formed on the holder.

Abstract: A modular power device is used for mounting on a main plate. The modular power device includes a first substrate, a driving module, and a converting module. The first substrate has a first axial direction and a second axial direction perpendicular to the first axial direction. The driving module is located on one side of the first substrate, the converting module is located on the other side of the first substrate, and includes a second substrate parallel to the main plate, wherein two opposite sides of the first substrate are inserted into the main plate and the second substrate. A length of the converting module is equal to that of the first substrate in the first axial direction, and a width of the converting module is smaller than a length of the first substrate in the first axial direction.

Abstract: A method of manufacturing a semiconductor element is provided. The method includes the following steps. A carrier and a mold are provided. A first patterned conductive layer including a plurality of traces is formed on the carrier. A second patterned conductive layer is formed on the first patterned conductive layer. The carrier is disposed with the mold to form at least one mold cavity. The mold cavity is infused with a molding material. The molding material fills the mold cavity to encapsulate the first and second patterned conductive layers. The carrier is removed by etching to expose the plurality of traces embedded in the molding material without affecting the width of the traces.

Abstract: A millimeter wave transceiver including a plate forming an interposer having its upper surface supporting an interconnection network and having its lower surface intended to be assembled on a printed circuit board by bumps; an integrated circuit chip assembled on the upper surface of the interposer; antennas made of tracks formed on the upper surface of the interposer; and reflectors on the upper surface of the printed circuit board in front of each of the antennas, the effective distance between each antenna and the reflector plate being on the order of one quarter of the wavelength, taking into account the dielectric constants of the interposed materials.

Abstract: A semiconductor device has a semiconductor die with a plurality of bumps formed over a surface of the semiconductor die. A plurality of conductive traces is formed over a surface of the substrate with interconnect sites. A masking layer is formed over the surface of the substrate. The masking layer has a plurality of parallel elongated openings each exposing at least two of the conductive traces and permitting a flow of bump material along a length of the plurality of conductive traces within the plurality of elongated openings while preventing the flow of bump material past a boundary of the plurality of elongated openings. One of the conductive traces passes beneath at least two of the elongated openings. The bumps are bonded to the interconnect sites so that the bumps cover a top surface and side surface of the interconnect sites. An encapsulant is deposited around the bumps between the semiconductor die and substrate.

Abstract: A via structure includes a ground conductor, a floated conductor and a signal conductor. The ground conductor is electrically coupled to a reference potential. The floated conductor is electrically insulated from the ground conductor. The signal conductor is located between and insulated from the ground conductor and the floated conductor.

Abstract: The smart card (98A) comprises an external connector (90), which is formed of an insulating support (6) and a plurality of external metal contact pads (4) arranged on the external face of said insulating support. The card body has a housing in which the external connector is arranged and includes an electronic unit and/or an antenna electrically connected to a plurality of internal metal contact pads (20), which are arranged underneath the external connector and respectively aligned with the plurality of external metal contact pads. The plurality of external metal contact pads are respectively electrically connected to the plurality of internal metal contact pads by a plurality of metal parts (100), which are each at least partially formed by a solder material and which traverse said insulating support through respective apertures (92).

Abstract: A circuit board structure including a dielectric layer, a fine circuit pattern and a patterned conductive layer is provided, wherein the fine circuit pattern is embedded in a surface of the dielectric layer, and the patterned conductive layer is disposed on another surface of the dielectric layer and protrudes therefrom.

Abstract: The present description relates to the field of fabricating microelectronic assemblies, wherein a microelectronic device may be attached to a microelectronic substrate with a plurality of shaped and oriented solder joints. The shaped and oriented solder joints may be substantially oval, wherein the major axis of the substantially oval solder joints may be substantially oriented toward a neutral point or center of the microelectronic device. Embodiments of the shaped and oriented solder joint may reduce the potential of solder joint failure due to stresses, such as from thermal expansion stresses between the microelectronic device and the microelectronic substrate.

Abstract: Disclosed herein is a device comprising a first package having a first side with a plurality of connectors disposed thereon and a second package mounted on the first package by the connectors. A molding compound is disposed on the first side of the first package and between the first package and the second package. A plurality of stress relief structures (SRSs) are disposed in the molding compound, the plurality of SRSs each comprising a cavity free of metal in the molding compound and spaced apart from each of the plurality of connectors.

Abstract: An electrical system including (1) a printed circuit board including first and second signal pads located on a top surface of the printed circuit board and arranged to transmit a first differential signal, first and second signal vias extending through the printed circuit board and arranged to transmit the first differential signal, a first signal trace located on the top surface of the printed circuit board and connecting the first signal pad and the first signal via, and a second signal trace located on the top surface of the printed circuit board and connecting the second signal pad and the second signal via; and (2) a connector including first and second signal contacts arranged to transmit the first differential signal. The first differential signal transmitted through the printed circuit board and the connector has a common central axis.

Abstract: Various embodiments may provide a termination element for a radio frequency (RF) power amplifier module. The termination element may include a resistive body having a first end, a second end, and first and second edges running from the first end to the second end opposite one another. The termination element may further include a first ground contact coupling the first end of the resistive body to a ground potential, and a second ground contact coupling the second end of the resistive body to the ground potential. The termination element may further include a conductive contact extending into the resistive body through the first edge, wherein an end of the conductive contact that is closest to the second edge is remotely disposed from the second edge by a gap.