Abstract: An electronic device and its operating method are provided.

Abstract: A contact ribbon configured to connect a cable to a substrate includes a plurality of signal contacts, a ground plane, and at least one ground contact extending from the ground plane. The plurality of signal contacts are connected by a support member, and the support member is removable after the plurality of signal contacts are connected to the cable.

Abstract: The present disclosure relates to a telecommunications connector having cross-talk compensations, and a method of managing alien crosstalk in such a connector. In one example, the telecommunications connector includes electrical conductors arranged in differential pairs and a circuit board with conductive layers that provide a cross-talk compensation arrangement for applying capacitance between the electrical conductors. The circuit board includes conductive paths that provide capacitive coupling and a conductive plate that intensifies capacitive coupling of the electrical conductors. In another example, the telecommunications connector is used with a twisted pair system.

Abstract: An integrated device that includes a printed circuit board (PCB) and a package on package (PoP) device coupled to the printed circuit board (PCB). The package on package (PoP) device includes a first package that includes a first electronic package component (e.g., first die) and a second package coupled to the first package. The integrated device includes a first encapsulation layer formed between the first package and the second package. The integrated device includes a second encapsulation layer that at least partially encapsulates the package on package (PoP) device. The integrated device is configured to provide cellular functionality, wireless fidelity functionality and Bluetooth functionality. In some implementations, the first encapsulation layer is separate from the second encapsulation layer. In some implementations, the second encapsulation layer includes the first encapsulation layer.

Abstract: It is intended to reduce the price of a semiconductor device and increase the reliability thereof. In an interposer, a plurality of wiring layers are disposed between uppermost-layer wiring and lowermost-layer wiring. For example, a third wiring layer is electrically coupled directly to a first wiring layer as the uppermost-layer wiring by a long via wire extending through insulating layers without intervention of a second wiring layer. For example, an upper-surface terminal made of the first wiring layer is electrically coupled directly to a via land made of the third wiring layer by the long via wire. Between the adjacent long via wires, three lead-out wires made of the second wiring layer can be placed. The number of the lead-out wires that can be placed between the adjacent long via wires is larger than the number of the lead-out wires that can be placed between the adjacent via lands.

Abstract: A signal attenuation reduction structure for a flexible circuit board includes at least one conductive paste coating zone formed on surfaces of signal lines and an insulation layer formed on a dielectric layer of the flexible circuit board such that the conductive paste coating zone corresponds to at least one signal line or covers a plurality of signal lines. A resin-based conductive adhesive layer is formed on surfaces of the insulation layer and the conductive paste coating zone of the flexible circuit board. The resin-based conductive adhesive layer is pressed to bond between the conductive paste coating zone and a top insulation layer such that the conductive paste coating zone and the resin-based conductive adhesive layer achieve electrical connection therebetween.

Abstract: Electrical interconnects having a non-linear conductive pathway, and related apparatuses and methods, are disclosed herein. In some embodiments, an electrical interconnect may include a non-linear conductive pathway electrically coupling top and bottom conductive portions. In some embodiments, an electrical interconnect may include a non-linear conductive pathway that propagates an electrical signal generating electromagnetic fields with an electrical field orthogonal to the direction of electromagnetic-wave propagation. In some embodiments, an electrical interconnect may include a non-linear conductive pathway portion and a linear conductive pathway portion. Also disclosed are connectors including an electrical interconnect having a non-linear conductive pathway.

Abstract: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.

Abstract: Provided is an optical transmitter module. The optical transmitter module includes a substrate, a ground layer disposed on the substrate, an electro-absorption modulated laser (EML) chip disposed on the ground layer to generate an modulated optical signal, a ground structure disposed on the EML chip and electrically connected to the ground layer, a matching resistor disposed on the ground structure, and a first bonding wire disposed between the EML chip and the matching resistor to electrically connect the EML chip to the matching resistor.

Abstract: A semiconductor device has a semiconductor die mounted over the carrier. An encapsulant is deposited over the carrier and semiconductor die. The carrier is removed. A first interconnect structure is formed over the encapsulant and a first surface of the die. A second interconnect structure is formed over the encapsulant and a second surface of the die. A first protective layer is formed over the first interconnect structure and second protective layer is formed over the second interconnect structure prior to forming the vias. A plurality of vias is formed through the second interconnect structure, encapsulant, and first interconnect structure. A first conductive layer is formed in the vias to electrically connect the first interconnect structure and second interconnect structure. An insulating layer is formed over the first interconnect structure and second interconnect structure and into the vias. A discrete semiconductor component can be mounted to the first interconnect structure.

Abstract: A method for determining a loading current of a circuit board is provided. In the method, outline positions of metal regions and hollowed regions in each of the metal regions are recorded. Metal widths corresponding to scan lines in circuit board are calculated in a sequence, so that a minimum metal width on each of the scan lines is acquired. According to the minimum metal width, a maximum loading current of each of the metal regions is calculated. In addition, a method and a system for filtering manufacturers are provided. A processing apparatus of the system analyzes the maximum loading current and manufacturing process parameters of the circuit board, calculates a weight score of a manufacturing process capability parameter table of each manufacturer according to the maximum loading current and manufacturing process parameters, and filtering the manufacturers to produce the best fit manufacturer list.

Abstract: In accordance with embodiments of the present disclosure, a circuit board may include a first trace formed in a first layer of the circuit board, a second trace formed in a second layer of the circuit board, a via, and a termination pad. The via may be configured to electrically couple the first trace to the second trace, the via comprising a via stub corresponding to a first portion of a length of the via not within a second portion of the via between a first location in which the first trace is electrically coupled to the via and a second location in which the second trace is electrically coupled to the via. The termination pad may be formed at an end of the via stub opposite at least one of the first location and the second location.

Abstract: Some embodiments relate to micro vias in printed circuit boards (PCBs). In an example, a PCB may include a PCB substrate and a micro via. The micro via may extend between opposing surfaces of the PCB substrate and may have a diameter less than or equal to about 100 microns. In another example, a method of forming micro vias in a PCB may include forming a through hole in a PCB substrate of the PCB. The method may also include positioning a pillar that is electrically conductive within the through hole. The method may also include backfilling the through hole around the pillar with an epoxy backfill.

Abstract: A method for packaging a semiconductor device used in an electronic apparatus having wireless charging function is provided. The method includes coupling a semiconductor device and a coil over a redistribution layer. The method further includes forming a molding material over the semiconductor device and the coil. The method also includes forming a conductive metal slot over the molding material. An opening is formed on the conductive metal slot for allowing magnetic flux to pass through.

Abstract: An apparatus comprising a printed circuit board (PCB) that includes: a multilayer lamination of layers; vias on a surface of the PCB; and bonding pads that couple a ball grid array of an integrated circuit (IC) package to layers through the vias, wherein the bonding pads includes: first bonding pads in a first area of the PCB, each first bonding pad being coupled to a via of the vias in the first area, second bonding pads arranged in a second area of the PCB, each second bonding pad being coupled to a via of the vias in the second area, and third bonding pads arranged in a third area of the PCB, each third bonding pad being coupled to two or more vias of the vias in the third area, wherein the third area is located between the first area and the second area is disclosed.

Abstract: A signal attenuation reduction structure for a flexible circuit board includes at least one conductive paste coating zone formed on surfaces of signal lines and an insulation layer formed on a dielectric layer of the flexible circuit board such that the conductive paste coating zone corresponds to at least one signal line or covers a plurality of signal lines. An anisotropic conductive film is formed on surfaces of the insulation layer and the conductive paste coating zone of the flexible circuit board. The anisotropic conductive film is pressed to bond between the conductive paste coating zone and a shielding layer such that the conductive paste coating zone and the shielding layer achieve electrical connection therebetween in a vertical direction through the anisotropic conductive film.

Abstract: Due to size and cost, it becomes advantageous for integrated circuit (IC) manufacturers to use “single-ended” (one signal path per unique information path) high speed signals electrical contact pins (pins transmitting digital information that connect the integrated circuit to a printed circuit board) with a minimum number of surrounding powers and grounds. This lower cost method, however, creates electrical interference and coupling issues known as crosstalk between two adjacent signal paths in the via structure required to electrically connect the integrated circuit to the signal paths in the printed circuit board. Such crosstalk, in turn, increases jitter, degrades timing, and ultimately reduces the maximum operating speed of the circuit (performance). This disclosure presents a structure using micro-plating, micro-drilling and micro-machining methods that isolates adjacent signals by placing a metal barrier that shunts coupling currents to ground.

Abstract: There is provided a printed circuit board including: a first insulating layer; a first circuit pattern formed on a first surface of the first insulating layer; an adhesive layer provided on a second surface of the first insulating layer; and an electronic component disposed on the adhesive layer and enclosed by the first insulating layer and a second insulating layer formed on the first insulating layer.

Abstract: A multi-chip semiconductor apparatus includes a plurality of semiconductor chips stacked and packaged therein, wherein each of the semiconductor chips includes: a through-silicon via (TSV) formed through the semiconductor chip; a probe pad exposed to an outside of the semiconductor chip so as to enable a probing test; a bump pad exposed to the outside of the semiconductor chip and electrically connected to the TSV; and a conductive layer electrically connecting the probe pad and the bump pad inside the semiconductor chip.

Abstract: An interconnect structure is provided in which a seed enhancement spacer is present on vertical surfaces, but not a horizontal surface, of a diffusion barrier liner that is located in an opening present in an interconnect dielectric material layer. An interconnect metal or metal alloy structure is present on physically exposed sidewalls of the seed enhancement spacer and on the physically exposed horizontal surface of the diffusion barrier liner.

Abstract: A substrate structure is provided, including a substrate body having a conductive pad, an insulation layer formed on the substrate body and exposing the conductive pad, a conductive pillar disposed on the conductive pad, and a metal pad disposed on the insulation layer and electrically connected to the conductive pillar. A conductive component can be coupled to the metal pad. During a high-temperature process, the conductive pillar and the metal pad disperse the remaining stress generated due to heat, thereby preventing the conductive component from being cracked.

Abstract: A wearable portable electronic device includes at least one energy module which further included thermoelectric materials which may convert heat to electric power. A plurality of heat spreader thermally and electronically contact to at least one wall of an enclosure of the wearable portable electronic device by using graphene layer.

Abstract: A circuit board structure includes a first circuit board, a second circuit board and a plurality of first connection portions. The first circuit board has a first opening, and the second circuit board is disposed inside the first opening of the first circuit board. The first circuit board and the second circuit board are electrically independent from each other. The first connection portions are connected to the first circuit board and the second circuit board.

Abstract: A display apparatus may include a display substrate having a display region and a pad region adjacent to the display region; a first pad row in the pad region, the first pad row including a first pads and a second pads which are aligned along a first direction, center points of the first pads being at a first position in a second direction crossing the first direction, center points of the second pads being at a second position spaced apart from the first position in the second direction, the first and second types of pads being alternately arranged; and a second pad row in the pad region, the second pad row being adjacent to the first pad row in the second direction, the second pad row including a plurality of pads aligned along the first direction.

Abstract: A multilayer wiring plate includes a coaxial wire includes a signal line, an insulation coating and an outer peripheral conductor. An insulating layer is arranged on an inner or outer layer side. A metal film circuit is arranged by the intermediary of the insulating layer, and the metal film circuit and the outer peripheral conductor and signal line of the coaxial wire are connected. A signal line connection part that connects the signal line to the metal film circuit includes a penetration hole A that passes through the insulating layer and the outer peripheral conductor; the coaxial wire from which the outer peripheral conductor is removed inside the penetration hole A; a hole filling resin filled inside the penetration hole A; a penetration hole B that passes through the hole filling resin and the signal line; and a plated layer arranged on an inner wall of the penetration hole B.

Abstract: To achieve an interposer being capable of corresponding to a variety of pitch conversions and being inexpensive as compared to the one in the related art. An interposer including a resin lamination including connection terminals for a main board on one surface, and a glass sheet that is fixed along another surface of the resin lamination, the glass sheet having an exposed portion exposed from the resin lamination, the exposed portion being at least a part of a surface not facing to the resin lamination, the glass sheet including connection terminals for a semiconductor device on a surface of the exposed portion, and wiring being formed on a surface of the exposed portion to interconnect the connection terminals with an edge of the exposed portion.

Abstract: Disclosed herein is a device comprising a first package having a first side with a plurality of connectors disposed thereon and a second package mounted on the first package by the connectors. A molding compound is disposed on the first side of the first package and between the first package and the second package. A plurality of stress relief structures (SRSs) are disposed in the molding compound, the plurality of SRSs each comprising a cavity free of metal in the molding compound and spaced apart from each of the plurality of connectors.

Abstract: A display apparatus includes a display panel displaying an image using a light and a backlight unit generating the light, providing the light to the display panel and including a plurality of light source units generating the light and a plurality of light source substrates arranged in a first direction and disposed on the plurality of light source substrates where the plurality of light source substrates have a zigzag shape, and the plurality of light source units are disposed at predetermined areas of bending portions of the zigzag shape.

Abstract: A wiring substrate includes a flexible insulation substrate, a first wiring layer formed on an upper surface of the insulation substrate, a second wiring layer formed on a lower surface of the insulation substrate, and through wiring bonded to the first wiring layer and the second wiring layer and formed in a through hole extending through the first wiring layer, the insulation substrate, and the second wiring layer. The through wiring includes a projection that extends along a lower surface of the second wiring layer located outside the through hole. An upper surface of the through wiring is flush with an upper surface of the first wiring layer.

Abstract: A PCB having multiple stacked layers laminated together. The laminated stack includes regular flow prepreg and includes a recessed cavity, a bottom perimeter of which is formed by a photo definable, or photo imageable, polymer structure, such as a solder mask frame, and a protective film. The solder mask frame and protective film protect inner core circuitry at the bottom of the cavity during the fabrication process, as well as enable the use of regular flow prepreg in the laminated stack.

Abstract: A semiconductor package structure includes a substrate, a semiconductor chip, and a solder material. The substrate includes an insulating layer, a conductive circuit layer, and a conductive bump. The conductive circuit layer is recessed from a top surface of the insulating layer. The conductive circuit layer includes a pad, and a side surface of the pad extends along a side surface of the insulating layer. The conductive bump is disposed on the pad. A side surface of the conductive bump, a top surface of the pad and the side surface of the insulating layer together define an accommodating space. A solder material electrically connects the conductive bump and the semiconductor chip. A portion of the solder material is disposed in the accommodating space.

Abstract: A durable flexible circuit board for a transparent display board is connected between a driver board provided with at least one of a power supply and a controller and a transparent plate provided with a plurality of light emitting elements. The flexible circuit board includes an electrode bonding portion provided with a plurality of signal connection terminals for transferring control signals, at least one power connection terminal for transferring electric power, and at least one dummy terminal disposed outside the signal connection terminal or the power connection terminal disposed at the outermost side. The dummy terminal resists vibration and pressure applied to the signal connection terminal or the power connection terminal disposed at the outermost side. The signal connection terminal and the power connection terminal are integrated in the flexible circuit board.

Abstract: The electrical connector assembly includes an electrical connector and a module spacer. The electrical connector is installed on a circuit board and defines a mating space. The module spacer includes a cover covering on the mating space in a vertical direction and four side walls extending downwardly from the cover. The cover and the side walls defines a receiving space for retaining the electrical connector. The side walls are supported on the circuit board.

Abstract: Solder pads, systems, and related methods are provided. A first or second pad include at least one shape for increasing a number of edges available to align at least one part to be soldered thereto. Each solder pad can occupy a same surface area of the substrate. A plurality of circuit elements can be provided over the plurality of solder pads, where some of the circuit elements occupy different surface areas of the substrate and/or the solder pad. A method of providing a solder pad includes providing a substrate, providing a solder pad over the substrate, and providing at least one shape in the solder pad for increasing a number of edges available to align at least one part to be soldered thereto. The pads can attach for example to a surface-mount ceramic component, a submount-free component, a leadframe component and/or a chip on board component.

Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first metal pillar, a second metal pillar, and an insulating layer. The semiconductor layer includes a first surface, a second surface, and a light emitting layer. The first metal pillar is electrically connected to the second surface. The first metal pillar includes first and second metal layers. The first metal layer is provided between the second surface and at least a part of the second metal layer. The second metal pillar is arranged side by side with the first metal pillar, and electrically connected to the second surface. The second metal pillar includes third and fourth metal layers. The third metal layer is provided between the second surface and at least a part of the fourth metal layer. The insulating layer is provided between the first and second metal pillars.

Abstract: In some examples, an integrated circuit system includes a plurality of integrated circuit layers. At least one of the integrated circuit layers includes an integrated circuit die, which may not include any through-silicon vias that provide a pathway to an adjacent integrated circuit layer, and an interposer portion, which includes electrically conductive through-vias. The interposer portion may facilitate communication of the integrated circuit die with other integrated circuit layers of the integrated circuit system. In some examples, the stacked integrated circuit system may include more than one integrated circuit die, which may be in the same integrated circuit layer as at least one other integrated circuit die, or may be in a different integrated circuit layer.

Abstract: A signal attenuation reduction structure for a flexible circuit board includes a conductive paste coating zones formed on surfaces of high-frequency signal lines and an insulation layer formed on a dielectric layer of the flexible circuit board such that the conductive paste coating zone corresponds to a pair of high-frequency signal lines or covers a plurality of pairs of the high-frequency signal lines. An anisotropic conductive film is formed on surfaces of the insulation layer and the conductive paste coating zone of the flexible circuit board. The anisotropic conductive film is pressed to bond between the conductive paste coating zone and a shielding layer such that the conductive paste coating zone and the shielding layer achieve electrical connection therebetween in a vertical direction through the anisotropic conductive film.

Abstract: A wiring board is provided which includes an insulating layer; and a frame body disposed on the insulating layer. The frame body is provided with a through-hole. The insulating layer has a concave portion in one main surface on a frame body side. In a plan view of the wiring board, the concave portion has a first portion positioned at the through-hole, and a second portion which is positioned at the frame body and is continuous with the first portion. An air gap is formed between the frame body and the insulating layer in the second portion.

Abstract: Methods of fabricating tamper-respondent assemblies are provided which include a tamper-respondent electronic circuit structure. The tamper-respondent electronic circuit structure includes a tamper-respondent sensor. The tamper-respondent sensor includes, for instance, at least one flexible layer having opposite first and second sides, and circuit lines forming at least one resistive network. The circuit lines are disposed on at least one of the first or second side of the at least one flexible layer, and have a line width Wl?200 ?m, as well as a line-to-line spacing width Ws?200 ?m. In certain enhanced embodiments, the tamper-respondent sensor includes multiple flexible layers, with a first flexible layer having first circuit lines, and a second flexible layer having second circuit lines, where the first and second circuit lines may have different line widths, different line-to-line spacings, and/or be formed of different materials.

Abstract: A semiconductor device and a method for fabricating thereof are provided. In the method for fabricating the semiconductor device, at first, a first semiconductor wafer including a first oxide layer and a second semiconductor wafer including a second oxide layer are provided. Next, the second oxide layer is bonded with the first oxide layer. Then, a through via is formed to through the second oxide layer and the first oxide layer, so as to form a sidewall cut on a sidewall of the through via at an interface of the first oxide layer and the second oxide layer. Then, an ashing operation is performed on the sidewall of the through via to form a protection layer on the sidewall of the through via. After the ashing operation is performed, a conductive material is deposited on the through via.

Abstract: A communication plug including a substrate having a top surface, a bottom surface, opposing side surfaces and opposing end surfaces, a grounding plane in the substrate, a grounding strip on a side surface of the substrate in electrical communication with the grounding plane, where the grounding strip is electrically connected to the ground plane in the substrate.

Abstract: A wiring body includes a first conductor layer including a first conductor wire, a resin layer covering the first conductor layer, and a second conductor layer disposed on the first conductor layer through the resin layer and including a second conductor wire. The wiring body satisfies the formula |H1?H2|<T1/3 where H1 is a maximum height of the second conductor wire in a first region corresponding to the first conductor wire in a first predetermined sectional surface crossing the wiring body along the second conductor wire, H2 is a minimum height of the second conductor wire in a second region that is adjacent to the first region and has the same width as that of the first region in the first predetermined sectional surface, and T1 is a thickness of the first conductor wire in the first predetermined sectional surface.

Abstract: A wiring structure includes a plurality of wiring patterns. An interval between the adjacent wiring patterns is shortened in the parallel wiring portions. In wiring path change portions, the wiring patterns are extended at a slope with respect to an X direction, and an interval between the adjacent wiring patterns is more widened than the interval. A crosstalk noise can be reduced by widening the interval between the wiring patterns using the wiring path change portions without making an area occupied by a wiring region extremely increased.

Abstract: According to embodiments of the invention, an electronic component assembly may be provided. The electronic component assembly may include an electronic component body. The electronic component assembly may also include one or more elastic members affixed to the electronic component body. The electronic component assembly may also include a catch mechanism affixed to each elastic member adapted to allow insertion of the elastic member and the catch mechanism through a hole of a circuit board in an extended position, and upon release from the extended position, hold the electronic component body in a fixed position by the tension of the elastic member and the catch mechanism grasping an edge of a surface of the circuit board opposite a surface upon which the electronic component body rests.

Abstract: Contact structures for devices, where contacts in the contact structures provide a proper normal force while consuming a minimal amount of surface area, depth, and volume in a device and where the contact structures prevent or limit the ingress of fluid or debris into the device. On example may provide a contact structure having a frame. The frame may be arranged to be placed in an opening in a device enclosure for an electronic device or the frame may be part of the electronic device. The frame may include a number of passages, each passage for a contact of the contact structure. Each contact may be held to the frame by a pliable membrane. Each contact may connect to a board in the electronic device via a compliant conductive path.

Abstract: A rigid flex board module includes a rigid flex circuit board and a high-density interconnected circuit board. The rigid flex circuit board includes a flexible circuit board, a first rigid circuit board and a first adhesive layer. The flexible circuit board includes a bending portion and a jointing portion connected to the bending part. The rigid flex circuit board is disposed on the jointing portion to expose the bending portion. The first rigid circuit board electrically connects with the flexible circuit board. The first adhesive layer connects the first rigid circuit board and the jointing portion. The high-density interconnected circuit board is disposed in the first rigid circuit board and is electrically connected to the first rigid circuit board.

Abstract: The object of the present invention is to provide a printed circuit board formed with a cavity to mount a semiconductor chip.

Abstract: A semiconductor device and method for forming the semiconductor device is provided. The semiconductor device includes an integrated circuit having through vias adjacent to the integrated circuit die, wherein a molding compound is interposed between the integrated circuit die and the through vias. The through vias have a projection extending through a patterned layer and protrude from the patterned layer to expose tapered sidewalls.

Abstract: There are provided an electronic component module in which an external terminal is disposed outwardly from a mold part by a plating process and a manufacturing method thereof. The electronic component module includes a substrate, at least one electronic component mounted on the substrate, a mold part sealing the electronic component, and at least one connection conductor having one end bonded to one surface of the substrate and formed in the mold part so as to penetrate through the mold part. The connection conductor is formed to have a form in which horizontal cross-sectional areas of the connection conductor are gradually reduced toward the substrate and includes at least one step.

Abstract: A display panel includes a display configured to display an image by receiving a drive signal, and a pad region including first and second pads groups configured to receive the drive signal from an external and to provide the received drive signal to the display, wherein the first pad group includes a plurality of first pads extending along a plurality of first imaginary lines, wherein the second pad group includes a plurality of second pads extending along a plurality of second imaginary lines, and wherein the plurality of first imaginary lines converges into a first point and the plurality of second imaginary lines converges into a second point, the first point and the second point are located at different positions.