Abstract: A method for forming conductive electrode patterns of a solar cell is provided. The method includes preparing a glass substrate and forming a transparent conductive oxide film (TCO) on the glass substrate. Then, a titanium oxide (TiO2) layer and a silver (Ag) electrode are formed on the glass substrate. A nickel (Ni) layer is formed on the Ag electrode and a copper (Cu) layer is formed on the Ni layer. In addition, a tin (Sn) layer is formed on the Cu layer.

Abstract: Disclosed is a wired electrode of touch screen panel for transmitting a touch signal sensed by a signal sensing pattern of touch screen panel to an external driving circuit, wherein the wired electrode formed on a substrate includes at least one curved portion, and a plurality of fine protrusions are formed on an inner surface of a groove of a resin layer on the substrate. The groove is filled with a conductive material to form the wired electrode.

Abstract: The disclosure relates generally to integrated circuits (IC), IC interconnects, and methods of fabricating the same, and more particularly, high performance inductors. The IC includes at least one trench within a dielectric layer disposed on a substrate. The trench is conformally coated with a liner and seed layer, and includes an interconnect within. The interconnect includes a hard mask on the sidewalls of the interconnect.

Abstract: Frost-free surfaces and methods for manufacturing such surfaces are described. The frost-free surfaces reduce ice build-up, prevent vapor condensation and reduce adhesion force between ice and a solid substrate. The surfaces can be on parts used in devices where superhydrophobic properties may be obtained post or during device manufacturing. The superhydrophobic properties are the result of aluminum oxide clusters made on such surfaces.

Abstract: The purpose of the present invention is to grasp the state in which hydrophilic groups of an electrolyte are distributed in a reaction layer for fuel cells. Nitric acid groups are bonded to hydrophilic groups (sulfonic acid groups) contained in a reaction layer for fuel cells, and metal ions capable of forming a nitrosyl complex with the nitric acid groups, e.g., ruthenium ions, are introduced into the reaction layer to dye the nitric acid groups bonded to the hydrophilic groups contained in the reaction layer. When the hydrophilic groups have agglomerated, the nitric acid groups bonded thereto also agglomerate. When said nitric acid groups are dyed with ruthenium, the ruthenium also agglomerates to make it possible to examine said nitric acid groups with an electron microscope.

Abstract: Capacitor structures for integrated circuit devices are provided. Capacitors include proximate dense or highly dense etchstop layers. The dense or highly dense etchstop layer is, for example, a high-k material. Capacitors are, for example, metal-insulator-metal (MIM) capacitors and are useful in DRAM (dynamic random access memory) and eDRAM (embedded dynamic random access memory) structures.

Abstract: A flexible circuit board comprises a substrate which has a polyimide layer recessed to define at least a compartment. The compartment includes an inner wall surface having a side wall and a bottom wall. The compartment is for containing a multilayer unit, wherein the multilayer unit includes an adhesion enhancing layer formed on the wall of the compartment, a first electrically conducting layer disposed on the adhesion enhancing layer, and a second electrically conducting layer formed on the first electrically conducting layer. The adhesion enhancing layer is palladium. The first electrically conducting layer is nickel. The substrate is composed of polyimide (PI).

Abstract: A method of metallizing the surface of a substrate electrolessly, by spraying one or more oxidation-reduction solutions thereonto. The steps of this method include: a) physical or chemical treatment to reduce the surface tension of the substrate before metallization; b) electroless metallization of the surface of the substrate treated in step a), by spraying one or more oxidation-reduction solutions in the form of one or more aerosols thereonto; and c) formation of a top coat on the metallized surface. Compact devices for implementing this method and the products obtained are also disclosed.

Abstract: Methods of electroplating metal on a substrate while controlling azimuthal uniformity, include, in one aspect, providing the substrate to the electroplating apparatus configured for rotating the substrate during electroplating, and electroplating the metal on the substrate while rotating the substrate relative to a shield such that a selected portion of the substrate at a selected azimuthal position dwells in a shielded area for a different amount of time than a second portion of the substrate having the same average arc length and the same average radial position and residing at a different angular (azimuthal) position. For example, a semiconductor wafer substrate can be rotated during electroplating slower or faster, when the selected portion of the substrate passes through the shielded area.

Abstract: For use for a circuit board where a through hole and a blind via hole co-exist, an electrolytic copper plating bath in which the covering power for the through hole and the plugging performance for the blind via hole are sufficient, and an electroplating method that uses the electrolytic copper plating bath, are disclosed. The electrolytic copper plating bath is mainly composed of a water-soluble copper salt, sulfuric acid and chloride ions. A polyamide polyamine, obtained on processing by heating of an epichlorohydrin modified product of a polycondensation product of diethylene triamine, adipic acid and ?-caprolactam, is contained in the bath as a leveler.

Abstract: Provided is a method for manufacturing a surface acoustic wave apparatus that can reduce degradation of electric characteristics and also reduce the number of manufacturing processes. The method for manufacturing a surface acoustic wave apparatus includes the steps of: forming an IDT electrode on an upper surface of a piezoelectric substrate, forming a frame member surrounding a formation area in which the IDT electrode is formed on the piezoelectric substrate, and mounting a film-shaped lid member on the upper surface of the frame member so as to be joined to the frame member so that a protective cover, used for covering the formation area and for providing a tightly-closed space between it and the formation area, is formed.

Abstract: A method for fabricating a heat sink may include: providing a carbon fiber fabric having carbon fibers and openings, the openings leading from a first side to a second side of the fabric; and electroplating the fabric with metal, wherein metal is deposited with a higher rate at the first side than at the second side of the fabric. Another method for fabricating a heat sink may include: providing a carbon metal composite having metal-coated carbon fibers and openings, the openings leading from a first side to a second side of the carbon metal composite; disposing the composite over a semiconductor element such that the first side of the composite faces the semiconductor element; and bonding the composite to the semiconductor element by means of an electroplating process, wherein metal electrolyte is supplied to an interface between the carbon metal composite and the semiconductor element via the openings.

Abstract: The invention discloses a chemical plating product and method forming thereof, the chemical plating product includes an insulating member (1) and a metal coating covering the insulating member (1), the metal coating includes a pre-plating scope (2) formed by a coating catalyst and a chemical copper layer (3) covering the pre-plating scope (2).

Abstract: passivation layer by oxidation of the surface of the metal substrate; incorporating inorganic luminescent particles within the metal substrate passivation layer, the average particle size being in the range from 4 to 1,000 nm; and clogging the passivation layer.

Abstract: A component of a substrate processing apparatus that performs plasma processing on a substrate includes a base mainly formed of an aluminum alloy containing silicon. A film is formed on the surface of the base by an anodic oxidation process which includes connecting the component to an anode of a power supply and immersing the component in a solution mainly formed of an organic acid. The film is impregnated with ethyl silicate.

Abstract: A method for electrofilling large, high aspect ratio recessed features with copper without depositing substantial amounts of copper in the field region is provided. The method allows completely filling recessed features having aspect ratios of at least about 5:1 such as at least about 10:1, and widths of at least about 1 ?m in a substantially void-free manner without depositing more than 5% of copper in the field region (relative to the thickness deposited in the recessed feature). The method involves contacting the substrate having one or more large, high aspect ratio recessed features (such as a TSVs) with an electrolyte comprising copper ions and an organic dual state inhibitor (DSI) configured for inhibiting copper deposition in the field region, and electrodepositing copper under potential-controlled conditions, where the potential is controlled not exceed the critical potential of the DSI.

Abstract: A surface of an object to be plated is subjected to a treatment for palladium catalyst impartation to impart a palladium catalyst to the surface of an insulating part thereof. A palladium conductor layer is formed on the insulating part from a solution for palladium conductor layer formation which contains a palladium compound, an amine compound, and a reducing agent. On the palladium conductor layer is then directly formed a copper deposit by electroplating. Thus, the work is converted to a conductor with the solution for palladium conductor layer formation, which is neutral, without using an electroless copper plating solution which is highly alkaline. Consequently, the polyimide is prevented from being attacked and no adverse influence is exerted on adhesion. By adding an azole compound to the solution for palladium conductor layer formation, a palladium conductor layer is prevented from depositing on copper.

Abstract: A method for manufacturing a compound part comprises preparing a cavity in a receiving part, selecting a resin for application in the receiving part, applying the resin into the cavity, curing the applied resin, and simultaneously finishing the receiving part and the cured resin.

Abstract: Processes and systems for electrolytically processing a microfeature workpiece with a first processing fluid and a counter electrode are described. Microfeature workpieces are electrolytically processed using a first processing fluid, a counter electrode, a second processing fluid, and an anion permeable barrier layer. The anion permeable barrier layer separates the first processing fluid from the second processing fluid while allowing certain anionic species to transfer between the two fluids.

Abstract: Pressure maskers for masking at least one passageway of an article include a body portion that surrounds at least a portion of the article around the at least one passageway, at least one fluid inlet connected to the body portion that provides a conduit for pressurized masking fluid to pass from an exterior of the pressure masker to an interior of the pressure masker, wherein the article is at least partially disposed within the interior of the pressure masker, and at least one seal that seals the body portion at least partially around the article such that the pressurized masking fluid that enters the interior of the pressure masker is at least partially forced through the at least one passageway.

Abstract: There is provided a method for producing a surface-treated metallic material, by use of which a metallic material having a stable and excellent sliding characteristic can be produced with a low environmental load without covering the metallic material surface with an oxide film. The method for producing a surface-treated metallic material includes immersing an anode and a cathode in an electrolyte solution, placing a metallic material used as a material to be treated above the surface of the electrolyte solution, and applying a voltage between the anode and the cathode to treat the metallic material surface, the voltage being equal to or higher than a voltage for causing a complete plasma state.

Abstract: A method of producing a multicolor surface is described herein. The method includes the following steps: providing an aluminum-based substrate having an outer and inner surfaces; performing a mechanical process on the substrate; forming at least one fixing portion on the inner surface of the substrate; forming at least one conductive hole on the fixing portion; performing a first anodization on the substrate to form a first oxide layer that can be dyed with a first color on the outer surface of the substrate; removing at least some of the first oxide layer from the fixing portion and the outer surface of the substrate; performing a second anodization on the substrate to form a second oxide layer that can be dyed with a second color on the exposed outer surface of the substrate stripped of the first oxide layer; and removing the fixing portion.

Abstract: Disclosed are pre-wetting apparatus designs and methods. These apparatus designs and methods are used to pre-wet a wafer prior to plating a metal on the surface of the wafer. Disclosed compositions of the pre-wetting fluid prevent corrosion of a seed layer on the wafer and also improve the filling rates of features on the wafer.

Abstract: The present invention relates to a method for manufacturing Ni/In/Sn/Cu multilayer structure, in which a Ni/In/Sn/Cu multilayer structure is formed between a first substrate (copper substrate) and a second substrate (such as silicon wafer), and further, a plurality of intermetallic layers are formed in the Ni/In/Sn/Cu multilayer structure through a reflow bonding process and an aging heat treatment, wherein the intermetallic layers comprises a first intermetallic layer of (Cu,Ni)6(Sn,In)5, a second intermetallic layer of (Cu,Ni)6(Sn,In)5 and a third intermetallic layer of (Cu,Ni)3(Sn,In)4. Therefore, the formed intermetallic layers makes the Ni/In/Sn/Cu multilayer structure performs good wettability, ductility, creep resistance, and fatigue resistance.

Abstract: An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.

Abstract: A method or process is disclosed for etching deep, high-aspect ratio features into silicon dioxide material layers and substrates, including glass, fused silica, quartz, or similar materials, using a plasma etch technology. The method has application in the fabrication and manufacturing of MEMS, microelectronic, micro-mechanical, photonic and nanotechnology devices in which silicon dioxide material layers or substrates are used and must be patterned and etched. Devices that benefit from the method described in this invention include the fabrication of MEMS gyroscopes, resonators, oscillators, microbalances, accelerometers, for example. The etch method or process allows etch depths ranging from below 10 microns to over 1 millimeter and aspect ratios from less than 1 to 1 to over 10 to 1 with etched feature sidewalls having vertical or near vertical angles. Additionally, the disclosed method provides requirements of the etched substrates to reduce or eliminate undesired effects of an etch.

Abstract: The present invention relates to electrodepositable coating compositions that produce cured coatings that exhibit resistance to cratering. The coating compositions include an active hydrogen-containing cationic salt group-containing polymer; and 0.1 to 20 percent by weight, based on the total weight of resin solids in the coating composition, of an ungelled acrylic polymer.

Abstract: According to embodiments of the present invention, a method for forming a composite film is provided. The method includes providing a nanowire forming template, forming a plurality of nanowires through the nanowire forming template, removing material from a partial portion of the nanowire forming template to expose a portion of the plurality of nanowires, and forming a polymeric film between the plurality of nanowires to form a composite film.

Abstract: The present invention provides a circuit creation technology that improves conductive line manufacture by adding active and elemental palladium onto the surface of a substrate. The palladium is disposed in minute amounts on the surface and does not form a conductive layer by itself, but facilitates subsequent deposition of a metal onto the surface, according to the pattern of the palladium, to form the conductive lines.

Abstract: The present disclosure generally relates to techniques for electro-depositing nano-patterns. More specifically, systems and methods for fabricating periodic structures in complex nano-patterns are described. An electrical signal may be applied to one or more electrodes that are positioned about a surface of a substrate. The periodicity of the deposited pattern may be influenced by one or more parameters associated with an applied electrical signal, including one or more of frequency, amplitude, period, duty cycle, etc. The weight of each deposited line on the substrate may be influenced by the described parameters, and the shape of the pattern may be influenced by the number, shape, and position of electrodes.

Abstract: Stable tin-free palladium catalysts are used to metalize through-holes of printed circuit boards. A stabilizer is included in the catalyst formulation which prevents precipitation and agglomeration of the palladium.

Abstract: A method of forming a channel layer of an electric device according to an embodiment is provided. First, a conductive substrate including an insulating layer on the substrate is provided. The conductive substrate and a metal to be plated are used as respective electrodes to carry out electroplating within an electrolyte solution. In this case, electrons provided by a tunneling current passing through the insulating layer from the conductive substrate are bonded with ions of the metal within the electrolyte solution to form a metal channel layer on the insulating layer.

Abstract: The present invention relates to building materials, particularly building materials for placement on the outside of buildings.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for interconnect structures embedded in a package assembly including a bridge. In one embodiment, a package assembly may include a package substrate, a bridge embedded in the package substrate and including a bridge substrate, and an interconnect structure including a via extending through the package substrate into a surface of the bridge substrate and configured to interface with a conductive feature disposed on or beneath the surface of the bridge substrate. The interconnect structure may be configured to route electrical signals between the conductive feature and a die mounted on the package substrate. Other embodiments may be described and/or claimed.

Abstract: Solar cells are produced using a method for producing solar cells, wherein silicon containing vitreous substrates is provided, wherein each substrate is provided with an electrically conductive material on at least one side thereof. In the method, at least a portion of each substrate is successively transported through an electrolytic solution that is present in an electrolytic bath, and the electrically conductive material as the cathode is connected during the transport of the substrates through the electrolytic bath for the purpose of electrodepositing material from the electrolytic solution onto the electrically conductive material during said transport, wherein the substrates are suspended from a conveyor element during transport and extend in the transport direction.

Abstract: A mechanism is provided for forming a nanodevice. A reservoir is filled with a conductive fluid, and a membrane is formed to separate the reservoir in the nanodevice. The membrane includes an electrode layer having a tunneling junction formed therein. The membrane is formed to have a nanopore formed through one or more other layers of the membrane such that the nanopore is aligned with the tunneling junction of the electrode layer. The tunneling junction of the electrode layer is narrowed to a narrowed size by electroplating or electroless deposition. When a voltage is applied to the electrode layer, a tunneling current is generated by a base in the tunneling junction to be measured as a current signature for distinguishing the base. When an organic coating is formed on an inside surface of the tunneling junction, transient bonds are formed between the electrode layer and the base.

Abstract: The invention relates to a coating mask (1) for electrolytically coating the piston ring groove (39) of a piston (38), which is made of an elastically deformable material and has openings (3 to 10) that are arranged axially and are distributed in a uniform manner over the periphery, into which rods (11 to 18) of an expansion device (19) can be introduced, the rods being arranged in a displaceable manner such that the expansion device (19) can increase the radial diameter of the coating mask (1) and also the inner opening (2) so that the piston (38) can be introduced into the inner opening (2). The radial diameter of the coating mask (1) is selected in such a manner that after the reduction of radial diameter of the coating mask (1) and the inner opening, the elastically tensed coating mask (1) presses sealing lips (44, 45) of the coating groove (37) against the piston (38), on both sides of the piston ring groove (39).

Abstract: A coil component 1 includes a thin-film coil layer including spiral conductors and bump electrodes 12a to 12d formed on a surface of the thin-film coil layer. The thin-film coil layer includes internal terminal electrodes 24a to 24d connected respectively to corresponding one ends of the spiral conductors, and a fourth insulating layer 15d covering the internal terminal electrode 24a to 24d and having openings ha to hd. Both a top surface TS and a side surface SS of each of the internal terminal electrodes 24a to 24d are exposed through the corresponding opening. The bump electrodes 12a to 12d are each brought into contact with both the top surface TS and side surface SS of each of the internal terminal electrodes 24a to 24d in the corresponding opening.

Abstract: Presented herein is a method of processing a device, comprising providing an electroplating bath having a leveler, the leveler having a total nitrogen-to-total carbon (TN/TOC) ratio of about 15% or less, bringing a substrate into contact with the electroplating bath, the substrate having a recess formed therein and electroplating the substrate to create a feature substantially free of voids in the substrate recess. Electroplating the substrate is performed for a time period about as long as an electrical response peak of the leveler, and optionally for at least 30 seconds. The leveler may optionally have at least one ingredient free of nitrogen and having a leveling functionality. One ingredient may be a benzene ring free of nitrogen. The leveler TN/TOC ratio is between about 3% and about 15%.

Abstract: The methods inhibit or reduce dimpling and voids during copper electroplating of through-holes with flash copper layers in substrates such as printed circuit boards. An acid solution containing reaction products of aromatic heterocyclic nitrogen compounds and epoxy-containing compounds is applied to the through-holes of the substrate followed by filling the through-holes with copper using a copper electroplating bath which includes additives such as brighteners and levelers.

Abstract: A metal surface treated to have two anodized layers or regions may be used in electronic devices. The surface treatment may include performing a first anodization process to create a first anodized layer, removing the first anodized layer at select locations, and performing a second anodization process to create a second anodized layer at the select locations. The first and second anodized regions may have different decorative properties, such as color, and different structural properties, such as degree of abrasion resistance. One of the anodization processes may be hard anodization and the other may be standard anodization.

Abstract: The process of forming a partial gold-plating pattern on a stainless substrate includes a first plating step, a second plating step, and a stripping step. In the first plating step, pretreatment is applied to a stainless substrate including opposite main planes and a processing site formed of a plane different from the main planes, after which a first gold-plating layer is formed all over the surface of the stainless substrate using a hydrochloric acid plating solution. In the second plating step, mask plating is used to form a second gold-plating layer on the first gold-plating layer that covers the processing site in a desired pattern, and in the stripping step, a portion of the first gold-plating layer in an area where there is none of the second gold-plating layer is stripped off using an alkaline stripping solution.

Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.

Abstract: The present invention relates to a plastic part (1) with selective metallization comprising at least one first non-metallized portion (7) made from a first plastic material that cannot be metallized by electroplating and at least one second metallized portion (9) made from a second metallizable plastic material, the first plastic material being a mixture of polycarbonate and of a semiaromatic polyester and the second plastic material being a polyamide.

Abstract: A method for making a printed wiring member including wire-bondable contact pads and wear-resistant connector pads, the method includes a) providing a blank printed wiring member comprising a copper foil laminated to a dielectric substrate; b) masking the blank printed wiring member to protect regions of the copper foil; c) removing copper in unprotected regions of the blank printed wiring member to form a patterned printed wiring member including contact pads and connector pads; d) depositing a nickel coating on the patterned printed wiring member; e) electrolytically depositing a hard gold layer on the nickel coating; and f) depositing palladium on a surface of the hard gold layer to improve bondability of the contact pads while preserving wear resistance of the connector pads.

Abstract: Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers.

Abstract: The present invention is directed to an electrodepositable coating composition comprising a bismuth salt and a stabilizing agent, and wherein the molar ratio of elemental bismuth to the stabilizing agent is not less than 1:0.25.

Abstract: A copper electroplating method including dipping a substrate in a copper electroplating solution, the substrate including a seed layer; and forming a copper electroplating layer on the seed layer, wherein the copper electroplating solution includes water, a copper supply source, an electrolytic material, and a first additive, the first additive includes a compound represented by Formula 1, below:

Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations.

Abstract: There is provided a method of manufacturing a wiring substrate. The method includes: (a) forming a first resist layer having first openings therein on a first surface of a support plate, forming first plated films in the first openings by an electrolytic plating method, and removing the first resist layer; (b) forming a second resist layer having second openings therein on the first surface of the support plate, forming second plated films in the second openings by an electrolytic plating method, and removing the second resist layer; (c) forming a wiring layer and an insulating layer such that the wiring layer is electrically connected to the first and second plated films; and (d) removing the support plate to expose the first and second plated films.