Using Plasma Patents (Class 216/67)
  • Patent number: 8372756
    Abstract: A process for selectively etching a material comprising SiO2 over silicon, the method comprising the steps of: placing a silicon substrate comprising a layer of a material comprising SiO2 within a reactor chamber equipped with an energy source; creating a vacuum within the chamber; introducing into the reactor chamber a reactive gas mixture comprising a fluorine compound, a polymerizable fluorocarbon, and an inert gas, wherein the reactive gas mixture is substantially free of added oxygen; activating the energy source to form a plasma activated reactive etching gas mixture within the chamber; and selectively etching the material comprising SiO2 preferentially to the silicon substrate.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: February 12, 2013
    Assignee: Air Products and Chemicals, Inc.
    Inventors: Glenn Michael Mitchell, Stephen Andrew Motika, Andrew David Johnson
  • Patent number: 8373086
    Abstract: Provided are a plasma processing apparatus and method. The plasma processing apparatus includes a chamber, an upper electrode, a lower electrode, a substrate support, and a movement member. The upper electrode is disposed at an inner upper portion of the chamber. The lower electrode faces the upper electrode at an inner lower portion of the chamber to support a substrate such that a bevel of the substrate is exposed in a substrate level etching process. The substrate support is disposed between the upper electrode and the lower electrode to support the substrate such that a central region of a bottom surface of the substrate is exposed in a substrate backside etching process. The movement member is configured to move the substrate support to separate the substrate from the substrate support in the substrate backside etching process.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: February 12, 2013
    Assignee: Charm Engineering Co., Ltd.
    Inventors: Hyoung Won Kim, Young Soo Seo, Chi Kug Yoon, Jun Hyeok Lee, Young Ki Han, Jae Chul Choi
  • Patent number: 8372754
    Abstract: A method for removing at least one photoresist defect is disclosed. The photoresist defect is exposed to a plasma produced from a source gas including oxygen and a non-oxidizing gas in a plasma reactor, wherein the oxygen is present in the source gas at from 1% by volume to about 89% by volume. The non-oxidizing gas includes a mixture of hydrogen and nitrogen, ammonia or combinations thereof. A method for processing a semiconductor device structure is also disclosed, as are embodiments of the source gas.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: February 12, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Robert J. Hanson, Siddartha Kondoju
  • Publication number: 20130033671
    Abstract: A method of conditioning a liquid crystal polymer (LCP) substrate for enhanced surface adhesion accomplished by exposing an LCP substrate to oxygen plasma. The plasma will chemically alter and modify the LCP substrate surface to promote increased adhesion of metal and subsequent LCP layers during lamination. Lamination is accomplished while dwelling under the melt temperature of the LCP substrate itself. A further method is disclosed of detecting impurities modified or deposited onto the LCP surface during plasma treatment.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 7, 2013
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Mark Schadt, Frank D. Egitto, Luis J. Matienzo
  • Publication number: 20130032574
    Abstract: The present invention relates to a capacitive-coupled plasma processing apparatus, wherein an electric field regulating element, i.e., an “electric field lens”, is arranged in the reaction chamber to generate a regenerated electric field in a direction opposite to that of the original radio frequency electric field in the reaction chamber, so that the non-uniformity of etching rate on the surface of the substrate of the plasma incurred by the original radio frequency electric field is decreased; and the electric field regulating element, i.e., the “electric field lens”, further decreases the equivalent quality factor Q value of the reaction chamber, expands the radio frequency band, and prevents high-voltage electric arcing. The present invention further provides a method for processing the substrate using the processing apparatus.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 7, 2013
    Inventors: Zhongdu Liu, Gerald Zheyao Yin
  • Patent number: 8366953
    Abstract: A plasma cleaning method is performed in a plasma CVD apparatus for depositing a silicon nitride film on a surface of a target substrate, and includes a stage (S1) of supplying a cleaning gas containing NF3 gas into a process container, thereby removing extraneous deposits formed on portions inside the process container; a stage (S2) of supplying a gas containing hydrogen gas into the process container and generating plasma thereof, thereby removing residual fluorine inside the process container; and a stage (S3) of supplying a gas containing a rare gas into the process container and generating plasma thereof, thereby removing residual hydrogen inside the process container.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: February 5, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masayuki Kohno, Tatsuo Nishita, Toshio Nakanishi
  • Publication number: 20130026136
    Abstract: This disclosure provides systems, methods and apparatus for fabricating electromechanical system devices within a plasma-etch reaction chamber. In one aspect, a plasma-etch system includes a plasma-etch reaction chamber, an inlet in fluid communication with the reaction chamber, a cathode positioned within the reaction chamber and a non-hollow anode positioned within the reaction chamber between the inlet and the cathode. The inlet is configured to introduce a process gas into the reaction chamber such that at least a portion of the process gas strikes an upper surface of the anode and is allowed to flow across the upper surface and around the edges of the anode. The anode can be a liner plate in place of a showerhead.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Applicant: QUALCOMM MEMS Technologies, Inc.
    Inventor: Teruo Sasagawa
  • Publication number: 20130026137
    Abstract: The invention relates to a device and a method for generating a pulsed (intermittent), cold, atmospheric pressure plasma, preferably a thread, for precise antimicrobial plasma treatment (antisepsis, disinfection, sterilization, decontamination) of very small surfaces and cavities, including on living human and animal bodies, preferably in the field of medicine, by means of a negative direct-current corona discharge, the device comprising at least one electrode for generating high field strengths, through or around which electrode the gas to be ionized flows in a gas channel, wherein the electrically conductive structure (surface, cavity) to be treated is used as the counter-electrode. Said plasma can also be used in general for cleaning, coating, activating, and etching surfaces.
    Type: Application
    Filed: November 27, 2010
    Publication date: January 31, 2013
    Applicant: Leibniz-Institut fuer Plasmaforschung und Technologie e.V.
    Inventors: Eckhard Kindel, Klaus-Dieter Weltmann, Norbert Lembke, Thomas Kocher
  • Publication number: 20130028829
    Abstract: Disclosed herein is a method of growth of enhanced adhesion MWCNTs on a substrate, referred to as the HGTiE process, the method comprising: chemical vapor deposition of an adhesive underlayer composed of alumina on a substrate composed of titanium or similar; chemical vapor deposition of a catalyst such as a thin film of iron on top of the adhesive underlayer; pretreatment of the substrate to hydrogen at high temperature; and exposure of the substrate to a feedstock gas such as ethylene at high temperature. The substrate surface may be roughened before placement of an adhesive layer through mechanical grinding or chemical etching. Finally, plasma etching of the MWCNT film may be performed with oxygen plasma. This method of growth allows for high strength adhesion of MWCNTs to the substrate the MWCNTs are grown upon.
    Type: Application
    Filed: July 28, 2011
    Publication date: January 31, 2013
    Inventors: John G. Hagopian, Stephanie A. Getty, Manuel A. Quijada
  • Patent number: 8361336
    Abstract: An imprint method for imprinting a pattern of a mold onto a resin material on a substrate. The imprint method includes a step of forming a processed area in which an imprint pattern corresponding to the pattern of the mold is formed, and an outside area formed of a periphery of the processed area, by bringing the mold into contact with the resin material formed on the substrate, so that a portion of the resin material is extruded from the processed area into the outside area, a step of forming a protection layer for protecting the processed area, and a step of removing a layer of the resin material in the outside area, while the imprint pattern formed on a layer of the resin material in the processed area, is protected by the protection layer, so as not to be removed.
    Type: Grant
    Filed: August 1, 2008
    Date of Patent: January 29, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shingo Okushima, Junichi Seki, Haruhito Ono, Nao Nakatsuji, Atsunori Terasaki
  • Patent number: 8361338
    Abstract: The embodiments of methods described in this disclosure for removing a hard mask layer(s) over a polysilicon layer of a gate stack after the gate stack is etched allows the complete removal of the hard mask layer without the assistance of photolithography. A dielectric material is deposited over the substrate with the gate stacks. The topography of the substrate is removed by chemical mechanical polishing first. Afterwards, an etching gas (or vapor) is used to etch a portion of the remaining dielectric layer and the hard mask layer. The etching gas forms an etch byproduct that deposits on the substrate surface and can be subsequently removed by heating. The etching and heating to remove etch byproduct are repeated until the hard mask layer is completed removed. Afterwards, the remaining dielectric layer is removed by wet etch. The methods described are simpler and cheaper to use than conventional methods for hard mask removal.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: January 29, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shiang-Bau Wang
  • Patent number: 8357262
    Abstract: Disclosed is a corrosion resistant member comprising a sintered material having an ?-Al2O3 crystal and an YAG (yttrium-aluminum-garnet) crystal. The corrosion resistant member contains metal elements, 70 to 98% by mass (inclusive) of Al in terms of Al2O3 and 2 to 30% by mass of Y in terms of Y2O3. The corrosion resistant member has a peak intensity ratio I116/I104 within the range from 0.94 to 1.98, preferably. 2.21 or higher, wherein I116 and I104 represent peak intensities attributed to the (116) face and the (104) face, respectively, of an ?-Al2O3 crystal as measured by X-ray diffractometry on its surface layer.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: January 22, 2013
    Assignee: Kyocera Corporation
    Inventors: Masahiro Nakahara, Tetsuji Hayasaki, Yoshihiro Okawa
  • Patent number: 8357615
    Abstract: The present invention is an apparatus for manufacturing a semiconductor device comprising: a process vessel including a stage on which a substrate is placed, the substrate having a low dielectric constant film with a resist pattern being formed in an upper layer of the low dielectric constant film; an etching-gas supply unit that supplies an etching gas into the process vessel so as to etch the low dielectric constant film; an ashing-gas unit means that supplies an ashing gas into the process vessel so as to ash the resist pattern formed in the upper layer of the low dielectric constant film after the low dielectric constant film has been subjected to an etching process; a plasma generating means that generates a plasma by supplying an energy to the etching gas and the ashing gas in the process vessel; a unit that supplies a dipivaloylmethane gas into the process vessel, after the low dielectric constant film has been subjected to an ashing process, in order to recover a damage layer of the low dielectric con
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: January 22, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Yuki Chiba, Eiichi Nishimura, Ryuichi Asako
  • Publication number: 20130015159
    Abstract: The invention relates to an apparatus for treating a surface with a at least one gliding arc source comprising at least one gas flow controlling unit (104); and a set of electrodes (102); wherein the at least one gas flow controlling unit (104) and the set of electrodes (102) are controlled to provide a plasma comprising a gas temperature at the set of electrodes (102) above approximately 2000 K. In this way, an optimal or substantially optimal plasma for treating surfaces of samples is achieved.
    Type: Application
    Filed: December 14, 2010
    Publication date: January 17, 2013
    Applicant: Danmarks Tekniske Universitet
    Inventor: Yukihiro Kusano
  • Publication number: 20130015158
    Abstract: The present invention provides a dry etching method capable of readily providing rounded top edge portions, called top rounds, at trenches and vias formed by removal of a dummy material. The method of the present invention is a dry etching method for forming trenches or vias by removing a dummy material with its periphery surrounded by an interlayer oxide film, which method includes the steps of etching the dummy material to a predetermined depth, performing isotropic etching after the dummy material etching, and removing remaining part of the dummy material after the isotropic etching.
    Type: Application
    Filed: August 16, 2011
    Publication date: January 17, 2013
    Inventors: Tomoyoshi Ichimaru, Kenichi Kuwabara, Go Saito
  • Patent number: 8354032
    Abstract: A method of manufacturing a mechanical part includes providing a substrate of micro-machinable material; etching, using photolithography, a pattern that includes said part through said entire substrate; assembling a clip on said part so that said part is ready to be mounted without the portion made of micro-machinable material having to be touched by a tool other than the clip; releasing the part from the substrate so as to mount said part in a device such as a timepiece movement.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: January 15, 2013
    Assignee: The Swatch Group Research and Development Ltd
    Inventors: Rudolf Dinger, Thierry Ravenel
  • Patent number: 8349202
    Abstract: Methods for bevel edge etching are provided. One example method is for etching a film on a bevel edge of a substrate in a plasma etching chamber. The method includes providing the substrate on a substrate support in the plasma etching chamber. The plasma etching chamber has a top edge electrode and a bottom edge electrode disposed to surround the substrate support. Then flowing an etching process gas through a plurality of edge gas feeds disposed along a periphery of the gas delivery plate. The periphery of the gas deliver plate is oriented above the substrate support and the bevel edge of the substrate, and the flowing is further directed to a space between the top edge electrode and bottom edge electrode. And, flowing a tuning gas through a center gas feed of the gas delivery plate.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: January 8, 2013
    Assignee: Lam Research Corporation
    Inventors: Tong Fang, Yunsang Kim, Andrew D. Bailey, III, Olivier Rigoutat, George Stojakovic
  • Patent number: 8349195
    Abstract: A method and system provide a magnetoresistive structure from a magnetoresistive stack that includes a plurality of layers. The method and system include providing a mask that exposes a portion of the magnetoresistive stack. The mask has at least one side, a top, and a base at least as wide as the top. The method and system also include removing the portion of the magnetoresistive stack to define the magnetoresistive structure. The method and system further include providing an insulating layer. A portion of the insulating layer resides on the at least one side of the mask. The method and system further include removing the portion of the insulating layer on the at least one side of the mask and removing the mask.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: January 8, 2013
    Assignee: Western Digital (Fremont), LLC
    Inventors: Weimin Si, Liubo Hong, Honglin Zhu, Winnie Yu, Rowena Schmidt
  • Publication number: 20130001196
    Abstract: This disclosure describes systems, methods, and apparatuses for generating an ionizing electromagnetic field via a remote plasma source such that the field controllably extends through a field projection portion where the field attenuates, to a plasma processing portion where the field is attenuated but still strong enough to sustain a plasma. The plasma has a low voltage and RF energy and can be used for a variety of semiconductor and thin film processing operations including chamber cleaning via radical generation, etching, and deposition.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Daniel J. Hoffman, Daniel Carter, Karen Peterson, Randy Grilly
  • Publication number: 20130001197
    Abstract: In a plasma processing method for conducting etching on an object to be processed by generating plasma from depositional gas introduced into a processing chamber and exposing the object to be processed to the plasma in a state in which radio frequency power is applied, the object to be processed is etched under etching conditions that a deposit film on an inner wall of the processing chamber becomes amorphous by repeating a first period during which the object to be processed is exposed to plasma and a second period during which the object to be processed is exposed to plasma and an etching rate is lower as compared with the first period. Consequently, particles due to increase in the number of processed sheets of the object to be processed can be suppressed.
    Type: Application
    Filed: August 16, 2011
    Publication date: January 3, 2013
    Inventors: Yoshiharu INOUE, Michikazu MORIMOTO, Tsuyoshi MATSUMOTO, Tetsuo ONO, Tadamitsu KANEKIYO, Mamoru YAKUSHIJI, Masakazu MIYAJI
  • Patent number: 8343372
    Abstract: A surface processing method for a mounting stage, which enables a mounting surface conforming to a substrate to be formed while saving time and effort. The substrate is mounted on a mounting surface of the mounting stage disposed in a housing chamber of a substrate processing apparatus that carries out plasma processing on the substrate. The mounted substrate is thermally expanded.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: January 1, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tadashi Aoto, Eiichiro Kikuchi, Masakazu Higuma, Kimihiro Higuchi
  • Patent number: 8343878
    Abstract: A method of plasma etching Ga-based compound semiconductors includes providing a process chamber and a source electrode adjacent thereto. The chamber contains a Ga-based compound semiconductor sample in contact with a platen which is electrically connected to a first power supply, and the source electrode is electrically connected to a second power supply. SiCl4 and Ar gases are flowed into the chamber. RF power is supplied to the platen at a first power level, and RF power is supplied to the source electrode. A plasma is generated. Then, RF power is supplied to the platen at a second power level lower than the first power level and no greater than about 30 W. Regions of a surface of the sample adjacent to one or more masked portions of the surface are etched at a rate of no more than about 25 nm/min to create a substantially smooth etched surface.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: January 1, 2013
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Weibin Qiu, Lynford L. Goddard
  • Patent number: 8343371
    Abstract: The invention can provide apparatus and methods of processing a substrate in real-time using a Quasi-Neutral Beam (Q-NB) curing system to improve the etch resistance of photoresist layer. In addition, the improved photoresist layer can be used to more accurately control gate and/or spacer critical dimensions (CDs), to control gate and/or spacer CD uniformity, and to eliminate line edge roughness (LER) and line width roughness (LWR).
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: January 1, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Merritt Funk, Lee Chen, Radha Sundararajan
  • Patent number: 8344482
    Abstract: In the bevel etching apparatus relating to the present invention, a substrate is inserted between electrically connected electrodes. A high-frequency power source is connected to the electrodes, and ground potential is applied to a support unit that supports the substrate. Gas (atmosphere) is supplied to the gap between the electrodes and the application of the high-frequency electric power to the electrodes causes the generation of atmospheric-pressure glow discharge between the electrode and the substrate. Bevel etching is performed by rotating the substrate along the circumferential direction in this condition. According to this construction, the bevel etching can be simultaneously performed to the front surface, the rear surface and the side of the substrate without causing any configuration change in the substrate.
    Type: Grant
    Filed: November 4, 2010
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventor: Shin-ichi Imai
  • Patent number: 8338303
    Abstract: A polishing liquid for a chemical mechanical polishing of a semiconductor device includes (a) a carboxylic acid compound having one or more carboxy groups, (b) colloidal silica particles having a ? potential of ?10 mV to ?35 mV when used in the polishing liquid, (c) a benzotriazole derivative, (d) an anionic surfactant, and (e) an oxidizing agent, and the polishing liquid has a pH of from 5.0 to 8.0.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: December 25, 2012
    Assignee: FUJIFILM Corporation
    Inventor: Tetsuya Kamimura
  • Patent number: 8338308
    Abstract: A method of plasma etching Ga-based compound semiconductors includes providing a process chamber and a source electrode adjacent to the process chamber. The process chamber contains a sample comprising a Ga-based compound semiconductor. The sample is in contact with a platen which is electrically connected to a first power supply, and the source electrode is electrically connected to a second power supply. The method includes flowing SiCl4 gas into the chamber, flowing Ar gas into the chamber, and flowing H2 gas into the chamber. RF power is supplied independently to the source electrode and the platen. A plasma is generated based on the gases in the process chamber, and regions of a surface of the sample adjacent to one or more masked portions of the surface are etched to create a substantially smooth etched surface including features having substantially vertical walls beneath the masked portions.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: December 25, 2012
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Weibin Qiu, Lynford L. Goddard
  • Patent number: 8337713
    Abstract: A method for etching a layer over a substrate in a process chamber, wherein the process chamber including a first electrode and a second electrode and the first electrode is disposed opposite of the second electrode is provided. The method includes placing the substrate on the second electrode and providing an etching gas into the process chamber. The method also includes providing a first radio frequency (RF) signal into the process chamber and modulating the first RF signal. The method further includes providing a second RF signal into the process chamber and modulating the second RF signal.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: December 25, 2012
    Assignee: Lam Research Corporation
    Inventors: Peter Loewenhardt, Mukund Srinivasan, Andreas Fischer
  • Patent number: 8336193
    Abstract: Provided is a process for making a magnetic recording medium having a magnetically partitioned magnetic recording patterns, which comprises the following three steps (1), (2) and (3), conducted in this order: (1) a step of forming a magnetic layer on a non-magnetic substrate; (2) a step of removing surface layer portions of regions for magnetically partitioning the magnetic layer; and (3) a step of exposing the thus-exposed regions of the magnetic layer, from which the surface layer portions have been removed, to a reactive plasma or a reactive ion, to modify the magnetic characteristics of the regions of magnetic layer, whereby a magnetic recording pattern is formed which are magnetically partitioned by the regions of magnetic layer having the modified characteristics. Thus, a magnetic recording medium having an enhanced recording density and minimizing letter bleeding at writing can be made with a high efficiency.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: December 25, 2012
    Assignee: Showa Denko K.K.
    Inventors: Masato Fukushima, Akira Sakawaki, Akira Yamane
  • Patent number: 8329590
    Abstract: Apparatus and methods for shielding a feature projecting from a first area on a substrate to a plasma while simultaneously removing extraneous material from a different area on the substrate with the plasma. The apparatus includes at least one concavity positioned and dimensioned to receive the feature such that the feature is shielded from the plasma. The apparatus further includes a window through which the plasma removes the extraneous material. The method generally includes removing the extraneous material while shielding the feature against plasma exposure.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: December 11, 2012
    Assignee: Nordson Corporation
    Inventors: Robert S. Condrashoff, James D. Getty, James S. Tyler
  • Patent number: 8329054
    Abstract: A plasma processing apparatus includes a plasma-generation high-frequency power supply which generates plasma in a processing chamber, a biasing high-frequency power supply which applies high-frequency bias electric power to an electrode on which a sample is placed, a monitor which monitors a peak-to-peak value of the high-frequency bias electric power applied to the electrode, an electrostatic chuck power supply which makes the electrode electrostatically attract the sample, a self-bias voltage calculating unit which calculates self-bias voltage of the sample by monitoring the peak-to-peak value of the high-frequency bias electric power applied to the electrode, and an output voltage control unit which controls output voltage of the electrostatic chuck power supply based on the calculated self-bias voltage.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: December 11, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Takamasa Ichino, Ryoji Nishio, Shinji Obama
  • Patent number: 8329051
    Abstract: A method for forming a stair-step structure in a substrate is provided. An organic mask is formed over the substrate. A hardmask with a top layer and sidewall layer is formed over the organic mask. The sidewall layer of the hard mask is removed while leaving the top layer of the hardmask. The organic mask is trimmed. The substrate is etched. The forming the hardmask, removing the sidewall layer, trimming the organic mask, and etching the substrate are repeated a plurality of times.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: December 11, 2012
    Assignee: Lam Research Corporation
    Inventors: Qian Fu, Hyun-Yong Yu
  • Patent number: 8329585
    Abstract: A method for reducing line width roughness (LWR) of a feature in an etch layer below a patterned photoresist mask having mask features is provided. The method includes (a) non-etching plasma pre-etch treatment of the photoresist mask, and (b) etching of a feature in the etch layer through the pre-treated photoresist mask using an etching gas. The non-etching plasma pre-etch treatment includes (a1) providing a treatment gas containing H2 and COS, (a2) forming a plasma from the treatment gas, and (a3) stopping the treatment gas.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: December 11, 2012
    Assignee: Lam Research Corporation
    Inventors: Ben-Li Sheu, Martin Shim, Jonathan Kim
  • Patent number: 8329591
    Abstract: Disclosed is a means for stabilizing quality of a semiconductor device by preventing projections from being formed in the bottom of a through hole. A method of manufacturing a semiconductor device includes a process of forming a through hole reaching a metal nitride layer through an interlayer insulating layer on a semiconductor wafer on which the wiring layer, the metal nitride layer formed on the wiring layer, and the interlayer insulating layer covering the wiring layer and the metal nitride layer are formed. The through hole forming process includes: a first etching step of etching the interlayer insulating layer by an anisotropic etching method with the semiconductor wafer set to a first temperature; and a second etching step of etching an upper surface of metal nitride layer by an anisotropic etching method with the semiconductor wafer set to a second temperature higher than the first temperature.
    Type: Grant
    Filed: April 11, 2008
    Date of Patent: December 11, 2012
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Shinji Kawada
  • Publication number: 20120305527
    Abstract: Provided is a substrate treating apparatus, which includes a process chamber having an inner space, a substrate support part disposed within the process chamber, and supporting a substrate, a gas supply part supplying a process gas into the process chamber, an antenna configured to supply high frequency power into the process chamber to excite the process gas within the process chamber, and a driving part varying a size of the antenna.
    Type: Application
    Filed: May 31, 2012
    Publication date: December 6, 2012
    Inventors: Hyung Joon Kim, Hyung Je Woo
  • Publication number: 20120308917
    Abstract: One aspect of the invention is a method of surface alloying stainless steel, In one embodiment, the method includes providing a stainless steel surface having an initial amount of iron and an initial amount of chromium; and preferentially removing iron from the stainless steel surface to obtain a surface having an amount of iron less than the initial amount of iron and an amount of chromium greater than the initial amount of chromium. Another aspect of the invention is a unitary stainless steel article.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 6, 2012
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Mahmoud H. Abd Elhamid, Gayatri Vyas Dadheech
  • Patent number: 8323521
    Abstract: The invention can provide apparatus and methods of processing a substrate using plasma generation by gravity-induced gas-diffusion separation techniques. By adding or using gases including inert and process gases with different gravities (i.e., ratio between the molecular weight of a gaseous constituent and a reference molecular weight), a two-zone or multiple-zone plasma can be formed, in which one kind of gas can be highly constrained near a plasma generation region and another kind of gas can be largely separated from the aforementioned gas due to differential gravity induced diffusion and is constrained more closer to a wafer process region than the aforementioned gas.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 4, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Jianping Zhao, Lee Chen, Merritt Funk, Toshihisa Nozawa
  • Patent number: 8323522
    Abstract: A plasma reactor and an etching method using the same are provided. The method includes a first changing step of changing the number or arrangement structure of inductive coils connecting to an RF source power supply unit, a step of applying RF source power and generating high density plasma, a first etching step of etching a first etch-target layer of a workpiece, a first stopping step of stopping applying the RF source power, a second changing step of changing the number or arrangement structure of the inductive coils, a step of applying RF source power to corresponding inductive coils and generating low density plasma, a second etching step of etching a second etch-target layer of the workpiece, and a second stopping step of stopping applying the RF source power.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: December 4, 2012
    Assignee: DMS Co., Ltd.
    Inventors: Hyeokjin Jang, Minshik Kim, Kwangmin Lee, Sungyong Ko, Hwankook Chae, Kunjoo Park, Keehyun Kim, Weonmook Lee
  • Patent number: 8323523
    Abstract: A method of bevel edge processing a semiconductor in a bevel plasma processing chamber in which the semiconductor substrate is supported on a semiconductor substrate support is provided. The method comprises evacuating the bevel etcher to a pressure of 3 to 100 Torr and maintaining RF voltage under a threshold value; flowing a process gas into the bevel plasma processing chamber; energizing the process gas into a plasma at a periphery of the semiconductor substrate; and bevel processing the semiconductor substrate with the plasma.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: December 4, 2012
    Assignee: Lam Research Corporation
    Inventors: Tong Fang, Yunsang S. Kim, Andreas Fischer
  • Patent number: 8324109
    Abstract: A method for fabricating a semiconductor device includes forming a gate insulation layer over a substrate, sequentially forming a silicon layer and a metal layer over the gate insulation layer, performing a first gate etching process to etch the metal layer using a gate hard mask layer, formed on the metal layer, as an etch barrier, and then partially etch the silicon layer, thereby forming a first pattern, performing a second gate etching process to partially etch the silicon layer, thereby forming an undercut beneath the metal layer, forming a capping layer on both sidewalls of the first pattern including the undercut, performing a third gate etching process to etch the silicon layer to expose the gate insulation layer using the gate hard mask layer and the capping layer as an etch barrier, thereby forming a second pattern, and performing a gate re-oxidation process.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: December 4, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Tae-Han Kim, Dong-Hyun Kim
  • Patent number: 8318031
    Abstract: A method for manufacturing a magnetic write head having a write pole with a tapered leading edge and a tapered trailing edge. The method includes forming a non-magnetic bump player over a surface, forming a mask over the non-magnetic bump layer and performing a first ion milling to form a tapered back edge on the non-magnetic bump layer. A magnetic write pole material is then deposited over the surface and over the non-magnetic bump layer. Then a non-magnetic step structure is formed over the magnetic write pole material and an ion milling is performed to form a taper on the upper surface of the write pole. The write pole lateral dimensions can then be defined, and a non-magnetic bump formed over the tapered portion of the upper surface of the write pole. Another ion milling can then be performed to extend the taper of the surface of the write pole.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 27, 2012
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Aron Pentek, Thomas J. A. Roucoux, Yi Zheng
  • Patent number: 8318030
    Abstract: A method of fabricating a magnetic device is described. A mask removing layer is formed on a layered sensing stack and a hard mask layer is formed on the mask removing layer. A first reactive ion etch is performed with a non-oxygen-based chemistry to define the hard mask layer using an imaged layer formed on the hard mask layer as a mask. A second reactive ion etch is performed with an oxygen-based chemistry to define the mask removing stop layer using the defined hard mask layer as a mask. A third reactive ion etch is performed to define the layered sensing stack using the hard mask layer as a mask. The third reactive ion etch includes an etching chemistry that performs at a lower etching rate on the hard mask layer than on the layered sensing stack.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: November 27, 2012
    Assignee: Seagate Technology LLC
    Inventors: Xilin Peng, Stacey C. Wakeham, Yifan Zhang, Zhongyan Wang, Konstantin R. Nikolaev, Mark Henry Ostrowski, Yonghua Chen, Juren Ding
  • Patent number: 8318033
    Abstract: The present invention relates to a conductive tape. The conductive tape includes a adhesive layer and a plurality of carbon nanotubes. The adhesive layer has a first surface and an opposite second surface. The carbon nanotubes are substantially embedded in parallel in the adhesive layer and perpendicular to the first surface and the second surface. Each of the carbon nanotubes has two opposite ends extending out of the two opposite surfaces of the adhesive layer respectively. Further, a method for making the above-described conductive tape is also included.
    Type: Grant
    Filed: December 29, 2007
    Date of Patent: November 27, 2012
    Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.
    Inventors: Wei-Qi Fu, Liang Liu, Peng Liu, Yuan-Chao Yang, Shou-Shan Fan
  • Patent number: 8318035
    Abstract: Methods of surface finishing a component useful for a plasma processing apparatus are provided. The component includes at least one plasma-exposed quartz glass surface. The method includes mechanically polishing, chemically etching and cleaning the plasma-exposed surface to achieve a desired surface morphology. Quartz glass sealing surfaces of the component also can be finished by the methods. Plasma-exposed surface and sealing surfaces of the same component can be finished to different surface morphologies from each other.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: November 27, 2012
    Assignee: Lam Research Corporation
    Inventors: Mark W. Kiehlbauch, John E. Daugherty
  • Patent number: 8313661
    Abstract: A liner removal process is described, wherein an excess portion of a conformal liner formed in a trench is substantially removed while reducing or minimizing damage to a bulk fill material in the trench.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: November 20, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Vinh Luong, Akiteru Ko
  • Patent number: 8313665
    Abstract: Showerhead electrode assemblies are disclosed, which include a showerhead electrode adapted to be mounted in an interior of a vacuum chamber; an optional backing plate attached to the showerhead electrode; a thermal control plate attached to the backing plate or to the showerhead electrode at multiple contact points across the backing plate; and at least one thermally and electrically conductive gasket separating the backing plate and the thermal control plate, or the backing plate and showerhead electrode, at the contact points. Methods of processing semiconductor substrates using the showerhead electrode assemblies are also disclosed.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: November 20, 2012
    Assignee: Lam Research Corporation
    Inventors: Thomas R. Stevenson, Anthony de la Llera, Saurabh Ullal
  • Patent number: 8308969
    Abstract: A plasma system for substrate processing comprising, a conducting electrode (b, bb) on which one or more substrates (d) can be held; a second conducting electrode (a) placed adjacent but separated from the substrate holding electrode on the side away from the side where the substrates are held; and a gas mixture distribution shower head (e) placed away from the conducting electrode on the side where the substrates are held for supplying the gas mixture (f) needed for processing the substrates in a uniform manner; such that a plasma configuration initiated and established, between the conducting electrode holding the substrates and the second conducting electrode envelops the electrode holding the substrate, is kept away from the shower head activating and distributing the gas mixture through orifices (ee) in the shower head, thereby providing the advantages of improved uniformity, yield and reliability of the process.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: November 13, 2012
    Assignee: Aixtron, SE
    Inventors: Kenneth B. K. Teo, Nalin L. Rupesinghe
  • Patent number: 8308896
    Abstract: A method of cleaning a bevel edge of a substrate in an etch processing chamber is provided. The method includes placing a substrate on a substrate support in a processing chamber. The method also includes flowing a cleaning gas through a gas feed located near a center of a gas distribution plate, disposed at a distance from the substrate support. The method further includes generating a cleaning plasma near a bevel edge of the substrate to clean the bevel edge by powering a bottom edge electrode or a top edge electrode with a RF power source and grounding the edge electrode that is not powered by the RF power source, the bottom edge electrode surrounds the substrate support and the top edge electrode surrounds the gas distribution plate.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: November 13, 2012
    Assignee: Lam Research Corporation
    Inventors: Yunsang Kim, Andrew D. Bailey, III
  • Patent number: 8309463
    Abstract: A method for forming a contact hole of a semiconductor device according to the present invention forms a contact hole which is defined as a new contact hole region (a second contact hole region), between spacers as well as a contact hole defined within the spacer (a first contact hole region) by a spacer patterning technology (SPT). The present invention with this method can help to form a fine contact hole as a double patterning is used, even with one mask.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Byoung Hoon Lee
  • Patent number: 8308966
    Abstract: A method for performing a double pattering process of a semiconductor device is provided. The method includes forming a hard mask layer having a stack structure of a first layer, a second layer and a third layer in sequence, forming a first photoresist pattern over the hard mask layer, etching the third layer to form third layer patterns by using the first photoresist pattern as an etch barrier, forming a second photoresist pattern over the third layer patterns, etching the second layer to form second layer patterns by using the second photoresist pattern and the third layer patterns as an etch barrier, removing the second photoresist pattern, and etching the first layer to form first layer patterns by using the second layer patterns as an etch barrier.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: November 13, 2012
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Jun-Hyeub Sun, Shi-Young Lee, Jong-Sik Bang, Sang-Min Ju
  • Publication number: 20120279943
    Abstract: A method and apparatus for processing a substrate is provided. In one embodiment, the apparatus is in the form of a processing chamber that includes a chamber body having a processing volume defined therein. A substrate support, a gas delivery tube assembly and a plasma line source are disposed in the processing volume. The gas delivery tube assembly includes an inner tube is disposed in an outer tube. The inner tube has a passage for flowing a cooling fluid therein. The outer tube has a plurality of gas distribution apertures for providing processing gas into the processing volume.
    Type: Application
    Filed: May 3, 2012
    Publication date: November 8, 2012
    Applicant: Applied Materials, Inc.
    Inventors: Helinda Nominanda, Tae Kyung Won, Seon-Mee Cho, Beom Soo Park, Soo Young Choi