Using Plasma Patents (Class 216/67)
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Patent number: 8635971Abstract: A method of tuning the uniformity of a plasma with a large sheath potential by locally affecting the density of a plasma is provided. The method comprises illuminating a body exposed to the plasma with electromagnetic radiation from a source, wherein the body and the source are cooperatively configured such that the body will generate photoelectrons upon exposure to the radiation from the source. An example of such electromagnetic radiation is vacuum ultraviolet light, and an example of such a body is the edge ring surrounding a semiconductor substrate. Photoelectrons emitted from the edge ring, captured by the plasma, and accelerated into the plasma with sufficient energy to cause ionization, locally increase plasma density. The source of radiation can be a plurality of discrete sources or one or more extended sources.Type: GrantFiled: March 31, 2006Date of Patent: January 28, 2014Assignee: Lam Research CorporationInventor: Eric Hudson
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Patent number: 8636911Abstract: Two methods of fabricating a MEMS scanning mirror having a tunable resonance frequency are described. The resonance frequency of the mirror is set to a particular value by mass removal from the backside of the mirror during fabrication.Type: GrantFiled: October 7, 2010Date of Patent: January 28, 2014Assignees: MagIC Technologies, Inc., Advanced Numicro Systems, Inc.Inventors: Jun Chen, Guomin Mao, Tom Zhong, Wei Cao, Yee-Chung Fu, Chyu-Jiuh Torng
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Patent number: 8628673Abstract: Disclosed are: a resin composition for pattern formation, which enables the stable formation of a pattern at a level of the wavelength of light; a method for forming a pattern having a sea-island structure using the composition; and a process for producing a light-emitting element that can achieve high luminous efficiency properties.Type: GrantFiled: May 12, 2010Date of Patent: January 14, 2014Assignees: Kabushiki Kaisha Toshiba, Asahi Kasei E-Materials CorporationInventors: Koji Asakawa, Ryota Kitagawa, Akira Fujimoto, Yoshiaki Shirae, Tomohiro Yorisue, Akihiko Ikeda
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Patent number: 8628676Abstract: A plasma etching method capable of forming a tapering etching structure having a smooth surface is provided. A fluorine-containing gas and a nitrogen gas are used and plasma is generated from these gases simultaneously, and a silicon substrate K is etched by the plasma while an etch-resistant layer is formed on the silicon substrate K by the plasma and then a fluorine-containing gas and an oxygen-containing gas are used and plasma is generated from these gases simultaneously, and the silicon substrate K is etched by the plasma while an etch-resistant layer is formed on the silicon substrate K by the plasma generated from the oxygen-containing gas, thereby forming a tapering etching structure H having a wide top opening width and a narrow bottom width.Type: GrantFiled: May 25, 2011Date of Patent: January 14, 2014Assignee: SPP Technologies Co., Ltd.Inventors: Naoya Ikemoto, Takashi Yamamoto, Yoshiyuki Nozawa
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Patent number: 8628672Abstract: A method for fabricating a magnetic recording transducer having a magnetic writer pole with a short effective throat height is provided. In an embodiment, a writer structure comprising a magnetic writer pole having a trailing bevel and a nonmagnetic stack on the top surface of the writer pole is provided. A dielectric write gap layer comprising alumina is deposited over the trailing bevel section and the nonmagnetic stack; and at least one etch stop layer is deposited over the dielectric write gap layer. A layer of nonmagnetic fill material is deposited over the etch stop layer and to form a nonmagnetic bevel by performing a dry etch process. The etch stop layer(s) are removed from the short throat section; and a trailing shield is deposited over the short throat section, nonmagnetic bevel, and nonmagnetic stack top surface.Type: GrantFiled: June 27, 2012Date of Patent: January 14, 2014Assignee: Western Digital (Fremont), LLCInventors: Weimin Si, Ying Hong, Zhigang Bai, Yunhe Huang, Fenglin Liu, Hong Zhang, Jikou Zhou, Xiaoyu Yang, Yuan Yao, Iulica Zana, Feng Liu, Ling Wang
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Patent number: 8628675Abstract: Provided is a substrate dechucking system of a plasma processing chamber adapted to remove a substrate from an ESC with reduction in voltage potential spike during dechucking of the substrate.Type: GrantFiled: October 31, 2012Date of Patent: January 14, 2014Assignee: Lam Research CorporationInventors: Brian McMillin, Jose V. Tong, Yen-Kun Victor Wang
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Publication number: 20140008324Abstract: Herein are disclosed methods for processing plastic substrate surfaces having inorganic antimicrobial microparticles within. The methods involve providing a plastic substrate having a substrate surface, having inorganic antimicrobial microparticles within the plastic substrate, and exposing the substrate surface to a plasma.Type: ApplicationFiled: March 27, 2012Publication date: January 9, 2014Applicant: 3M Innovative Properties CompanyInventors: Maria A. Appeaning, Caroline M. Ylitalo, Narina Y. Stepanova, Moses M. David
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Patent number: 8623471Abstract: A plasma treatment system for treating a workpiece with a downstream-type plasma. The processing chamber of the plasma treatment system includes a chamber lid having a plasma cavity disposed generally between a powered electrode and a grounded plate, a processing space separated from the plasma cavity by the grounded plate, and a substrate support in the processing space for holding the workpiece. A direct plasma is generated in the plasma cavity. The grounded plate is adapted with openings that remove electrons and ions from the plasma admitted from the plasma cavity into the processing space to provide a downstream-type plasma of free radicals. The openings may also eliminate line-of-sight paths for light between the plasma cavity and processing space. In another aspect, the volume of the processing chamber may be adjusted by removing or inserting at least one removable sidewall section from the chamber lid.Type: GrantFiled: January 19, 2012Date of Patent: January 7, 2014Assignee: Nordson CorporationInventors: James S. Tyler, James D. Getty, Robert S. Condrashoff, Thomas V. Bolden, II
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Patent number: 8623223Abstract: A method using directed self-assembly of BCPs enables the making of a master disk for nanoimprinting magnetic recording disks that have patterned data islands and patterned binary encoded nondata marks. The method uses guided self-assembly of a BCP to form patterns of sets of radial lines and circumferential gaps of one of the BCP components, which can be used as an etch mask to make the master disk. The sets of radial lines and circumferential gaps can be patterned so as to encode binary numbers. The pattern is replicated as binary encoded nondata marks into the nanoimprinted disks, with the marks functioning as binary numbers for data sector numbers and/or servo sector numbers. If the disks also use a chevron servo pattern, the binary numbers can function to identify groups of tracks associated with the chevron servo pattern.Type: GrantFiled: November 18, 2011Date of Patent: January 7, 2014Assignee: HGST Netherlands B.V.Inventors: Elizabeth Ann Dobisz, Jeffrey S. Lille, Guoliang Liu, Ricardo Ruiz, Gabriel Zeltzer
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Publication number: 20140001154Abstract: In a plasma processing apparatus including a processing room disposed in a vacuum vessel, a sample stage located in the processing room, a dielectric film disposed on the top surface of the sample stage and serving as the sample mounting surface of the sample stage, and a plurality of electrodes embedded in the dielectric film for chucking the sample to the dielectric film when supplied with electric power, a part of the sample is chucked by supplying electric power to at least one of the electrodes while the sample is mounted on the sample stage; the sample is heated up to a predetermined temperature; a larger part of the sample is chucked by supplying electric power to the other of the electrodes; and the processing of the sample using the plasma is initiated.Type: ApplicationFiled: September 4, 2012Publication date: January 2, 2014Inventors: Kohei Sato, Kazunori Nakamoto, Yutaka Omoto
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Patent number: 8617411Abstract: Substrate processing systems and methods for etching an atomic layer are disclosed. The methods and systems are configured to introducing a first gas into the chamber, the gas being an etchant gas suitable for etching the layer and allowing the first gas to be present in the chamber for a period of time sufficient to cause adsorption of at least some of the first gas into the layer. The first gas is substantially replaced in the chamber with an inert gas, and metastables are then generated from the inert gas to etch the layer with the metastables while substantially preventing the plasma charged species from etching the layer.Type: GrantFiled: July 20, 2011Date of Patent: December 31, 2013Assignee: Lam Research CorporationInventor: Harmeet Singh
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Patent number: 8617993Abstract: A method is provided for treating the surface of high aspect ratio nanostructures to help protect the delicate nanostructures during some of the rigorous processing involved in fabrication of semiconductor devices. A wafer containing high aspect ratio nanostructures is treated to make the surfaces of the nanostructures more hydrophobic. The treatment may include the application of a primer that chemically alters the surfaces of the nanostructures preventing them from getting damaged during subsequent wet clean processes. The wafer may then be further processed, for example a wet cleaning process followed by a drying process. The increased hydrophobicity of the nanostructures helps to reduce or prevent collapse of the nanostructures.Type: GrantFiled: February 1, 2010Date of Patent: December 31, 2013Assignee: Lam Research CorporationInventors: Amir A. Yasseri, Ji Zhu, Seokmin Yun, David S. L. Mui, Katrina Mikhaylichenko
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Patent number: 8617351Abstract: A plasma reactor for processing a workpiece, includes a vacuum chamber defined by a sidewall and ceiling, and a workpiece support pedestal having a workpiece support surface in the chamber and facing the ceiling and including a cathode electrode. An RF power generator is coupled to the cathode electrode. Plasma distribution is controlled by an external annular inner electromagnet in a first plane overlying the workpiece support surface, an external annular outer electromagnet in a second plane overlying the workpiece support surface and having a greater diameter than the inner electromagnet, and an external annular bottom electromagnet in a third plane underlying the workpiece support surface. D.C. current supplies are connected to respective ones of the inner, outer and bottom electromagnets.Type: GrantFiled: January 28, 2005Date of Patent: December 31, 2013Assignee: Applied Materials, Inc.Inventors: Daniel J. Hoffman, Roger A. Lindley, Michael C. Kutney, Martin J. Salinas, Hamid F. Tavassoli, Keiji Horioka, Douglas A. Buchberger, Jr.
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Patent number: 8617408Abstract: A method for manufacturing a magnetic read sensor at very narrow track widths. The method uses an amorphous carbon mask layer to pattern the sensor by ion milling, rather than a mask constructed of a material such as photoresist or DURIMIDE® which can bend over during ion milling at very narrow track widths. By using the amorphous carbon layer as the masking layer, the trackwidth can be very small, while avoiding this bending over of the mask that has been experienced with prior art methods. In addition, the track-width can be further reduced by using a reactive ion etching to further reduce the width of the amorphous carbon mask prior to patterning the sensor. The method also allows extraneous portions of the side insulation layer and hard bias layer to be removed above the sensor by a light CMP process.Type: GrantFiled: October 18, 2011Date of Patent: December 31, 2013Assignee: HGST Netherlands B.V.Inventors: Hamid Balamane, Patrick M. Braganca, Jordan A. Katine, Jui-Lung Li, Yang Li, Kanaiyalal C. Patel, Neil L. Robertson, Samuel W. Yuan
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Patent number: 8614151Abstract: Methods and an etch gas composition for etching a contact opening in a dielectric layer are provided. Embodiments of the method use a plasma generated from an etch gas composed of C4F8 and/or C4F6, an oxygen source, and a carrier gas in combination with tetrafluoroethane (C2F4) or a halofluorocarbon analogue of C2F4.Type: GrantFiled: January 4, 2008Date of Patent: December 24, 2013Assignee: Micron Technology, Inc.Inventors: Russell A. Benson, Ted Taylor, Mark Kiehlbauch
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Patent number: 8613861Abstract: A method of manufacturing vertical transistors includes steps of: forming a conductive layer on the surface of a substrate with a ditch and two support portions; removing the conductive layer on the bottom wall of the ditch and top walls of the support portions via anisotropic etching through a etch back process; forming an oxidized portion in the ditch; and etching the conductive layer to form two gates without contacting each other. By forming the conductive layer on the surface of the ditch and adopting selective etching of the etch back process, the problem of forming sub-trenches caused by lateral etching or uneven etching rate that might otherwise occur in the conventional etching process is prevented, and the risk of damaging metal wires caused by increasing etching duration also can be averted.Type: GrantFiled: December 7, 2011Date of Patent: December 24, 2013Assignee: Rexchip Electronics CorporationInventors: Hsiao-chia Chen, Sheng-chang Liang, Chien-hua Tsai, Masahiko Ohuchi
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Patent number: 8613864Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.Type: GrantFiled: August 23, 2012Date of Patent: December 24, 2013Assignee: Micron Technology, Inc.Inventor: Prashant Raghu
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Publication number: 20130334171Abstract: A method for providing steerability in a plasma processing environment during substrate processing is provided. The method includes managing power distribution by controlling power being delivered into the plasma processing environment through an array of electrical elements. The method also includes directing gas flow during substrate processing by controlling the amount of gas flowing through an array of gas injectors into the plasma processing environment, wherein individual ones of the array of gas injectors are interspersed between the array of electrical elements. The method further includes controlling gas exhausting during substrate processing by managing amount of gas exhaust being removed by an array of pumps, wherein the array of electrical elements, the array of gas injectors, and the array of pumps are arranged to create a plurality of plasma regions, each plasma region being substantially similar, thereby creating a uniform plasma region across the substrate.Type: ApplicationFiled: August 16, 2013Publication date: December 19, 2013Inventor: Neil Benjamin
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Publication number: 20130337254Abstract: A polyester molded body includes a core containing a polyester and a surface layer portion covering the core, wherein the surface layer portion contains carbon nanotubes and an ionic liquid, the carbon nanotubes being three-dimensionally entangled in the polyester. A polyester molded body includes a core containing a polyester, an intermediate layer covering the core, and a surface layer portion covering the intermediate layer, wherein the intermediate layer contains carbon nanotubes and an ionic liquid, the carbon nanotubes being three-dimensionally entangled in the polyester, and the surface layer portion contains three-dimensionally entangled carbon nanotubes.Type: ApplicationFiled: June 12, 2013Publication date: December 19, 2013Inventors: Yoshinobu Okumura, Yuichi Hashimoto, Masaki Sunaga
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Patent number: 8608974Abstract: There is provided a substrate processing method capable of increasing an etching rate of a copper member without using a halogen gas. A Cu layer 40 having a smoothened surface 50 is obtained, and then, a processing gas produced by adding a methane gas to a hydrogen gas is introduced into an inner space of a processing chamber 15. Plasma is generated from this processing gas. In the inner space of the processing chamber 15, there exist oxygen radicals 52 generated when an oxide layer 42 is etched, and carbon radicals 53 generated from methane. The oxygen radicals 52 and the carbon radicals 53 are compounded to generate an organic acid, and the organic acid makes a reaction with copper atoms of the Cu layer 40. As a result, a complex of the organic acid having the copper atoms is generated, and the generated organic acid complex is vaporized.Type: GrantFiled: December 21, 2011Date of Patent: December 17, 2013Assignee: Tokyo Electron LimitedInventor: Eiichi Nishimura
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Patent number: 8608973Abstract: A method for etching a metal layer, comprising plurality of cycles is provided. In each cycle, an etch gas comprising PF3, CO and NO, or COF2 is flowed into a process chamber. In each cycle, the etch gas is formed into a plasma. In each cycle, the flow of the etch gas is stopped.Type: GrantFiled: June 1, 2012Date of Patent: December 17, 2013Assignee: Lam Research CorporationInventor: Joydeep Guha
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Patent number: 8609221Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.Type: GrantFiled: July 12, 2010Date of Patent: December 17, 2013Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
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Patent number: 8604697Abstract: An apparatus for generating plasma is provided. The apparatus may include a vacuum chamber and a plasma source part. The plasma source part may include a dielectric part, an upper electrode, and an inductive coil. The dielectric part may be installed to protrude upward along a circumference of a through-hole provided at a top of the vacuum chamber. The upper electrode may be coupled to seal an opened top of the dielectric part. The inductive coil may spirally extend along an outer circumference surface of the dielectric part.Type: GrantFiled: November 8, 2010Date of Patent: December 10, 2013Assignee: Jehara CorporationInventor: Hongseub Kim
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Patent number: 8598040Abstract: A method for etching features in a plurality of silicon based bilayers forming a stack on a wafer in a plasma processing chamber is provided. A main etch gas is flowed into the plasma processing chamber. The main etch gas is formed into a plasma, while providing a first pressure. A wafer temperature of less than 20° C. is maintained. The pressure is ramped to a second pressure less than the first pressure as the plasma etches through a plurality of the plurality of silicon based bilayers. The flow of the main etch gas is stopped after a first plurality of the plurality of bilayers is etched.Type: GrantFiled: September 6, 2011Date of Patent: December 3, 2013Assignee: Lam Research CorporationInventors: Anne Le Gouil, Jeffrey R. Lindain, Yasushi Ishikawa, Yoko Yamaguchi-Adams
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Patent number: 8591752Abstract: A method for plasma-etching a magnetic film and plasma-cleaning, in which deposits in an etching processing chamber are efficiently removed while corrosion of a wafer is suppressed, is provided. A plasma processing method for plasma-etching a to-be-processed substrate having a magnetic film in an etching processing chamber includes the steps of plasma-etching the magnetic film using a first gas not containing chlorine, transferring out the to-be-processed substrate from the etching processing chamber, first plasma-cleaning of the etching processing chamber using a second gas containing chlorine, and second plasma-cleaning using a third gas containing hydrogen after the first plasma cleaning.Type: GrantFiled: February 17, 2012Date of Patent: November 26, 2013Assignee: Hitachi High Technologies CorporationInventors: Takahiro Abe, Takeshi Shimada, Atsushi Yoshida, Kentaro Yamada, Daisuke Fujita
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Patent number: 8591660Abstract: The invention relates to a method of cleaning the surface of a material that is coated with an organic substance. The inventive method is characterized in that it comprises the following steps, consisting in: introducing the material into a treatment chamber, having a pressure of between 10 mbar and 1 bar therein, which is supplied with a gas stream containing at least 90 volume percent of oxygen; and generating a plasma by passing an electric discharge between the surface of the material and a dielectric-covered electrode in order to break down the organic substance under the action of the free radicals O thus produces. The invention also relates to an installation that is used to carry out said method.Type: GrantFiled: December 4, 2009Date of Patent: November 26, 2013Assignee: UsinorInventors: Eric Silberberg, Eric Michel, Francois Reniers, Claudine Buess-Herman
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Patent number: 8591754Abstract: A tray for a dry etching apparatus includes substrate accommodation holes penetrating a thickness direction and a substrate support portion supporting an outer peripheral edge portion of a lower surface of a substrate. An upper portion includes a tray support surface supporting a lower surface of the tray, substrate placement portions on each of which a lower surface of the substrate to be placed, and a concave portion for accommodating the substrate support portion. A dc voltage applying mechanism applies a dc voltage to an electrostatic attraction electrode. A heat conduction gas supply mechanism supplies a heat conduction gas between the substrate and substrate placement portion. During carrying of the substrate, the outer peripheral edge of the lower surface of the substrate is supported by the substrate accommodation hole. During processing of the substrate, the substrate support portion is accommodated in the concave portion.Type: GrantFiled: June 20, 2012Date of Patent: November 26, 2013Assignee: Panasonic CorporationInventors: Shogo Okita, Hiromi Asakura, Syouzou Watanabe, Ryuzou Houchin, Hiroyuki Suzuki
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Patent number: 8591755Abstract: A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.Type: GrantFiled: September 15, 2010Date of Patent: November 26, 2013Assignee: Lam Research CorporationInventor: Rajinder Dhindsa
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Patent number: 8591659Abstract: Improved methods and apparatuses for removing residue from the interior surfaces of the deposition reactor are provided. The methods involve increasing availability of cleaning reagent radicals inside the deposition chamber by generating cleaning reagent radicals in a remote plasma generator and then further delivering in-situ plasma energy while the cleaning reagent mixture is introduced into the deposition chamber. Certain embodiments involve a multi-stage process including a stage in which the cleaning reagent mixture is introduced at a high pressure (e.g., about 0.6 Torr or more) and a stage the cleaning reagent mixture is introduced at a low pressure (e.g., about 0.6 Torr or less).Type: GrantFiled: January 16, 2009Date of Patent: November 26, 2013Assignee: Novellus Systems, Inc.Inventors: Zhiyuan Fang, Pramod Subramonium, Jon Henri, Keith Fox
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Patent number: 8591661Abstract: Improved methods for stripping photoresist and removing etch-related residues from dielectric materials are provided. In one aspect of the invention, methods involve removing material from a dielectric layer using a hydrogen-based etch process employing a weak oxidizing agent and fluorine-containing compound. Substrate temperature is maintained at a level of about 160° C. or less, e.g., less than about 90° C.Type: GrantFiled: December 11, 2009Date of Patent: November 26, 2013Assignee: Novellus Systems, Inc.Inventors: David Cheung, Ted Li, Anirban Guha, Kirk Ostrowski
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Patent number: 8592318Abstract: A method for etching an etch layer disposed over a substrate and below an antireflective coating (ARC) layer and a patterned organic mask with mask features is provided. The substrate is placed in a process chamber. The ARC layer is opened. An oxide spacer deposition layer is formed. The oxide spacer deposition layer on the organic mask is partially removed, where at least the top portion of the oxide spacer deposition layer is removed. The organic mask and the ARC layer are removed by etching. The etch layer is etched through the sidewalls of the oxide spacer deposition layer. The substrate is removed from the process chamber.Type: GrantFiled: November 7, 2008Date of Patent: November 26, 2013Assignee: Lam Research CorporationInventors: Jisoo Kim, Conan Chiang, Jun Shinagawa, S. M. Reza Sadjadi
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Publication number: 20130306995Abstract: A method for manufacturing a glass substrate for a display includes a step of producing a glass substrate and a step of performing a surface treatment on one glass surface of major surfaces of the glass substrate to form surface unevenness. The surface treatment is performed such that protruded portions having a height of 1 nm or more from the surface roughness central plane of the surface unevenness are dispersedly provided on the glass surface after the surface treatment and the area ratio of the protruded portions with respect to the area of the glass surface is 0.5-10%. Using this glass substrate, semiconductor elements are formed on a major surface of the glass substrate opposite to the glass surface. Accordingly, a display panel is produced.Type: ApplicationFiled: April 26, 2013Publication date: November 21, 2013Applicant: AvanStrate Inc.Inventor: AvanStrate Inc.
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Publication number: 20130306598Abstract: A method for patterning a substrate is described. The patterning method may include conformally depositing a material layer over a pattern according to a conformal deposition process, selectively depositing a second material layer on an exposed surface of the material layer according to a selected deposition process recipe; partially removing the material layer using a plasma etching process to expose a top surface of the pattern, open a portion of the material layer at a bottom region between adjacent features of the pattern, and retain a remaining portion of the material layer on sidewalls of the pattern; and removing the pattern using one or more etching processes to leave a final pattern comprising the remaining portion of the material layer and the second layer.Type: ApplicationFiled: May 14, 2013Publication date: November 21, 2013Applicant: TOKYO ELECTRON LIMITEDInventors: AKITERU KO, KOSUKE OGASAWARA
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Publication number: 20130299455Abstract: There are provided a method of heating a focus ring and a plasma etching apparatus, capable of simplifying a structure of a heating mechanism without a dummy substrate. The plasma etching apparatus includes a vacuum processing chamber; a lower electrode serving as a mounting table for mounting a substrate thereon; an upper electrode provided to face the lower electrode; a gas supply unit for supplying a processing gas; a high frequency power supply for supplying a high frequency power to the lower electrode to generate a plasma of the processing gas; and a focus ring provided on the lower electrode to surround a periphery of the substrate. In the plasma etching apparatus, the focus ring is heated by irradiating a heating light thereto from a light source provided outside the vacuum processing chamber.Type: ApplicationFiled: July 15, 2013Publication date: November 14, 2013Inventors: Chishio KOSHIMIZU, Jun YAMAWAKU, Tatsuo MATSUDO, Masashi SAITO
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Patent number: 8580127Abstract: An RFID based thermal bubble type accelerometer includes a flexible substrate, an embedded system on chip (SOC) unit, an RFID antenna formed on the substrate and coupled to a modulation/demodulation module in the SOC unit, a cavity formed on the flexible substrate, and a plurality of sensing assemblies, including a heater and two temperature-sensing elements, disposed along the x-axis direction and suspended over the cavity. The two temperature-sensing elements, serially connected, are separately disposed at two opposite sides and at substantially equal distances from the heater. Two sets of sensing assemblies can be connected in differential Wheatstone bridge. The series-connecting points of the sensing assemblies are coupled to the SOC unit such that an x-axis acceleration can be obtained by a voltage difference between the connecting points. The x-axis acceleration can be sent by the RFID antenna to a reader after it is is modulated and encoded by the modulation/demodulation module.Type: GrantFiled: October 9, 2012Date of Patent: November 12, 2013Assignee: Chung Hua UniversityInventor: Jium Ming Lin
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Patent number: 8580689Abstract: The present invention provides a dry etching method capable of readily providing rounded top edge portions, called top rounds, at trenches and vias formed by removal of a dummy material. The method of the present invention is a dry etching method for forming trenches or vias by removing a dummy material with its periphery surrounded by an interlayer oxide film, which method includes the steps of etching the dummy material to a predetermined depth, performing isotropic etching after the dummy material etching, and removing remaining part of the dummy material after the isotropic etching.Type: GrantFiled: August 16, 2011Date of Patent: November 12, 2013Assignee: Hitachi High-Technologies CorporationInventors: Tomoyoshi Ichimaru, Kenichi Kuwabara, Go Saito
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Patent number: 8574447Abstract: A method for etching features into a silicon substrate disposed below a mask in a plasma processing chamber is provided. The silicon substrate is etched through the mask comprising a plurality of cycles, wherein each cycle comprises a sidewall deposition phase and an etch phase. The sidewall deposition phase comprises providing a flow of sidewall inorganic deposition phase gas comprising a silicon containing compound gas and at least one of oxygen, nitrogen or NOx, into the plasma processing chamber, forming a plasma from the sidewall deposition phase gas in the plasma processing chamber, and stopping the flow of the sidewall deposition gas into the plasma processing chamber. The etch phase comprises, providing a flow of an etching gas comprising a halogen component, forming a plasma from the etching gas in the plasma processing chamber, and stopping the flow of the etching gas.Type: GrantFiled: March 31, 2010Date of Patent: November 5, 2013Assignee: Lam Research CorporationInventors: Tsuyoshi Aso, Camelia Rusu
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Patent number: 8574448Abstract: A plasma generation method in a toroidal plasma generator that includes a gas passage having a gas entrance and a gas outlet and forming a circuitous path and a coil wound around a part of the gas passage includes the steps of supplying a mixed gas of an Ar gas and an NF3 gas containing at least 5% of NF3 and igniting plasma by driving the coil with a high-frequency power, wherein the plasma ignition step is conducted under a total pressure of 6.65-66.5 Pa.Type: GrantFiled: April 1, 2010Date of Patent: November 5, 2013Assignee: Tokyo Electron LimitedInventors: Hiroshi Kannan, Noboru Tamura, Kazuya Dobashi
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Patent number: 8574446Abstract: At the time of plasma igniting or during plasma processing, only optimizing the distance between electrodes in each case caused a limitation to the prevention of charging damage. To resolve this, a novel plasma processing method employs a plasma processing apparatus which includes an upper electrode to which first high-frequency power is applied, a lower electrode to which second high-frequency power is applied, and a lift mechanism for controlling the spacing between the upper and lower electrodes. The first high-frequency power is applied to the upper electrode to cause plasma igniting. The method is adapted to make the spacing between the upper and lower electrodes larger at least at the time of plasma extinction than during plasma processing of a wafer on the lower electrode.Type: GrantFiled: August 5, 2009Date of Patent: November 5, 2013Assignee: Tokyo Electron LimitedInventors: Tamotsu Morimoto, Takahiro Murakami
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Patent number: 8574445Abstract: Provided are a method for generating hollow cathode plasma and a method for treating a large area substrate using the hollow cathode plasma. In the methods, the hollow cathode plasma is generated by a gas introduced between a hollow cathode in which a plurality of lower grooves where plasma is generated is defined in a bottom surface thereof and a baffle in which a plurality of injection holes is defined. A substrate disposed on a substrate support member is treated using the hollow cathode plasma passing through the injection holes. The uniform plasma having high density can be generated by hollow cathode effect due to the hollow cathode having the lower grooves and the injection holes of the baffle. Also, since the substrate can be treated using a hydrogen gas and a nitrogen gas in an ashing process, a damage of a low dielectric constant dielectric can be minimized.Type: GrantFiled: June 5, 2009Date of Patent: November 5, 2013Assignee: PSK Inc.Inventors: Jeonghee Cho, Jong Ryang Joo, Shinkeun Park
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Publication number: 20130284701Abstract: [Object] To provide a method of manufacturing a dielectric device and an ashing method that are capable of suppressing the occurrence of resist residue. [Solving Means] In the ashing method, a base material having a surface etched by a plasma of chlorine gas or fluorocarbon gas via a resist mask (6) formed of an organic material is disposed in a chamber, bombardment treatment is performed on the resist mask (6) by using oxygen ions in the chamber, and the resist mask is removed by using oxygen radicals in the chamber. According to the ashing method described above, etching reactants adhering to the surface of the resist mask are physically removed by the bombardment treatment using oxygen ions. Thus, it is possible to suppress the occurrence of resist residue due to the etching reactants and efficiently remove the resist mask from the surface of the base material.Type: ApplicationFiled: December 19, 2011Publication date: October 31, 2013Applicant: ULVAC, INC.Inventors: Yoshiaki Yoshida, Yutaka Kokaze
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Patent number: 8569647Abstract: Provided is a heat treatment apparatus in which a heat treatment apparatus in which the thermal efficiency is high, the maintenance expense is low, the throughput is high, the surface roughness of a sample can be reduced, and the discharge uniformity is excellent, although the heat treatment is performed at 1200 ° C. or more. A heat treatment apparatus includes: parallel planar electrodes; a radio-frequency power supply generating plasma by applying radio-frequency power between the parallel planar electrodes; a temperature measuring section measuring the temperature of a heated sample; and a control unit controlling an output of the radio-frequency power supply, wherein at least one of the parallel planar electrodes has a space where the heated sample is installed, therein, and heats the sample in the electrode by the plasma generated between the parallel planar electrodes.Type: GrantFiled: July 19, 2011Date of Patent: October 29, 2013Assignee: Hitachi High-Technologies CorporationInventors: Masatoshi Miyake, Ken'etsu Yokogawa
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Patent number: 8568605Abstract: A method for forming nanometer-sized patterns and pores in a membrane is described. The method comprises incorporating a reactive material onto the membrane, the reactive material being a material capable of lowering an amount of energy required for forming a pore and/or pattern by irradiating the membrane material with an electron beam, thus leading to a faster pore and/or pattern formation.Type: GrantFiled: November 17, 2011Date of Patent: October 29, 2013Assignee: California Institute of TechnologyInventors: Sameer Walavalkar, Axel Scherer, Andrew P. Homyk
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Patent number: 8568606Abstract: A substrate processing method uses a substrate processing apparatus including a chamber for accommodating a substrate, a lower electrode to mount the substrate, a first RF power applying unit for applying an RF power for plasma generation into the chamber, and a second RF power applying unit for applying an RF power for bias to the lower electrode. The RF power for plasma generation is controlled to be intermittently changed by changing an output of the first RF power applying unit at a predetermined timing. If no plasma state or an afterglow state exists in the chamber by a control of the first RF power applying unit, an output of the second RF power applying unit is controlled to be in an OFF state or decreased below an output of the second RF power applying unit when the output of the first RF power applying unit is a set output.Type: GrantFiled: March 30, 2010Date of Patent: October 29, 2013Assignee: Tokyo Electron LimitedInventors: Takeshi Ohse, Shinji Himori, Jun Abe, Norikazu Yamada
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Patent number: 8569179Abstract: A method of etching or removing an amorphous carbon organic hardmask overlying a low dielectric constant film in a lithographic process. The method includes providing a dielectric film having thereover an amorphous carbon organic hardmask to be removed, the dielectric film having a dielectric constant no greater than about 4.0, introducing over the amorphous carbon organic hardmask an ionizable gas comprising a mixture of hydrogen and an oxidizing gas, and applying energy to the mixture to create a plasma of the mixture. The method further includes contacting the amorphous carbon organic hardmask with the plasma, with the amorphous carbon organic hardmask being at a temperature in excess of 200° C., to remove the amorphous carbon organic hardmask without substantially harming the underlying substrate.Type: GrantFiled: February 10, 2012Date of Patent: October 29, 2013Assignee: Novellus Systems, Inc.Inventor: Wesley P. Graff
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Publication number: 20130277333Abstract: In a plasma reactor having a driven electrode and a counter electrode, an impedance controller connected between the counter electrode and ground includes both series sand parallel variable impedance elements that facilitate two-dimensional movement of a ground path input impedance in a complex impedance space to control spatial distribution of a plasma process parameter.Type: ApplicationFiled: March 15, 2013Publication date: October 24, 2013Inventors: Nipun Misra, Kartik Ramaswamy, Yang Yang, Douglas A. Buchberger, JR., James D. Carducci, Lawrence Wong, Shane C. Nevil, Shahid Rauf, Kenneth S. Collins
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Patent number: 8563619Abstract: A method for processing a substrate in a plasma processing chamber is provided. The substrate is disposed above a chuck and surrounded by an edge ring. The edge ring is electrically isolated from the chuck. The method includes providing RF power to the chuck. The method also includes providing a tunable capacitance arrangement. The tunable capacitance arrangement is coupled to the edge ring to provide RF coupling to the edge ring, resulting in the edge ring having an edge ring potential. The method further includes generating a plasma within the plasma processing chamber to process the substrate. The substrate is processed while the tunable capacitance arrangement is configured to cause the edge ring potential to be dynamically tunable to a DC potential of the substrate while processing the substrate.Type: GrantFiled: June 28, 2007Date of Patent: October 22, 2013Assignee: Lam Research CorporationInventors: Rajinder Dhindsa, Alexei Marakhtanov
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Publication number: 20130270997Abstract: A surface wave plasma (SWP) source couples microwave (MW) energy into a processing chamber through, for example, a radial line slot antenna, to result in a low mean electron energy (Te). An ICP source, is provided between the SWP source and the substrate and is energized at a low power, less than 100 watts for 300 mm wafers, for example, at about 25 watts. The ICP source couples energy through a peripheral electric dipole coil to reduce capacitive coupling.Type: ApplicationFiled: March 14, 2013Publication date: October 17, 2013Inventors: Jianping Zhao, Lee Chen, Merritt Funk, Radha Sundararajan
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Patent number: 8557128Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.Type: GrantFiled: March 22, 2007Date of Patent: October 15, 2013Assignee: Micron Technology, Inc.Inventor: Dan B. Millward
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Publication number: 20130264309Abstract: Methods and apparatus for processing a substrate using plasma are disclosed. The apparatus includes a plasma processing system having a process gas supply arrangement for supplying a process gas into an interior region of said chamber and a plasma source configured for generating said plasma at least from said process gas. The apparatus also includes an acoustic energy generator arrangement configured to apply acoustic energy to at least one of a chamber component and said substrate, wherein said acoustic energy generator generates said acoustic energy in the range of 10 Hz to 1 MHz using at least one of a piezoelectric transducing, mechanical coupling vibration, wafer backside gas pulsing, pulsing of said process gas, pressure wave pulsing, and electromagnetic coupling.Type: ApplicationFiled: April 5, 2012Publication date: October 10, 2013Inventors: Ian J. Kenworthy, Daniel A. Brown, Cliff E. La Croix, Josh A. Cormier