Using Plasma Patents (Class 216/67)
  • Publication number: 20130105443
    Abstract: Methods for etching a substrate are provided herein. In some embodiments, a method of etching a substrate may include generating a plasma by providing only a first RF signal having a first frequency and a first duty cycle; applying only a second RF signal to bias the plasma towards the substrate, wherein the second RF signal has the first frequency and a second duty cycle different than the first duty cycle; adjusting a phase variance between the first and second RF signals to control an ion energy distribution in the plasma; and etching the substrate with the plasma.
    Type: Application
    Filed: April 27, 2012
    Publication date: May 2, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: SAMER BANNA, ANKUR AGARWAL
  • Patent number: 8431035
    Abstract: A plasma processing apparatus for processing a substrate by using a plasma includes a processing chamber for accommodating and processing the substrate therein, a lower electrode for mounting the substrate thereon in the processing chamber, an upper electrode disposed to face the lower electrode in the processing chamber, a radio frequency power supply for supplying a radio frequency power to at least one of the lower and the upper electrode, to thereby generate the plasma between the lower and the upper electrode, and an electrical characteristic control unit for adjusting an impedance of a circuit at the side of an electrode to the plasma for a frequency of at least one radio frequency wave present in the processing chamber such that the circuit does not resonate.
    Type: Grant
    Filed: May 13, 2009
    Date of Patent: April 30, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Manabu Iwata, Chishio Koshimizu, Yohei Yamazawa
  • Patent number: 8431491
    Abstract: A method for protecting a chuck membrane in a reactive ion etcher during plasma processing is described. The method utilizes a photoresist as a protective layer. Suitable photoresists can be used in this invention to not only image a semiconductor substrate to protect areas where vias and/or cavities are not desired during plasma processing but also to protect the chuck membrane(s) of the reactive ion etcher from being damaged and/or contaminated during plasma processing. Both negative-working and positive-working photoresists can be used.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: April 30, 2013
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Chester E. Balut, Frank Leonard Schadt, III, Stephen E. Vargo
  • Patent number: 8431032
    Abstract: There is provided a method for continual preparation of granular polycrystalline silicon using a fluidized bed reactor, enabling a stable, long-term operation of the reactor by effective removal of silicon deposit accumulated on the inner wall of the reactor tube. The method comprises (i) a silicon particle preparation step, wherein silicon deposition occurs on the surface of the silicon particles, while silicon deposit is accumulated on the inner wall of the reactor tube encompassing the reaction zone; (ii) a silicon particle partial discharging step, wherein a part of the silicon particles remaining inside the reactor tube is discharged out of the fluidized bed reactor so that the height of the bed of the silicon particles does not exceed the height of the reaction gas outlet; and (iii) a silicon deposit removal step, wherein the silicon deposit is removed by supplying an etching gas into the reaction zone.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: April 30, 2013
    Assignee: Korea Research Institute of Chemical Technology
    Inventors: Hee Young Kim, Kyung Koo Yoon, Yong Ki Park, Won Choon Choi
  • Publication number: 20130098873
    Abstract: A plasma reactor has a main chamber for processing a workpiece in a processing region bounded between an overhead ceiling and a workpiece support surface, the reactor having an overhead electron beam source that produces an electron beam flowing into the processing region through the ceiling of the main chamber.
    Type: Application
    Filed: August 27, 2012
    Publication date: April 25, 2013
    Applicant: Applied Materials, Inc.
    Inventors: Kartik Ramaswamy, Kallol Bera, Kenneth S. Collins, Shahid Rauf
  • Publication number: 20130098872
    Abstract: An array of electron beam sources surrounding a processing region of a plasma reactor is periodically switched to change electron beam propagation direction and remove or reduce non-uniformities.
    Type: Application
    Filed: August 27, 2012
    Publication date: April 25, 2013
    Applicant: Applied Materials, Inc.
    Inventors: Leonid Dorf, Shahid Rauf, Kenneth S. Collins, Nipun Misra, James D. Carducci, Gary Leray, Kartik Ramaswamy
  • Publication number: 20130098871
    Abstract: An inductively coupled plasma source for a focused charged particle beam system includes a conductive shield within the plasma chamber in order to reduce capacitative coupling to the plasma. The internal conductive shield is maintained at substantially the same potential as the plasma source by a biasing electrode or by the plasma. The internal shield allows for a wider variety of cooling methods on the exterior of the plasma chamber.
    Type: Application
    Filed: October 19, 2011
    Publication date: April 25, 2013
    Applicant: FEI Company
    Inventors: Tom Miller, Shouyin Zhang
  • Patent number: 8425789
    Abstract: In anisotropic etching of the substrates, ultra-thin and conformable layers of materials can be used to passivate sidewalls of the etched features. Such a sidewall passivation layer may be a Self-assembled monolayer (SAM) material deposited in-situ etching process from a vapor phase. Alternatively, the sidewall passivation layer may be an inorganic-based material deposited using Atomic Layer Deposition (ALD) method. SAM or ALD s layer deposition can be carried out in a pulsing regime alternating with sputtering and/or etching processes using process gasses with or without plasma. Alternatively, SAM deposition is carried out continuously, while etch or sputtering turns on in a pulsing regime. Alternatively, SAM deposition and etch or sputtering may be carried out continuously.
    Type: Grant
    Filed: October 1, 2009
    Date of Patent: April 23, 2013
    Assignee: Rolith, Inc.
    Inventor: Boris Kobrin
  • Patent number: 8425792
    Abstract: A method of patterning a conductor on a substrate includes providing an inked elastomeric stamp inked with self-assembled monolayer-forming molecules and having a relief pattern with raised features. Then the raised features of the inked stamp contact a metal-coated visible light transparent substrate. Then the metal is etched to form an electrically conductive micropattern corresponding to the raised features of the inked stamp on the visible light transparent substrate.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: April 23, 2013
    Assignee: 3M Innovative Properties Company
    Inventors: Lijun Zu, Matthew H. Frey
  • Patent number: 8425982
    Abstract: Methods for fabricating arrays of nanoscaled alternating lamellar or cylinders in a polymer matrix having improved long range order utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: April 23, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Jennifer Kahl Regner
  • Publication number: 20130095669
    Abstract: A substrate can be appropriately oxidized, while oxidation of the substrate can be suppressed. The present invention includes a step of generating mixed plasma by causing a mixed gas of hydrogen (H2) gas and oxygen (O2) or oxygen-containing gas supplied to a processing chamber to form a plasma discharge, and processing the starting substrate by the mixed plasma; and a step of generating hydrogen plasma by causing hydrogen (H2) gas supplied to the processing chamber to form a plasma discharge, and processing the substrate by the hydrogen plasma.
    Type: Application
    Filed: November 8, 2012
    Publication date: April 18, 2013
    Applicant: Hitachi Kokusai Electric Inc.
    Inventor: Hitachi Kokusai Electric Inc.
  • Publication number: 20130092656
    Abstract: A method for etching a substrate includes etching at least one first layer of the substrate with a non-uniform substrate temperature and etching at least one second layer of the substrate with uniform substrate temperatures.
    Type: Application
    Filed: April 25, 2012
    Publication date: April 18, 2013
    Applicant: Applied Materials, Inc.
    Inventors: Kenny Linh Doan, Jong Mun Kim
  • Patent number: 8419961
    Abstract: An oil gas separation membrane combines a gas permeable yet oil and temperature resistant bulk polymer membrane such as poly(tetrafluoroethylene) and poly(tetrafluoroethylene-co-hexafluoropropylene); a porous metal support such as sintered metal frit disk made with stainless steel, bronze or nickel; and an highly gas permeable adhesive that bonds firmly the bulk polymer membrane and the metal frit surface together. The adhesive is either a homogenous polymer that has desirable gas permeability, or a coalescent porous polymer particulates network. A gas sensor employing the oil gas separation membrane for detecting and monitoring fault gases of oil filled electrical equipment requires no mechanical wearing or moving part such as pump and valve and the gas sensor is operated normally under various temperature and pressure conditions.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: April 16, 2013
    Assignee: Asensou Technologies Co., Ltd.
    Inventor: Ren Yan Qin
  • Patent number: 8420547
    Abstract: A plasma processing method performed in a plasma processing apparatus including a processing chamber accommodating a substrate in which a plasma is generated; a mounting table mounting the substrate, which is provided in the processing chamber and to which a plasma attraction high frequency voltage is applied; and a facing electrode provided to face the mounting table in the processing chamber, to which a negative DC voltage is applied, the method including: applying a plasma attraction high frequency voltage to the mounting table for a predetermined period of time; and stopping the application of the plasma attraction high frequency voltage to the mounting table. In the plasma processing method, the application of the plasma attraction high frequency voltage and stopping thereof are alternately repeated.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: April 16, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Yoshinobu Ooya
  • Patent number: 8419959
    Abstract: An electrode assembly for a plasma reaction chamber used in semiconductor substrate processing. The assembly includes an upper showerhead electrode which is mechanically attached to a backing plate by a series of spaced apart cam locks. A guard ring surrounds the backing plate and is movable to positions at which openings in the guard ring align with openings in the backing plate so that the cam locks can be rotated with a tool to release locking pins extending from the upper face of the showerhead electrode.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: April 16, 2013
    Assignee: Lam Research Corporation
    Inventors: Gregory R. Bettencourt, Gautam Bhattacharyya, Simon Gosselin Eng., Sandy Chao, Anthony de la Llera, Pratik Mankidy
  • Patent number: 8419958
    Abstract: Apparatus, systems and methods for plasma etching substrates are provided that achieve dissipation of charge build-up on a substrate being plasma etched to avoid notching or twisting in high aspect ratio contents and similar features. Charge build-up on a substrate being etched by plasma etching can be dissipated by a method for etching a substrate, the method comprising: providing a plasma processing chamber comprising a chamber enclosure and a substrate support adapted to support a substrate within the chamber enclosure; supporting a substrate on the substrate support; forming a plasma within the chamber enclosure such that a surface of the substrate is in contact with the plasma; etching the substrate by generating a negative bias on the substrate surface relative to the plasma; and intermittently changing the bias on the substrate surface to positive relative to the plasma. The present method can be integrated into known plasma processing systems.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: April 16, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Aaron R. Wilson
  • Patent number: 8414787
    Abstract: Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching function and concurrently form a protective coating on other regions. An electron beam provides activation to selective chemical species. In one example, reactive species are generated from a plasma source to provide an increased reactive species density. Addition of other gasses to the system can provide functions such as controlling a chemistry in a protective layer during a processing operation. In one example an electron beam array such as a carbon nanotube array is used to selectively expose a surface during a processing operation.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: April 9, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Neal R. Rueger, Mark J. Williamson, Gurtej S. Sandhu
  • Patent number: 8409467
    Abstract: A polishing liquid for polishing a barrier layer of a semiconductor integrated circuit, which liquid includes: a quaternary ammonium cation; a corrosion inhibiting agent; a polymer compound having a sulfo group at a terminal; inorganic particles; and an organic acid, the pH of the polishing liquid being in the range of 1 to 7.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: April 2, 2013
    Assignee: FUJIFILM Corporation
    Inventors: Toshiyuki Saie, Tetsuya Kamimura
  • Patent number: 8409995
    Abstract: Positioning accuracy of a component in a substrate processing apparatus can be improved higher than a conventional case without increasing the insertion accuracy of positioning pins into positioning holes. Provided is a substrate processing apparatus including a mounting table 110 including a susceptor 114 having a substrate mounting surface 115 on which a wafer W is mounted and a focus ring mounting surface 116 on which a focus ring 124 is mounted; a plurality of positioning pins 200 made of a material expandable in a diametric direction by heating. Each positioning pin is inserted into a positioning hole (first reference hole) formed in the focus ring mounting surface of the susceptor and into a positioning hole (second reference hole) formed in the focus ring, and expanded in the diametric direction by heating and fitted into the positioning holes, thus allowing a position of the focus ring to be aligned.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: April 2, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Yoshiyuki Kobayashi
  • Patent number: 8409459
    Abstract: A chamber component configured to be coupled to a processing chamber is described. The chamber component comprises one or more adjustable gas passages through which a process gas is introduced to the process chamber. The adjustable gas passage may be configured to form a hollow cathode that creates a hollow cathode plasma in a hollow cathode region having one or more plasma surfaces in contact with the hollow cathode plasma. Therein, at least one of the one or more plasma surfaces is movable in order to vary the size of the hollow cathode region and adjust the properties of the hollow cathode plasma. Furthermore, one or more adjustable hollow cathodes may be utilized to adjust a plasma process for treating a substrate.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: April 2, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Kazuki Denpoh, Peter L G Ventzek, Lin Xu, Lee Chen
  • Patent number: 8404136
    Abstract: There is provided a method for manufacturing a diffractive optical element that can suppress the generation of heat from the inside of an insulative substrate and stabilize an etching rate. A method for manufacturing a diffractive optical element composed of an insulative substrate whose surface has a bumpy structure includes a selecting step of selecting an insulative substrate having an electrical resistivity equal to or higher than a certain value by measuring electrical resistivity of insulative substrates; and an etching step of forming a bumpy structure by dry etching in a surface of the insulative substrate selected in the selecting step.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: March 26, 2013
    Assignees: Sumitomo Electric Industries, Ltd., Sumitomo Electric Hardmetal Corp.
    Inventors: Kenichi Kurisu, Hideaki Imamura
  • Patent number: 8404596
    Abstract: A plasma ashing method is used for removing a patterned resist film in a processing chamber after etching a portion of a low-k film from an object to be processed in the processing chamber by using the patterned resist film as a mask. The method includes a first step of supplying a reaction product removal gas including at least CO2 gas into the processing chamber, generating plasma of the reaction product removal gas by applying a high frequency power for the plasma generation, and removing reaction products deposited on an inner wall of the processing chamber; and a second step of supplying an ashing gas into the processing chamber, generating plasma of the ashing gas by applying a high frequency power for the plasma generation, and removing the resist film.
    Type: Grant
    Filed: May 9, 2011
    Date of Patent: March 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Shigeru Tahara, Naotsugu Hoshi
  • Patent number: 8404595
    Abstract: A plasma processing method for processing a target substrate uses a plasma processing apparatus which includes a vacuum evacuable processing vessel for accommodating the target substrate therein, a first electrode disposed in the processing vessel and connected to a first RF power supply for plasma generation and a second electrode disposed to face the first electrode. The method includes exciting a processing gas containing fluorocarbon in the processing vessel to generate a plasma while applying a negative DC voltage having an absolute value ranging from about 100 V to 1500 V or an RF power of a frequency lower than about 4 MHz to the second electrode. The target layer is etched by the plasma, thus forming recesses on the etching target layer based on the pattern of the resist layer.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: March 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masanobu Honda, Manabu Sato, Yoshiki Igarashi
  • Patent number: 8404137
    Abstract: A plasma processing apparatus includes a plurality of radio-frequency power supplies for supplying radio-frequency powers having frequencies different from each other, a common feeding line for superposing radio-frequency powers supplied respectively from the plurality of radio-frequency power supplies and feeding the superposed radio-frequency power to a same radio-frequency electrode, a radio-frequency power extracting device for extracting radio-frequency powers having predetermined frequencies from radio-frequency powers fed via the feeding line, and a radio-frequency voltage detector for measuring voltages of the radio-frequency powers having the predetermined frequencies extracted by the radio-frequency power extracting device.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: March 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Chishio Koshimizu, Naoki Matsumoto
  • Patent number: 8404135
    Abstract: A method for cleaning and refurbishing a chamber component includes placing a chamber component having process deposits on an exterior surface in a plasma vapor deposition chamber. The chamber component is bombarded with a plasma comprising Argon for a period of time sufficient to remove the process deposits from the exterior surface of the chamber component.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: March 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jian-Bin Chiou, Wen-Cheng Cheng, Wen-Sheng Wu
  • Patent number: 8404124
    Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: March 26, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
  • Patent number: 8404052
    Abstract: A method for cleaning the surface of a silicon substrate, covered by a layer of silicon oxide includes: a) exposing the surface for 60 to 900 seconds to a radiofrequency plasma, generated from a fluorinated gas, to strip the silicon oxide layer and induce the adsorption of fluorinated elements on the substrate surface, the power density generated using the plasma being 10 mW/cm2 to 350 mW/cm2, the fluorinated gas pressure being 10 mTorrs to 200 mTorrs, and the substrate temperature being lower than or equal to 300Ā° C.; and b) exposing the surface including the fluorinated elements for 5 to 120 seconds to a hydrogen radiofrequency plasma, to remove the fluorinated elements from the substrate surface, the power density generated using the plasma being 10 mW/cm2 to 350 mW/cm2, the hydrogen pressure being 10 mTorrs to 1 Torr, and the substrate temperature being lower than or equal to 300Ā° C.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: March 26, 2013
    Assignees: Centre National de la Recherche Scientifique, Ecole Polytechnique
    Inventors: Pere Roca I Cabarrocas, Mario Moreno
  • Publication number: 20130071619
    Abstract: A nano-composite 10 is described, including a matrix resin 1, metal fine-particles 3 immobilized in the matrix resin 1, a binding species 7 immobilized on a part or all of the metal fine-particles 3, and metal fine-particles 9 indirectly immobilized on the metal fine-particles 3 via the binding species 7. Each of at least a part of the metal fine-particles 3 has a portion embedded in the matrix resin 1, and a portion (exposed portion 3a) exposed outside of the matrix resin 1, while the binding species 7 is immobilized on the exposed portions.
    Type: Application
    Filed: May 20, 2011
    Publication date: March 21, 2013
    Applicants: NIPPON STEEL & SUMIKIN CHEMICAL CO., LTD., TOKYO INSTITUTE OF TECHNOLOGY
    Inventors: Kotaro Kajikawa, Yasushi Enomoto, Yasufumi Matsumura, Ryuzo Shinta
  • Patent number: 8398813
    Abstract: The present invention provides a processing apparatus and a processing method, both of which can carry out a low-temperature process to allow active gas species to react with an oxide film on an object to be processed to form a product film and a heating process to heat the object to a predetermined temperature to evaporate the product film, in succession. This processing apparatus 12 is provided with a shielding plate 103 capable of entering a gap between the object W and a transparent window 28 and also withdrawing from the gap. On condition that the shielding plate 103 is closed to cut off irradiation heat from the transparent window 28, the product film is formed by allowing the active gas species of NF3 gas to react with a native oxide film on the object under the low-temperature condition. After that, upon closing the shielding plate 103, the native oxide film is removed by applying heat irradiated from a heating lamp 36 to the product film through the transparent window 28.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: March 19, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Yasuo Kobayashi, Masao Yoshioka
  • Patent number: 8399795
    Abstract: This invention relates to a plasma surface modification process (and a corresponding a system) of a solid object (100) comprising creating plasma (104) by a plasma source (106), application of the plasma (104) to at least a part of a surface (314) of the solid object (100), generating ultrasonic high intensity and high power acoustic waves (102) by at least one ultrasonic high intensity and high power acoustic wave generator (101), wherein the ultrasonic acoustic waves are directed to propagate towards said surface (314) of the object (100) so that a laminar boundary layer (313) of a gas or a mixture of gases (500) flow in contact with said solid object (100) is thinned or destructed for at least a part of said surface (314). In this way, the plasma can more efficiently access and influence the surface of the solid object to be treated by the plasma, which speeds the process time up significantly.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: March 19, 2013
    Assignees: Force Technology, Technical University of Denmark
    Inventors: Niels Krebs, Alexander Bardenshtein, Yukihiro Kusano, Henrik Bindslev, Henrik Junge Mortensen
  • Patent number: 8398875
    Abstract: Methods for orienting an upper electrode relative to a lower electrode are provided. The lower electrode is configured to have a desired existing orientation in a process chamber to define active and inactive process zones in the process chamber for processing a wafer. The method includes configuring each electrode with a reference surface, where a lower electrode reference surface is in the desired existing orientation and an upper electrode reference surface to be oriented parallel to the lower electrode reference surface. Then, temporarily holding the upper electrode reference surface oriented parallel to the lower electrode reference surface, and securing the upper electrode to a drive to mount the upper electrode reference surface parallel to the lower electrode reference surface. Other method configurations are also disclosed and illustrated.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: March 19, 2013
    Assignee: Lam Research Corporation
    Inventors: Gregory S. Sexton, Andrew D. Bailey, III, Alan M. Schoepp, John D. Boniface
  • Patent number: 8398865
    Abstract: A method of manufacturing a mechanical part includes the steps of providing a micro-machinable substrate; etching a pattern which includes the part through the entire substrate using photolithography; mounting the etched substrate on a support so as to leave the top and bottom surfaces of said substrate accessible for coating; depositing a tribological quality improving coating of on the outer surface of the part; and releasing the part from the substrate.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: March 19, 2013
    Assignee: The Swatch Group Research and Development Ltd
    Inventors: Rudolf Dinger, Thierry Ravenel
  • Patent number: 8398876
    Abstract: A method for chemical modification of graphene includes dry etching graphene to provide an etched graphene; and introducing a functional group at an edge of the etched graphene. Also disclosed is graphene, including an etched edge portion, the etched portion including a functional group.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: March 19, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won Mook Choi, Byung Hee Hong, Jaeyoung Choi
  • Patent number: 8398868
    Abstract: An opening in a substrate is formed, e.g., using optical lithography, with the opening having sidewalls whose cross section is given by segments that are contoured and convex. The cross section of the opening may be given by overlapping circular regions, for example. The sidewalls adjoin at various points, where they define protrusions. A layer of polymer including a block copolymer is applied over the opening and the substrate, and allowed to self-assemble. Discrete, segregated domains form in the opening, which are removed to form holes, which can be transferred into the underlying substrate. The positions of these domains and their corresponding holes are directed to predetermined positions by the sidewalls and their associated protrusions. The distances separating these holes may be greater or less than what they would be if the block copolymer (and any additives) were to self-assemble in the absence of any sidewalls.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: March 19, 2013
    Assignee: International Business Machines Corporation
    Inventors: Joy Cheng, Kafai Lai, Wai-Kin Li, Young-Hye Na, Charles Rettner, Daniel P. Sanders
  • Publication number: 20130062014
    Abstract: A plasma system for treating a workpiece is disclosed. The plasma system includes: a plasma device including an electrode formed from a metal alloy and a dielectric layer covering the electrode, the dielectric layer including a distal portion extending distally past a distal end of the electrode by a predetermined distance; a liquid source configured to supply a liquid to a workpiece; an ionizable media source coupled to the plasma device and configured to supply ionizable media thereto; and a power source coupled to the electrode and configured to ignite the ionizable media at the plasma device to form a plasma effluent in the presence of the liquid, whereby the plasma effluent reacts with the liquid to form at least one reactive species that interacts with the workpiece.
    Type: Application
    Filed: March 31, 2010
    Publication date: March 14, 2013
    Applicant: COLORADO STATE UNIVERSITY RESEARCH FOUNDATION
    Inventors: Il-Gyo Koo, George J. Collins
  • Patent number: 8393073
    Abstract: A method for constructing a magnetoresistive sensor that avoids shadowing effects of a mask structure during sensor definition. The method includes the use of an antireflective coating (ARC) and a photosensitive mask deposited there over. The photosensitive mask is formed to cover a desired sensor area, leaving non-sensor areas exposed. A reactive ion etch is performed to transfer the pattern of the photosensitive mask onto the underlying ARC layer. The reactive ion etch (RIE) is performed with a relatively high amount of platen power. The higher platen power increases ion bombardment of the wafer, thereby increasing the physical (ie mechanical) component of material removal relative to the chemical component. This increase in the physical component of material removal result in an increased rate of removal of the photosensitive mask material relative to the ion mill resistant mask.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: March 12, 2013
    Assignee: HGST Netherlands B.V.
    Inventors: Richard Jule Contreras, Michael Feldbaum, Mustafa Michael Pinarbasi
  • Patent number: 8394280
    Abstract: Methods of patterning a material are disclosed. A first resist pattern is formed on a field. A protective layer is formed over the first resist pattern and at least a portion of the field. A second resist pattern is formed over a portion of the protective layer. A portion of a material to be patterned deposited adjacent to the first and second resist patterns is removed.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: March 12, 2013
    Assignee: Western Digital (Fremont), LLC
    Inventors: Dujiang Wan, Hai Sun, Hongping Yuan, Ling Wang, Xianzhong Zeng
  • Patent number: 8394722
    Abstract: A method for controlling critical dimension (CD) of etch features in an etch layer disposed below a functionalized organic mask layer disposed below an intermediate mask layer, disposed below a patterned photoresist mask, which forms a stack is provided. The intermediate mask layer is opened by selectively etching the intermediate mask layer with respect to the patterned photoresist mask. The functionalized organic mask layer is opened. The functionalized organic mask layer opening comprises flowing an open gas comprising COS, forming a plasma, and stopping the flowing of the open gas. The etch layer is etched.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: March 12, 2013
    Assignee: Lam Research Corporation
    Inventors: Gerardo A. Delgadino, Robert C. Hefty
  • Patent number: 8394231
    Abstract: That surface of an electrode plate 20 which is opposite to a susceptor 10 has a projection shape. The electrode plate 20 is fitted in an opening 26a of shield ring 26 at a projection 20a. At this time, the thickness of the projection 20a is approximately the same as the thickness of the shield ring 26. Accordingly, the electrode plate 20 and the shield ring 26 form substantially the same plane. The major surface of the projection 20a has a diameter 1.2 to 1.5 times the diameter of a wafer W. The electrode plate 20 is formed of, for example, SiC.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: March 12, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Koichi Takatsuki, Hikaru Yoshitaka, Shigeo Ashigaki, Yoichi Inoue, Takashi Akahori, Shuuichi Ishizuka, Syoichi Abe, Takashi Suzuki, Kohei Kawamura, Hidenori Miyoshi, Gishi Chung, Yasuhiro Oshima, Hiroyuki Takahashi
  • Publication number: 20130048599
    Abstract: The present invention provides a method for stably generating cleaning plasma regardless of a condition of CO-containing plasma. When a magnetic film formed on a wafer 802 to be etched is processed with the CO-containing plasma which is generated by applying a source electric power to a CO-containing gas containing elements of C and O, which has been introduced into a vacuum chamber 801, to convert the CO-containing gas into a plasma state, the method includes: applying predetermined processing to the magnetic film formed on the wafer 802 to be etched by using the CO-containing plasma; then introducing a cleaning gas into the vacuum chamber in a state of applying the source electric power 806 to the antenna; and then stopping the introduction of the CO-containing gas into the vacuum chamber to thereby generate the cleaning plasma with the use of a predetermined cleaning gas.
    Type: Application
    Filed: February 1, 2012
    Publication date: February 28, 2013
    Inventors: Makoto SATAKE, Makoto Suyama, Masato Ishimaru, Yasukiyo Morioka
  • Publication number: 20130048606
    Abstract: Embodiments of the invention include methods for in-situ chamber dry cleaning a plasma processing chamber utilized for photomask plasma fabrication process. In one embodiment, a method for in-situ chamber dry clean after photomask plasma etching includes performing an in-situ pre-cleaning process in a plasma processing chamber, supplying a pre-cleaning gas mixture including at least an oxygen containing gas into the plasma processing chamber while performing the in-situ pre-cleaning process, providing a substrate into the plasma processing chamber, performing an etching process on the substrate, removing the substrate from the substrate, and performing an in-situ post cleaning process by flowing a post cleaning gas mixture including at least an oxygen containing gas into the plasma processing chamber.
    Type: Application
    Filed: August 31, 2011
    Publication date: February 28, 2013
    Inventors: Zhigang Mao, Xiaoyi Chen, Keven Yu, Michael Grimbergen, Madhavi Chandrahood, Amitabh Sabharwal, Ajay Kumar
  • Patent number: 8383001
    Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Hiromasa Mochiki, Yoshinobu Ooya, Fumio Yamazaki, Toshio Haga
  • Patent number: 8383002
    Abstract: The disclosure concerns a method of processing a workpiece or in a plasma reactor chamber, using independent gas injection at the wafer edge.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: February 26, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Dan Katz, David Palagashvili, Michael D. Willwerth, Valentin N. Todorow, Alexander M. Paterson
  • Patent number: 8382940
    Abstract: A device (6) and a method for generating chlorine trifluoride is described, a high-density plasma (105) being generated in the interior of a plasma reactor (100) using plasma generating means (110, 120, 130, 150, 155, 160, 170, 180), and a first gas and a second gas, which react with one another under the influence of the high-density plasma (105) in the plasma reactor (100) under the formation of chlorine trifluoride, being supplied to the plasma reactor (100) via gas supply means (21, 22, 25, 26). In addition, a gas outlet (20) is provided, via which the generated chlorine trifluoride can be removed from the plasma reactor (100).
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: February 26, 2013
    Assignee: Robert Bosch GmbH
    Inventor: Franz Laermer
  • Patent number: 8383000
    Abstract: A distance between electrodes can be accurately measured by using a lifter. A substrate processing apparatus includes an upper electrode 120 and a lower electrode 310 facing each other within a processing chamber 102; a lift pin 332 that is protrusible from and retractable below the lower electrode and lifts up a substrate mounted on the lower electrode to be separated from the lower electrode; a lifter 330 that elevates the lift pin up and down; and a controller 400 that elevates the lift pin upward and brings the lift pin into contact with the upper electrode by driving the lifter while the substrate is not mounted on the lower electrode and measures a distance between the electrodes based on a moving distance of the lifter.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Tsujimoto, Makoto Kobayashi, Jun Tamura, Nobuhiro Wada
  • Publication number: 20130043212
    Abstract: A method of manufacturing a substrate with a patterned layer of deposited material, the patterned layer being deposited from a processing head, the method comprising applying bearing gas from the processing head to keep the processing head hovering over the substrate on a gas bearing; moving the substrate and the hovering processing head relative to each other; applying a primer material for selective deposition of a deposition material to the substrate, the primer material being applied from a first area of a surface of the processing head that faces the substrate, and spatially patterning the primer on the substrate after or during application; applying the deposition material to the substrate from a second area of the surface of the processing head that faces the substrate, the second area lying downstream of the first area in a direction of the movement of the substrate relative to the processing head.
    Type: Application
    Filed: February 17, 2011
    Publication date: February 21, 2013
    Applicant: Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO
    Inventors: Ariƫl De Graaf, Erwin John Van Zwet, Paulus Willibrordus George Poodt, Adrianus Johannes Petrus Maria Vermeer
  • Patent number: 8375564
    Abstract: A method provides a pole of magnetic recording transducer. A nonmagnetic stop layer having a thickness and a top surface is provided. A depression that forms a bevel is provided in the stop layer. The bevel has a depth less than the thickness and a bevel angle with respect to a remaining portion of the top surface. The bevel angle is greater than zero and less than ninety degrees. An intermediate layer having a substantially flat top surface is provided over the stop layer. A trench is formed in the intermediate layer via a removal process. The trench has a profile corresponding to the pole. The stop layer is a stop for the removal process. The method also includes providing the pole in the trench. The pole has a leading edge bevel corresponding to the bevel in the stop layer.
    Type: Grant
    Filed: December 8, 2009
    Date of Patent: February 19, 2013
    Assignee: Western Digital (Fremont), LLC
    Inventors: Guanghong Luo, Danning Yang, Weimin Si, Dujiang Wan, Yun-Fei Li, Lijie Guan, Ming Jiang
  • Patent number: 8377315
    Abstract: A method for manufacturing porous microstructures in a silicon semiconductor substrate, porous microstructures manufactured according to this method, and the use thereof.
    Type: Grant
    Filed: November 19, 2008
    Date of Patent: February 19, 2013
    Assignee: Robert Bosch GmbH
    Inventors: Dick Scholten, Tjalf Pirk, Michael Stumber, Franz Laermer, Ralf Reichenbach, Ando Feyh
  • Patent number: 8377829
    Abstract: A substrate is provided having an oxide layer, a first nitride-silicon, a STI, and a second nitride-silicon. A pattern poly-silicon layer on the second nitride-silicon layer is etched to form a deep trench opening. Etching the pattern poly-silicon layer also deepens the deep trench opening. Then, a conductive layer is filled in the deep trench opening.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: February 19, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Ta-Chuan Yeh, Ni-Min Chung, Kao-Su Huang, Yung-Chang Lin, Ruey-Chyr Lee, Chien-Kuo Wang
  • Patent number: 8377319
    Abstract: Techniques are provided for forming nozzles in a microelectromechanical device. The nozzles are formed in a layer prior to the layer being bonded onto another portion of the device. Forming the nozzles in the layer prior to bonding enables forming nozzles that have a desired depth and a desired geometry. Selecting a particular geometry for the nozzles can reduce the resistance to ink flow as well as improve the uniformity of the nozzles across the microelectromechanical device.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: February 19, 2013
    Assignee: FUJIFILM Dimatix, Inc.
    Inventors: Zhenfang Chen, Andreas Bibl, Paul A. Hoisington