Light Responsive Or Combined With Light Responsive Device Patents (Class 257/290)
  • Publication number: 20100127313
    Abstract: Provided is a pixel for picking up an image signal capable of suppressing an occurrence of a cross-talk. The pixel for picking up an image signal includes a substrate surrounded by a trench, a photodiode, and a pass transistor. The photodiode is formed at an upper portion of the substrate and includes a P-type diffusion area and an N-type diffusion area which are joined with each other in a longitudinal direction. The pass transistor is formed at the upper portion of the substrate and includes the one terminal that is the joined P-type diffusion area and the N-type diffusion area, the other terminal that is a floating diffusion area, and a gate terminal disposed between the two terminals. The pixel for picking up an image signal is surrounded by the trench which penetrates the substrate from the upper portion to the lower portion of the substrate, and the trench is tilled with an insulator.
    Type: Application
    Filed: August 10, 2007
    Publication date: May 27, 2010
    Inventor: Do Young Lee
  • Publication number: 20100127279
    Abstract: A solid state radiation detector capable of improving the sharpness of obtained radiation images. The solid state radiation detector includes: two scintillator layers that convert irradiated radiation to light; and a solid state photodetector, disposed between the two scintillators, that detects the light converted by the two scintillator layers and converts the detected light to electrical signals. Here, the scattering length of each of the scintillators is not greater than 100 ?m for the light propagating in the direction parallel to the surface of the scintillator.
    Type: Application
    Filed: November 15, 2006
    Publication date: May 27, 2010
    Inventor: Kenji Takahashi
  • Patent number: 7723766
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: May 25, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 7719028
    Abstract: A semiconductor light-receiving device and its manufacturing method are provided which are capable of suppressing dark current and deterioration. Semiconductor crystals were sequentially grown over an n-type InP substrate, including an n-type InP buffer layer, an undoped GaInAs light absorption layer, an undoped InP diffusion buffer layer, and a p-type InP window layer. Next, a first mesa was formed by removing a part from the p-type InP window layer to the n-type InP buffer layer with a Br-based etchant having low etching selectivity, so as to form a sloped “normal” mesa structure. Next, a second mesa having a smaller diameter than the first mesa was formed by dry etching, by precisely removing a part from the p-type InP window layer to a certain mid position of the undoped InP diffusion buffer layer.
    Type: Grant
    Filed: April 15, 2008
    Date of Patent: May 18, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Eiji Yagyu, Eitaro Ishimura, Masaharu Nakaji
  • Patent number: 7719590
    Abstract: A pixel sensor cell of improved dynamic range comprises a coupling transistor that couples a capacitor device to a photosensing region (e.g., photodiode) of the pixel cell, the photodiode being coupled to a transfer gate and one terminal of the coupling transistor. In operation, the additional capacitance is coupled to the pixel cell photodiode when the voltage on the photodiode is drawn down to the substrate potential. Thus, the added capacitance is only connected to the imager cell when the cell is nearing its charge capacity. Otherwise, the cell has a low capacitance and low leakage. In an additional embodiment, a terminal of the capacitor is coupled to a “pulsed” supply voltage signal that enables substantially full depletion of stored charge from the capacitor to the photosensing region during a read out operation of the pixel sensor cell. In various embodiments, the locations of the added capacitance and photodiode may be interchanged with respect to the coupling transistor.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: May 18, 2010
    Assignee: International Business Machines Corporation
    Inventors: John J. Ellis-Monaghan, Alain Loiseau, Kirk D. Peterson
  • Publication number: 20100109059
    Abstract: Disclosed herein is a semiconductor device, including: a gate electrode formed on a semiconductor substrate through a gate insulating film; an extension region formed in the semiconductor substrate on a source side of the gate electrode; a source region formed in the semiconductor substrate on the source side of the gate electrode through the extension region; an LDD region formed in the semiconductor substrate on a drain side of the gate electrode; and a drain region formed in the semiconductor substrate on the drain side of the gate electrode through the LDD region; wherein the extension region is formed at a higher concentration than that of the LDD region so as to be shallower than the LDD region.
    Type: Application
    Filed: October 23, 2009
    Publication date: May 6, 2010
    Applicant: SONY CORPORATION
    Inventor: Ryosuke Nakamura
  • Patent number: 7709918
    Abstract: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region and above the first pattern, and microlenses provided above the photoelectric conversion elements with the first and the second patterns provided therebetween. The photoelectric conversion device further has convex-shaped interlayer lenses in optical paths between the photoelectric conversion elements and the microlenses, the peak of each convex shape projecting in the direction from the electro-optical element to the microlens.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: May 4, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Sakae Hashimoto
  • Patent number: 7709780
    Abstract: A photoelectric conversion device is configured to include a light receiving region, for converting light to signal charges, and transistors. An insulation film is arranged on a surface of the light receiving region and under gate electrodes of the transistors. A first reflection prevention film of a refractive index higher than that of the insulation film is arranged at least above the light receiving region, to sandwich the insulation film between the first reflection prevention film and the light receiving region, and includes a silicon nitride film. An interlayer insulation film is arranged on the first reflection prevention film, and a second reflection prevention film is laminated between the first reflection prevention film and the interlayer insulation film. At least one of side walls of the gate electrodes of the transistors includes the silicon nitride film and a silicon oxide film arranged between the silicon nitride film and the gate electrodes.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: May 4, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shunsuke Inoue, Hiroshi Yuzurihara, Tetsuya Itano
  • Patent number: 7709870
    Abstract: A solid-state image pickup device includes a semiconductor substrate including a substrate main body having P-type impurities and a first N-type semiconductor layer provided on the substrate main body, an image pickup area including a plurality of photoelectric converters in which the plurality of photoelectric converters include second N-type semiconductor layers, the second N-type semiconductor layers being provided on a surface portion of the first N-type semiconductor layer independently of one another, and a first peripheral circuit area including a first P-type semiconductor layer formed on the first N-type semiconductor layer. The solid-state image pickup device further includes a second peripheral circuit area including a second P-type semiconductor layer formed on the first N-type semiconductor layer and connected to the substrate main body.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: May 4, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ikuko Inoue, Hiroshige Goto, Hirofumi Yamashita, Hisanori Ihara, Nagataka Tanaka, Tetsuya Yamaguchi
  • Patent number: 7709920
    Abstract: A photodiode that can separately detect the intensities of the three wavelength ranges of ultraviolet light of 400 nm or below includes an insulating layer; and a plurality of silicon semiconductor layers having different thicknesses formed on the insulating layer, wherein each of the plurality of silicon semiconductor layers has a low-concentration diffusion layer formed by diffusing one of a P-type impurity or an N-type impurity therein with a low concentration; a P-type high-concentration diffusion layer formed by diffusing a P-type impurity therein with a high concentration; and an N-type high-concentration diffusion layer formed by diffusing an N-type impurity therein with a high concentration, and wherein the P-type high-concentration diffusion layer and the N-type high-concentration diffusion layer formed in a respective one of the plurality of silicon semiconductor layers are arranged to face each other with the low-concentration diffusion layer interposed there between.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: May 4, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Noriyuki Miura
  • Patent number: 7709868
    Abstract: In a light sensing element having simplified structure, an array substrate having the light sensing element and an LCD apparatus having the light sensing element, the light sensing element includes a first electrode, a control electrode and a second electrode. An alternating bias voltage is applied to the first electrode. An off voltage is applied to the control electrode. The second electrode outputs a light-induced leakage current based on an externally provided light and the bias voltage. Therefore, the array substrate includes one light sensing switching element corresponding to one pixel so that structure of the array substrate is simplified and opening ratio is increased.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: May 4, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Jin Pak, Hyung-Guel Kim, Kee-Han Uh, Jong-Whan Cho, Jin Jeon, Young-Bae Jung
  • Patent number: 7705370
    Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based photodetector comprising an active region including at least a portion of the monocrystalline silicon layer.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: April 27, 2010
    Assignee: Massachusetts Institute of Technology
    Inventor: Eugene A. Fitzgerald
  • Patent number: 7704781
    Abstract: The present invention, in the various exemplary embodiments, provides a RGB color filter array. The red, green and blue pixel cells are arranged in a honeycomb pattern. The honeycomb layout provides the space to vary the size of pixel cells of an individual color so that, for example, the photosensor of blue pixels can be made larger than that of the red or green pixels. In another aspect of the invention, depicted in the exemplary embodiments, the honeycomb structure can also be implemented with each pixel rowing having a same color of pixel cells which can simplify can conversion in the readout circuits. In another aspect of the invention, the RGB honeycomb pixel array may be implemented using a shared pixel cell architecture.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: April 27, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Jeffrey A. McKee
  • Patent number: 7705381
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: April 27, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Publication number: 20100096674
    Abstract: Gray-tone lithography technology is used in combination with a reactive plasma etching operation in the fabrication method and system of a thick semiconductor drift detector. The thick semiconductor drift detector is based on a trench array, where the trenches in the trench array penetrate the bulk with different depths. These trenches form an electrode. By applying different electric potentials to the trenches in the trench array, the silicon between neighboring trenches fully depletes. Furthermore, the applied potentials cause a drifting field for generated charge carriers, which are directed towards a collecting electrode.
    Type: Application
    Filed: October 19, 2009
    Publication date: April 22, 2010
    Inventors: Marc Christophersen, Bernard F. Phlips
  • Patent number: 7695992
    Abstract: A vertical-type CMOS image sensor and a fabricating method thereof by which capacitance between an upper line and a dark shield layer can be effectively reduced. The vertical-type CMOS image sensor can include an inter-metal dielectric layer having a plurality of metal lines formed over a semiconductor substrate; a passivation oxide layer formed over the inter-metal dielectric layer, wherein the uppermost surface of the passivation oxide layer includes an inclined portion between a lower portion and an upper portion corresponding to a portion of the inter-metal dielectric layer having a plurality of the metal lines; a dark shield layer formed over the upper portion of the passivation oxide layer; and a nitride layer formed over the semiconductor substrate including the dark shield layer.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: April 13, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Sang-Gi Lee
  • Patent number: 7696546
    Abstract: A silicide layer (first silicide layer, second silicide layer) is laminated on top laminate surfaces of gates of a transmission transistor and a reset transistor, respectively. Each of the first silicide layer and the second silicide layer respectively formed on each of the gates extends in a direction along the main surface of the semiconductor substrate among at least a portion of a plurality of image pixels, connecting gates with one another among the respective image pixels. On the other hand, a signal outputter is not in contact with any silicide layers, has the top laminate surface that is covered with an insulating layer, and is connected with other transistors via a metal wiring layer.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: April 13, 2010
    Assignee: Panasonic Corporation
    Inventors: Tatsuya Hirata, Shouzi Tanaka, Ryohei Miyagawa
  • Patent number: 7692226
    Abstract: A CMOS image sensor includes a photodiode, and a plurality of transistors for transferring charges accumulated at the photodiode to one column line, wherein at least one transistor among the plurality of transistors has a source region wider than a drain region, for increasing a driving current.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: April 6, 2010
    Inventor: Won-Ho Lee
  • Patent number: 7687757
    Abstract: A method for designing a microlens array on a pixel array is disclosed. A radial distance of each pixel from a central pixel in a pixel array is calculated, in which the central pixel acts as an origin of an X-Y coordinate. A chief ray angle of each pixel is determined according to the corresponding radial distance. A microlens shift with respect to the corresponding pixel is determined according to the corresponding chief ray angle. Each microlens shift combines an X-axis direction shift with a Y-axis direction shift, and the X-axis direction shift ratio is different from the Y-axis direction shift ratio. A plurality of microlenses is arranged according to the corresponding microlens shifts to form a microlens array on the pixel array.
    Type: Grant
    Filed: January 29, 2009
    Date of Patent: March 30, 2010
    Assignee: VisEra Technologies Company Limited
    Inventors: Chi-Xiang Tseng, Chin-Poh Pang, Cheng-Lin Yang, Wu-Chieh Liu
  • Publication number: 20100072380
    Abstract: Methods and apparatus are described for space charge dosimeters for extremely low power measurements of radiation in shipping containers. A method includes insitu polling a suite of passive integrating ionizing radiation sensors including reading-out dosimetric data from a first passive integrating ionizing radiation sensor and a second passive integrating ionizing radiation sensor, where the first passive integrating ionizing radiation sensor and the second passive integrating ionizing radiation sensor remain situated where the dosimetric data was integrated while reading-out.
    Type: Application
    Filed: March 18, 2009
    Publication date: March 25, 2010
    Inventors: Charles L. Britton, JR., Mark A. Buckner, Gregory R. Hanson, William L. Bryan
  • Publication number: 20100072407
    Abstract: A device and method for managing terahertz and/or microwave radiation are provided. The device can comprise one or more field effect transistors (FETs) that each include at least one channel contact to a central region of the device channel of the FET. The frequency of the radiation managed by the device can be tuned/adjusted by applying a bias voltage to the FET. The radiation can be impinged on the device, and can be detected by measuring a voltage that is induced by the radiation. Further, the device can generate terahertz and/or microwave radiation by, for example, inducing a voltage between two edge contacts on either side of the device channel and applying the voltage to the channel contact.
    Type: Application
    Filed: December 1, 2009
    Publication date: March 25, 2010
    Inventors: Michael Shur, Remigijus Gaska
  • Patent number: 7683311
    Abstract: The invention, in various exemplary embodiments, incorporates a photonic crystal filter into an image sensor. The photonic crystal filter comprises a substrate and a plurality of pillars forming a photonic crystal structure over the substrate. The pillars are spaced apart from each other. Each pillar has a height and a horizontal cross sectional shape. A material with a different dielectric constant than the pillars is provided within the spacing between the pillars. The photonic crystal filter is configured to selectively permit particular wavelengths of electromagnetic radiation to pass through.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: March 23, 2010
    Assignee: Aptina Imaging Corporation
    Inventor: Chandra Mouli
  • Patent number: 7683309
    Abstract: A photosensor includes a metal conductive layer, an interface dielectric layer, a silicon-rich dielectric layer and a transparent conductive layer. The interface dielectric layer is formed on the metal conductive layer. The silicon-rich dielectric layer is formed on the interface dielectric layer. The transparent conductive layer is formed on the silicon-rich dielectric layer. A method for fabricating a photosensor is also disclosed herein.
    Type: Grant
    Filed: January 2, 2009
    Date of Patent: March 23, 2010
    Assignee: AU Optronics Corporation
    Inventors: Shin-Shueh Chen, Wan-Yi Liu, Chia-Tien Peng, Tsung-Yi Hsu, Jen-Pei Tseng
  • Patent number: 7683382
    Abstract: An organic light emitting diode display includes a plurality of pixels. Each pixel includes a light emitting element and a driving transistor coupled to the light emitting element. The pixels may be arranged in a matrix. The pixels include first pixels, second pixels, and third pixels, the driving transistors of the first to the third pixels occupy different areas, and the light emitting elements of the first to the third pixels occupy substantially equal area.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: March 23, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Chul Jung, In-Su Joo
  • Patent number: 7679114
    Abstract: An object is to provide a solid state image pickup device and a camera which do not worsen a sensor performance in terms of an optical property, a saturated charge amount and the like. A solid state image sensor including a pixel region having a plurality of pixels includes at least a photodiode and an amplifying portion amplifying photocharges outputted from the photodiode in the pixel region, and further includes a well electrode for taking well potential of a well region in which the amplifying portion is arranged. Between the well electrode and the photodiode, no element isolation regions by an insulation film are arranged. Moreover, on the surface of a first semiconductor region in which the photodiode stores the charges, a second semiconductor layer of a conductivity type reverse to that of the first semiconductor region is arranged.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: March 16, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toru Koizumi
  • Patent number: 7675101
    Abstract: Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: March 9, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 7671391
    Abstract: A lower cost range-finding image sensor based upon measurement of reflection time of light with reduced fabrication processes compared to standard CMOS manufacturing procedures. An oxide film is formed on a silicon substrate, and two photo-gate electrodes for charge-transfer are provided on the oxide film. Floating diffusion layers for taking charges out from a photodetector layer are provided at the ends of the oxide film, and on the outside thereof are provided a gate electrode for resetting and a diffusion layer for providing a reset voltage.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: March 2, 2010
    Assignee: National University Corporation Shizuoka University
    Inventor: Shoji Kawahito
  • Patent number: 7667249
    Abstract: A semiconductor device includes: a semiconductor element provided on a semiconductor layer; a light-blocking wall provided around the semiconductor element; and a wiring layer electrically coupled to the semiconductor element and extended from an aperture not having the light-blocking wall to an outside of the light-blocking wall; wherein the wiring layer has a pattern containing a first section positioned in the aperture and a second section which has a width not narrower than a width of the aperture by providing a branched portion intersecting with an extension direction of the wiring layer; and wherein a surface of the branched portion facing outside of the light-blocking wall includes thereon a convex part.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: February 23, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Susumu Inoue, Yo Takeda, Yutaka Maruo
  • Publication number: 20100039546
    Abstract: A photosurface for receiving and registering light from a scene, the photosurface comprising: a first semiconductor region in which electron-hole pairs are generated responsive to light incident on the photosurface; a single, first conductive region substantially overlaying all of the first semiconductor region; at least one second semiconductor region surrounded by the first semiconductor region; a different second conductive region for each second semiconductor region that surrounds the second semiconductor region and is electrically isolated from the first conductive region; wherein when the second conductive region is electrified positive with respect to the first conductive region, electrons generated by light incident on the first semiconductor region are collected in the second semiconductor region.
    Type: Application
    Filed: July 17, 2009
    Publication date: February 18, 2010
    Applicant: MICROSOFT INTERNATIONAL HOLDINGS B.V.
    Inventors: David COHEN, Amit SHACHAM
  • Patent number: 7659541
    Abstract: A liquid crystal display, in accordance with the present invention, includes a first substrate having a thin film transistor and a first electrode formed thereon. The first electrode is electrically connected to the thin film transistor. A first insulating layer is formed on the first substrate including the thin film transistor and the first electrode and a window is formed in the first insulating layer, the window exposing a predetermined region of the first electrode. A second electrode is provided on the first insulating layer and electrically connected to the first electrode. A second substrate includes a third electrode formed thereon. A first gap is formed between a surface of the third electrode and a surface of the predetermined region of the first electrode, and a second gap is formed between the surface of the third electrode and a surface of the second electrode. A liquid crystal layer is interposed between the first gap and the second gap.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: February 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Kyu Jang, Jae-Hyun Kim, Sang-Woo Kim, Jae-Young Lee, Sung-Eun Cha, Young-Nam Yun
  • Publication number: 20100019293
    Abstract: The objective of this invention is to provide a semiconductor device containing a photodiode and having stable, high sensitivity with respect to short wavelength light near 405 nm, and a manufacturing method for said semiconductor device. PIN photodiode (100C) has the following layers formed on silicon substrate (110): p-type silicon region (112), n-type silicon layer (114), field oxide film (118), silicon oxide film (120c) that covers the surface of the active region, and silicon nitride film (122c) that covers silicon oxide film (120c). Said field oxide film (118) contains extending portions (160) extending to the interior of the active region; the side portions of extending portions (160) are connected to silicon oxide film (120c), and the exposed surface portions of extending portions (160) become regions for hydrogen diffusion.
    Type: Application
    Filed: July 28, 2009
    Publication date: January 28, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroyuki TOMOMATSU, Yukihisa HIROTSUGU
  • Publication number: 20100006138
    Abstract: Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICS, improvement in refresh time for DRAM's, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFET's, and a host of other applications.
    Type: Application
    Filed: August 27, 2009
    Publication date: January 14, 2010
    Inventor: G. R. Mohan Rao
  • Patent number: 7642580
    Abstract: An imager pixel and imaging device and system including an imager pixel for discharging a floating diffusion region are described. The imager pixel includes a photoconversion regions floating diffusion region, and a reset diode. A reset diode is coupled to the floating diffusion region and, when activated, discharges accumulated and collected charge from the photoconversion and the floating diffusion regions. Following successive accumulation, transfer and collection processes, the reset diode again discharges residual accumulated and collected charge from the photoconversion and the floating diffusion regions.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: January 5, 2010
    Assignee: Apitina Imaging Corporation
    Inventor: Robert R. Rhodehouse
  • Patent number: 7642581
    Abstract: A solid-state image sensing device has a pixel that includes a photodiode that generates an electrical charge according to an amount of incoming light, a floating diffusion portion, a charge transfer transistor that transfers the electrical charge to the floating diffusion portion from the photoelectric conversion portion, a reading circuit that outputs an signal on the basis of said electrical charge held in said floating diffusion portion, and a light-shielding member disposed so as to cover a side wall of a gate electrode of the charge transfer transistor on the photoelectric conversion portion side.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: January 5, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shunsuke Inoue
  • Publication number: 20090321798
    Abstract: Disclosed are a CMOS sensor and a method of fabricating the CMOS sensor. The method includes the steps of: forming a first USG layer on an entire surface of a semiconductor substrate including a cell area and a scribe area; masking the cell area, and then removing the first USG layer formed on the scribe area; forming a SiN layer on the entire surface of the semiconductor substrate; masking the cell area, and then removing the SiN layer formed on the scribe area; forming a second USG layer on the entire surface of the semiconductor substrate; and masking the scribe area, and then removing the second USG layer formed on the cell area. The USG layer is only formed on the scribe layer without the SiN layer, so that SiN particles do not drop onto the USG layer during the sintering process.
    Type: Application
    Filed: September 3, 2009
    Publication date: December 31, 2009
    Inventor: Dae Hong MIN
  • Patent number: 7638826
    Abstract: An object of the present invention is to prevent a sensitivity difference between pixels. There are disposed plural unit cells each including plural photodiodes 101A and 101B, plural transfer MOSFETs 102A and 102B arranged corresponding to the plural photodiodes, respectively, and a common MOSFET 104 which amplifies and outputs signals read from the plural photodiodes. Each pair within the unit cell, composed of the photodiode and the transfer MOSFET provided corresponding to the photodiode, has translational symmetry with respect to one another. Within the unit cell, there are included a reset MOSFET and selecting MOSFET.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: December 29, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroki Hiyama, Masanori Ogura, Seiichiro Sakai
  • Patent number: 7638825
    Abstract: A pixel cell comprises a photo-conversion device for generating charge and a gate controlled charge storage region for storing photo-generated charge under control of a control gate. The charge storage region can be a single CCD stage having a buried channel to obtain efficient charge transfer and low charge loss. The charge storage region is adjacent to a gate of a transistor. The transistor gate is adjacent to the photo-conversion device and, in conjunction with the control gate, transfers photo-generated charge from the photo-conversion device to the charge storage region.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: December 29, 2009
    Assignee: Aptina Imaging Corporation
    Inventor: Sungkwon C. Hong
  • Patent number: 7635604
    Abstract: A well region of a first conductivity type located in a substrate of the first conductivity type and below about half the channel length of an electrically active portion of a transistor gate is disclosed. The well region is laterally displaced from a charge collection region of a second conductivity type of a pinned photodiode.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: December 22, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Howard E. Rhodes, Inna Patrick, Richard A. Mauritzon
  • Patent number: 7633164
    Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: December 15, 2009
    Assignees: Tohoku University, Advanced Interconnect Materials LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 7629661
    Abstract: In accordance with the invention, a photonic device comprises a semiconductor substrate including at least one circuit component comprising a metal silicide layer and an overlying layer including at least one photoresponsive component. The metal silicide layer is disposed between the circuit component and the photoresponsive component to prevent entry into the circuit component of light that penetrates the photoresponsive component. The silicide layer advantageously reflects the light back into the photoresponsive element. In addition, the overlying layer can include one or more reflective layers to reduce entry of oblique light into the photoresponsive component. In an advantageous embodiment, the substrate comprises single-crystal silicon including one or more insulated gate field effect transistors (IGFETs), and/or capacitors, and the photoresponsive element comprises germanium and/or germanium alloy epitaxially grown from seeds on the silicon.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: December 8, 2009
    Assignee: Noble Peak Vision Corp.
    Inventors: Conor S. Rafferty, Clifford King
  • Patent number: 7626685
    Abstract: A distance measuring sensor may include: a photoelectric conversion region; first and second charge storage regions; first and second trenches; and/or first and second vertical photogates. The photoelectric conversion region may be in a substrate and/or may be doped with a first impurity in order to generate charges in response to received light. The first and second charge storage regions may be in the substrate and/or may be doped with a second impurity in order to collect charges. The first and second trenches may be formed to have depths in the substrate that correspond to the first and second charge storage regions, respectively. The first and second vertical photogates may be respectively in the first and second trenches. A three-dimensional color image sensor may include a plurality of unit pixels. Each unit pixel may include a plurality of color pixels and the distance measuring sensor.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: December 1, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-gu Jin, Yoon-dong Park, Won-joo Kim, Seung-hoon Lee, In-sung Joe
  • Patent number: 7623165
    Abstract: A vertical tri-color sensor having vertically stacked blue, green, and red pixels detects at least blue and green components of incident light by converting the blue and green components to surface plasmons.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: November 24, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Russell W. Gruhlke, Dariusz Burak, Thomas E. Dungan
  • Patent number: 7619249
    Abstract: A method of manufacturing a thin film array panel is provided, which includes: forming a gate line formed on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming an ohmic contact layer on the semiconductor layer; forming a data line and a drain electrode disposed at least on the ohmic contact layer; forming an oxide on the data line; etching the ohmic contact layer using the data line and the drain electrode as an etch mask; and forming a pixel electrode connected to the drain electrode.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: November 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Gab Kim, Sung-Chul Kang, Ho-Min Kang, In-Ho Song, Hee-Hwan Choe
  • Publication number: 20090278180
    Abstract: Provided is a CMOS image sensor with an asymmetric well structure of a source follower. The CMOS image sensor includes: a well disposed in an active region of a substrate; a drive transistor having one terminal connected to a power voltage and a first gate electrode disposed to cross the well; and a select transistor having a drain-source junction between another terminal of the drive transistor and an output node, and a second gate electrode disposed in parallel to the drive transistor. A drain region of the drive transistor and a source region of the select transistor are asymmetrically arranged.
    Type: Application
    Filed: July 17, 2009
    Publication date: November 12, 2009
    Applicant: CROSSTEK CAPITAL, LLC
    Inventor: Hee-Jeong Hong
  • Patent number: 7612392
    Abstract: Example embodiments relate to an image sensor and a fabrication method thereof. An image sensor may include a semiconductor substrate. A charge transfer structure may be formed on the semiconductor substrate. The charge transfer structure may include a gate insulating film that may be formed on a channel region in the semiconductor substrate between a photoelectric conversion region and charge detection region, and a transfer gate electrode that may be formed on the gate insulating film that may have a region doped with a first conductivity type impurity-doped region and a second conductivity type impurity-doped region which may be adjacent to each other.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: November 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Il Jung, Duk-Min Yi
  • Publication number: 20090268031
    Abstract: An electric device enabling the user to visually judge the section of present and amount of a substance absorbing or reflecting ultraviolet radiation. The electric device comprises an image detecting portion (6, 66, 127, 149) for receiving ultraviolet radiation and detecting an image from the received ultraviolet radiation and a display section (2, 32, 42, 52, 62, 82, 92, 102, 126, 147, 172) for displaying ultraviolet radiation information created from the image formed by the detected ultraviolet radiation by the image detecting portion.
    Type: Application
    Filed: September 13, 2006
    Publication date: October 29, 2009
    Inventors: Kazunari Honma, Mamoru Arimoto, Hitoshi Hirano, Satoru Shimada
  • Patent number: 7608874
    Abstract: An array of fully isolated multi-junction complimentary metal-oxide-semiconductor (CMOS) filterless color imager cells is provided, together with an associated fabrication method. The method provides a bulk silicon (Si) substrate. A plurality of color imager cells are formed, either in the Si substrate, or in a single epitaxial Si layer formed over the substrate. Each color imager cell includes a photodiode set with a first, second, and third photodiode formed as a stacked multi-junction structure. A U-shaped (in cross-section) well liner, fully isolates the photodiode set from adjacent photodiode sets in the array. For example, each photodiode is formed from a p doped Si layer physically interfaced to a first wall. A well bottom physically interfaces to the first wall, and the p doped Si layer of the third, bottom-most, photodiode is part of the well bottom. Then, the photodiode sets may be formed from an n/p/n/p/n/p or n/p/p?/p/p?/p layered structure.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: October 27, 2009
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Douglas J. Tweet, Sheng Teng Hsu
  • Patent number: 7608869
    Abstract: A thin film transistor and a method of fabricating the same are disclosed. The method includes: sequentially depositing an amorphous silicon layer, a capping layer, and a metal catalyst layer; annealing the entire layer to crystallize the amorphous silicon layer into a polysilicon layer; removing the capping layer; and, when the capping layer is perfectly removed to make a contact angle of the polysilicon layer within a range of about 40 to about 80°, forming a semiconductor layer using the polysilicon layer.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: October 27, 2009
    Assignee: Samsung Mobile Display Co., Ltd.
    Inventors: Tae-Hoon Yang, Ki-Yong Lee, Jin-Wook Seo, Byoung-Keon Park
  • Patent number: 7608870
    Abstract: A pixel cell including a substrate having a top surface. A photo-conversion device is at a surface of the substrate and a trench is in the substrate adjacent the photo-conversion device. The trench has sidewalls and a bottom. At least one sidewall is angled less than approximately 85 degrees from the plane of the top surface of the substrate.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: October 27, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Bryan G. Cole, Howard E. Rhodes
  • Patent number: 7608903
    Abstract: An imager pixel utilizing a silicon-on-insulator substrate, a photodiode in said substrate below the buried oxide, and a dual contact to said photodiode and methods of forming said imager pixel. The photodiode has an increased fill factor due to its increased size relative to the pixel.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: October 27, 2009
    Assignee: Aptina Imaging Corporation
    Inventor: Chandra Mouli