With Particular Electrode Configuration Patents (Class 257/448)
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Patent number: 7585696Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.Type: GrantFiled: August 21, 2007Date of Patent: September 8, 2009Assignee: Dongbu Hitek Co., Ltd.Inventor: Seoung Hyun Kim
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Patent number: 7586171Abstract: An organic electronic device includes electronic components within an array. In one embodiment, the organic electronic device includes a substrate and a first conductive member overlying the substrate and lying at least partly within the array. The first conductive member is at least part of a first power transmission line. The organic electronic device further includes a second conductive member overlying the substrate and lying at least partly within the array. The second conductive member is at least part of a first electrode and is electrically connected to the first conductive member. In another embodiment, an organic active layer has at least a portion lying between the first and second conductive members. In yet another embodiment, a process for using an organic electronic device including an array of radiation-emitting components allows radiation to be emitted from the array at an intensity of at least 1100 cd/m2.Type: GrantFiled: December 29, 2004Date of Patent: September 8, 2009Inventors: Yong Cao, Zhining Chen, Runguang Sun, Jian Wang, Gang Yu
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Patent number: 7582876Abstract: Electronics devices like X-ray detectors with an array of pixels are combined (binned) into binning blocks of m×n pixels. Available read-out lines of the device are all connected to different binning blocks, such that up to m binning blocks are addressed simultaneously in the vertical direction when m×n binning is used. In this case, the output signals from the m vertically arranged blocks are distributed over the m read-out columns present in the m×n locks. Row address lines together with diagonal address lines and a simple activation logic provide the required versatile addressing of the pixels.Type: GrantFiled: May 2, 2005Date of Patent: September 1, 2009Assignee: Koninklijke Philips Electronics N.V.Inventors: Michael Overdick, Walter Ruetten
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Patent number: 7576369Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.Type: GrantFiled: October 25, 2005Date of Patent: August 18, 2009Assignee: UDT Sensors, Inc.Inventors: Peter Steven Bui, Narayan Dass Taneja
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Publication number: 20090194795Abstract: A first oxide film (102) is formed on a semiconductor substrate (101). A first nitride film (103) is formed on first gate electrode formation regions of the first oxide film (102). A plurality of first gate electrodes (104) are provided on the first nitride film (103) so as to be spaced apart from one another with a predetermined distance therebetween. A second oxide film (105) covers upper part and side walls of each of the first gate electrodes (104). A sidewall spacer (106) of a third oxide film is buried in an overhang portion generated on each side wall of each of the first gate electrodes (104) covered by the second oxide film (105). A second nitride film (107) covers the second oxide film (105), the sidewall spacer (106) and part of the first oxide film (102) located between the first gate electrodes (104). A plurality of second gate electrodes (108) are formed on at least part of the second nitride film (107) located between adjacent two of the first gate electrodes (104).Type: ApplicationFiled: December 6, 2006Publication date: August 6, 2009Inventors: Naoto Niisoe, Kazuhisa Hirata, Tohru Yamada
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Publication number: 20090194151Abstract: The present invention is directed to a semiconductor substrate having at least an electrode formed thereon, in which the electrode has a multilayer structure including two or more layers, of the multilayer structure, at least a first electrode layer directly bonded to the semiconductor substrate contains at least silver and a glass frit, and contains, as an additive, at least one of oxides of Ti, Bi, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Fe, Co, Ni, Si, Al, Ge, Sn, Pb, and Zn, and, of an electrode layer formed on the first electrode layer, at least an uppermost electrode layer to be bonded to a wire contains at least silver and a glass frit and does not contain the additive. This makes it possible to form, on a semiconductor substrate, an electrode adhered to the semiconductor substrate with sufficient adhesive strength and adhered to a wire via solder with sufficient adhesive strength by lowering both contact resistance and interconnect resistance.Type: ApplicationFiled: July 12, 2007Publication date: August 6, 2009Applicants: Shin-Etsu Handotai Co., Ltd., Shin-Etsu Chemical Co., Ltd.Inventors: Naoki Ishikawa, Hiroyuki Ohtsuka, Takenori Watabe, Satoyuki Ojima, Toyohiro Ueguri
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Patent number: 7566899Abstract: A backplane circuit includes an array of organic thin-film transistors (OTFTs), each OTFT including a source contact, a drain contact, and an organic semiconductor region extending between the source and drain contacts. The drain contacts in each row are connected to an address line. The source and drain contacts and the address lines are fabricated using a multi-layer structure including a relatively thick base portion formed of a relatively inexpensive metal (e.g., aluminum or copper), and a relatively thin contact layer formed of a high work function, low oxidation metal (e.g., gold) that exhibits good electrical contact to the organic semiconductor, is formed opposite at least one external surface of the base, and is located at least partially in an interface region where the organic semiconductor contacts an underlying dielectric layer.Type: GrantFiled: December 21, 2005Date of Patent: July 28, 2009Assignee: Palo Alto Research Center IncorporatedInventors: Michael L. Chabinyc, Rene A Lujan, Ana Claudia Arias, Jackson H. Ho
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Patent number: 7566943Abstract: A photoelectric conversion device including a photoelectric conversion part including a pair of electrodes and a photoelectric conversion layer provided between the pair of electrodes, wherein the photoelectric conversion part further includes a first charge blocking layer for reducing an injection of a charge into the photoelectric conversion layer from one of the pair of electrodes when a voltage is applied between the pair of electrodes, the first charge blocking layer being provided between the one of the pair of electrodes and the photoelectric conversion layer; and the first charge blocking layer has a relative dielectric constant larger than a relative dielectric constant of the photoelectric conversion layer.Type: GrantFiled: March 6, 2007Date of Patent: July 28, 2009Assignee: FUJIFILM CorporationInventor: Daisuke Yokoyama
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Publication number: 20090174022Abstract: An hyperspectral imaging device comprising semiconductor nanocrystals is provided.Type: ApplicationFiled: September 22, 2008Publication date: July 9, 2009Inventors: Seth Coe-Sullivan, Gregory V. Moeller
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Patent number: 7557336Abstract: When light is made incident into antenna layers 11a, 11b, and 11c of a photodetector 1, specific wavelength components of light contained in the incident light combine with surface plasmons of the antenna layers 11a, 11b, and 11c, and surface plasmon resonance occurs. Thereby, near-field lights are outputted from through-holes 13 of the antenna layers 11a, 11b, and 11c. The near-field light outputted from each through-hole 13 reaches a light absorbing layer 4 via light receiving surfaces 4a, 4b, and 4c. The light absorbing layer 4 generates a charge of an amount according to the amount of received light. Since cycle intervals ?a, ?b, and ?c of convex portions 12 in the antenna layers 11a, 11b, and 11c are different from each other, the wavelength component of light that combines with a surface plasmon differs in each of the antenna layers 11a, 11b, and 11c. Consequently, a plurality of wavelength components of light can be detected.Type: GrantFiled: May 9, 2007Date of Patent: July 7, 2009Assignee: Hamamatsu Photonics K.K.Inventors: Minoru Niigaki, Toru Hirohata, Hiroyasu Fujiwara, Akira Higuchi
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Publication number: 20090166514Abstract: The uppermost metallic wiring layer in light-blocking layers constituted by multilevel metallic wiring that prevents light from impinging on areas other than the light-receiving area of a photodiode in each picture cell is used as a measurement electrode to be directly contacted with a specimen to measure electrical signals. Furthermore, in each picture cell including a circuit for reading out electrical signals collected through the measurement electrode, another circuit for reading out electrical signals generated by the photodiode is provided in an independent or shared form. This configuration enables the photodiode for optical measurements and the measurement electrode for electrical measurements to be provided in every picture cell.Type: ApplicationFiled: April 12, 2007Publication date: July 2, 2009Applicant: NATIONAL UNIVERSITY CORPORATION NARA INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Takashi Tokuda, Jun Ohta
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Patent number: 7550761Abstract: Systems and methodologies are provided for forming a diode component integral with a memory cell to facilitate programming arrays of memory cells created therefrom. Such a diode component can be part of a PN junction of memory cell having a passive and active layer with asymmetric semiconducting properties. Such an arrangement reduces a number of transistor-type voltage controls and associated power consumption, while enabling individual memory cell programming as part of a passive array. Moreover, the system provides for an efficient placement of memory cells on a wafer surface, and increases an amount of die space available for circuit design.Type: GrantFiled: December 26, 2006Date of Patent: June 23, 2009Assignee: Spansion LLCInventors: Juri H. Krieger, Stuart Spitzer
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Patent number: 7550731Abstract: A conversion apparatus includes a pixel region, on a substrate, including a plurality of pixels arranged in a matrix, with each pixel having a conversion element that converts radiation into electric charges, and a switching element. The switching element has a structure having a gate electrode, a first insulating layer, a second insulating layer, and a semiconductor layer from the substrate side in this order. The conversion element has an MIS-type structure of a bottom electrode arranged on an insulating layer extending from the first insulating layer of the switching element and being vertically higher than the gate electrode of the switching element, an insulating layer which is formed of the same layer as the second insulating layer of the switching element, and a semiconductor layer which is formed of the same layer as the semiconductor layer of the switching element from the substrate side in this order.Type: GrantFiled: May 18, 2007Date of Patent: June 23, 2009Assignee: Canon Kabushiki KaishaInventors: Minoru Watanabe, Chiori Mochizuki, Takamasa Ishii
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Patent number: 7551358Abstract: In a camera module having an array lens, a first lens group has at least two lenses. A second lens group has a plurality of lenses corresponding to the lenses of the first lens group, the second lens group stacked below the first lens group and interposing a spacer part therebetween. An image sensor has an imaging region where light passing through the first and second lens groups is imaged. Also, a shielding unit shields portions excluding apertures of the lenses of the first and second lens groups, the shielding unit disposed between the first and second lens groups. The camera module has a lower optical system along an optical axis for smaller size, keeps light refracted from an adjacent lens from affecting an image, blocks leakage of light for imaging and increases definition of the image through signal processing.Type: GrantFiled: July 3, 2007Date of Patent: June 23, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Sang Hyuck Lee, Ho Seop Jeong, Seok Cheon Lee, Ho Sik You, Sung Hyun Kim
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Publication number: 20090152664Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.Type: ApplicationFiled: April 18, 2008Publication date: June 18, 2009Inventors: Ethan Jacob Dukenfield Klem, Dean Delehanty MacNeil, Gerasimos Konstantatos, Jiang Tang, Michael Charles Brading, Hui Tian, Edward Hartley Sargent
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Publication number: 20090146178Abstract: A photodiode in which increased sensitivity and speed are balanced. The photodiode includes: a semiconductor substrate; a plurality of active regions formed on the substrate by selective epitaxial growth; and a comb electrode provided for each of the plurality of active regions and in communication with each other to electrically connect the active regions together.Type: ApplicationFiled: December 5, 2007Publication date: June 11, 2009Applicants: FUJIFILM CORPORATION, MASSACHUSETTS INSTITUTE OF TECHNOLOGYInventors: Yukiya MIYACHI, Wojciech P. GIZIEWICZ, Jurgen MICHEL, Lionel C. KIMERLING
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Publication number: 20090134385Abstract: A method for producing an organic line detector for applications in the field of computer tomography, includes the following steps: selective etching is carried out on an indium-tin-oxide (ITO) applied to a substrate; two separate ITO strips are formed by the etching; at least one structured mushroom photosensitive resist is applied between the ITO strips; at least one organic perforated conductor is applied to the mushroom photosensitive resist and the ITO strips, only adhering to the ITO strips; at least one organic semiconductor is applied to the layer of the organic perforated conductor, only adhering to the organic perforated conductor and not to the mushroom photosensitive resist; and at least two negative cup-type electrodes are applied to the organic semiconductor, the cup-type electrodes being separate from each other.Type: ApplicationFiled: June 12, 2006Publication date: May 28, 2009Applicant: Siemens AktiengesellschaftInventor: Christoph Brabec
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Publication number: 20090134485Abstract: An image sensor includes a semiconductor substrate including a pixel region and a peripheral circuit region; interlayer insulating films including metal wires arranged on the pixel region and the peripheral circuit region; and a photodiode and an upper electrode disposed on the interlayer insulating film of the pixel region. Further, the image sensor includes a protective layer disposed on the semiconductor substrate including the upper electrode and the interlayer insulating film of the peripheral circuit region and having a sloping portion in a region corresponding to the sidewall of the photodiode; via holes disposed on the protective layer so as to selectively expose the upper electrode and the metal wires of the peripheral circuit region; and upper wiring disposed on the protective layer including the via holes.Type: ApplicationFiled: October 12, 2008Publication date: May 28, 2009Inventor: Kang-Hyun Lee
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Patent number: 7531379Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.Type: GrantFiled: September 12, 2003Date of Patent: May 12, 2009Assignee: Micron Technology, Inc.Inventors: Howard Rhodes, Jeff Mckee
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Patent number: 7531885Abstract: A primary object of the present invention is to provide a photoelectric conversion apparatus with less leak current in a floating diffusion region. In order to obtain the above object, a photoelectric conversion apparatus according to the present invention includes a photodiode for converting light into a signal charge, a first semiconductor region having a first conductivity type, a floating diffusion region formed from a second semiconductor region having a second conductivity type for converting the signal charge generated by the photodiode into a signal voltage, the second semiconductor region being formed in the first semiconductor region, and an electrode formed above the first semiconductor region through an insulating film and having an effect of increasing a concentration of majority carriers in the first semiconductor region, in which the electrode is not formed above a depletion region formed from the second semiconductor region.Type: GrantFiled: December 7, 2006Date of Patent: May 12, 2009Assignee: Canon Kabushiki KaishaInventors: Akira Okita, Katsuhito Sakurai, Hiroki Hiyama, Hideaki Takada
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Publication number: 20090108391Abstract: A solid-state imaging device comprises an imaging region, a peripheral circuit region formed in an outer peripheral portion of the imaging region, a first conductivity type semiconductor substrate having the imaging region and the peripheral circuit region on a main surface thereof, a second conductivity type first semiconductor layer formed in the semiconductor substrate, a first conductivity type second semiconductor layer formed in first semiconductor layer, a through electrode formed in a through hole penetrating through the semiconductor substrate in a thickness direction of the semiconductor substrate, and a pad portion formed on the semiconductor substrate and connected to the through electrode. The through hole penetrates through a first conductivity type region of the semiconductor substrate.Type: ApplicationFiled: October 30, 2008Publication date: April 30, 2009Inventor: Toshihiro KURIYAMA
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Patent number: 7525169Abstract: The invention provides an LCD panel with main slits corresponding to alignment protrusions. The gate lines are shielded by the electrode portion and do not overlap the main slits. Because the gate line and the major slits do not overlap, the liquid crystal molecule arrangement of the liquid crystal layer is not affected by the operating voltage of the gate line.Type: GrantFiled: March 30, 2007Date of Patent: April 28, 2009Assignee: Au Optronics Corp.Inventors: Shih-Chyuan Fan Jiang, Ching-Huan Lin, Chih-Ming Chang
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Patent number: 7525168Abstract: A MOS or CMOS based active pixel sensor designed for operation with zero or close to zero potential across the pixel photodiodes to minimize or eliminate dark current. In preferred embodiments the pixel photodiodes are produced with a continuous pin or nip photodiode layer laid down over pixel electrodes of the sensor. In this preferred embodiment, the voltage potential across the pixel photodiode structures is maintained constant and close to zero, preferably less than 1.0 volts. This preferred embodiment enables the photodiode to be operated at a constant bias condition during the charge detection cycle. Setting this constant bias condition close to zero (near “short circuit” condition) assures that dark current is substantially zero.Type: GrantFiled: February 22, 2008Date of Patent: April 28, 2009Assignee: e-Phocus, Inc.Inventor: Tzu-Chiang Hsieh
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Patent number: 7508573Abstract: A structure of an optical switch makes the optical switch capable of receiving broadband signals. And the manufacturing procedure is simplified.Type: GrantFiled: May 25, 2006Date of Patent: March 24, 2009Assignee: Atomic Energy Council - Institute of Nuclear Energy ResearchInventors: Chih-Hung Wu, Kai-Sheng Chang, Hwa-Yuh Shih, Yen-Chang Tzeng
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Patent number: 7492404Abstract: An image sensor includes a substrate; a plurality of pixels on the substrate, one or more of the pixels comprises (i) first and second charge-storage regions having at least one photosensitive area; (ii) a lateral overflow drain; (iii) a first lateral overflow gate adjacent the first charge-storage regions that passes substantially all charges from the first charge-storage region to the lateral overflow drain; and (iv) a second lateral gate adjacent the second charge-storage region that passes excess photo-generated charge into the lateral overflow drain for blooming control.Type: GrantFiled: February 7, 2005Date of Patent: February 17, 2009Assignee: Eastman Kodak CompanyInventors: Eric G. Stevens, John P. Shepherd, David N. Nichols
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Patent number: 7476841Abstract: A photodetector is provided, which has the capability of preventing a reduction in dynamic range for a signal light even under a plenty of environmental light to stably obtain a received light output. This photodetector has an accumulation electrode and a holding electrode, which are formed on a photoelectric converting portion through an insulating layer, and a control unit for controlling timings of applying voltages to these electrodes and polarities of the voltages. One of electrons and holes generated in the photoelectric converting portion is accumulated in an accumulation region formed by applying the voltage to the accumulation electrode, and the other is accumulated in a holding region formed by applying the voltage to the holding electrode. Then, the electrons and holes accumulated in the accumulation region and the holding region are recombined, so that remaining electrons or holes not recombined are output.Type: GrantFiled: December 28, 2005Date of Patent: January 13, 2009Assignee: Matsushita Electric Works, Ltd.Inventors: Yusuke Hashimoto, Yuji Takada
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Publication number: 20080315121Abstract: The invention relates to a radiation detector, a method of manufacturing a radiation detector and a lithographic apparatus comprising a radiation detector. The radiation detector has a radiation-sensitive surface. The radiation-sensitive surface is sensitive for radiation with a wavelength between 10-200 nm. The radiation detector has a silicon substrate, a dopant layer, a first electrode and a second electrode. The silicon substrate is provided in a surface area at a first surface side with doping profile of a certain conduction type. The dopant layer is provided on the first surface side of the silicon substrate. The dopant layer has a first layer of dopant material and a second layer. The second layer is a diffusion layer which is in contact with the surface area at the first surface side of the silicon substrate. The first electrode is connected to dopant layer. The second electrode is connected to the Silicon substrate.Type: ApplicationFiled: June 25, 2007Publication date: December 25, 2008Applicant: ASML Netherlands B.V.Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Josephus Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Scholtes
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Patent number: 7453132Abstract: A germanium on silicon waveguide photodetector disposed on a silicon on insulator (SOI) substrate. The photodetector is incorporated into a section of a planar silicon waveguide on the substrate. The photodetector generates an electric current as an infrared optical signal travels through the photodetector.Type: GrantFiled: June 19, 2003Date of Patent: November 18, 2008Assignee: Luxtera Inc.Inventors: Lawrence C. Gunn, III, Thierry J. Pinguet, Maxime Jean Rattier, Giovanni Capellini
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Patent number: 7449732Abstract: The substrate with electrodes is formed of a transparent material onto which is deposited a film (1) of a transparent conductive material of thickness e1 and of refractive index n1, said film being structured to form a set of electrodes (1a) whose contours (8) delimit insulating spaces (3), wherein the insulating spaces (3) are filled with a transparent dielectric material of thickness e2 and of refractive index n2 so that the respective thicknesses of the conductive material and the dielectric material are inversely proportional to the values of the refractive indices of said materials and said dielectric material forms neither depressions nor beads at the contour (8) of the electrodes. A hardcoating layer (7) may be disposed between the substrate (5) and the electrodes and a protective film (9) added. The substrate with electrodes is obtained by UV irradiation through a single mask.Type: GrantFiled: March 5, 2004Date of Patent: November 11, 2008Assignee: Asulab S.A.Inventors: Joachim Grupp, Gian-Carlo Poli, Pierre-Yves Baroni, Estelle Wagner, Patrik Hoffmann
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Patent number: 7446353Abstract: A solid-state imaging apparatus includes a photoelectric conversion section generating a charge by photoelectric conversion; and a charge transfer section having first and second transfer electrodes arranged in parallel with each other in an output direction of a charge generated by the photoelectric conversion section and repeatedly transferring the charge between a semiconductor region underneath the first transfer electrode and a semiconductor region underneath the second transfer electrode obliquely to an array direction of the first and second transfer electrodes to output the charge.Type: GrantFiled: February 9, 2005Date of Patent: November 4, 2008Assignee: NEC Electronics CorporationInventor: Eiji Matsuyama
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Publication number: 20080237770Abstract: A radiation detector that includes a charge conversion layer, a substrate, an electrode layer, an intermediary layer and wiring is provided. The substrate includes a lower electrode portion that collects charge generated by the charge conversion layer. The electrode layer includes an upper electrode portion and an extended electrode portion. The upper electrode portion is laminated on the charge conversion layer. The extended electrode portion extends from the upper electrode portion down a side face of the charge conversion layer to a region on the substrate at which the charge conversion layer is not present. The intermediary layer is formed from between the charge conversion layer and the upper electrode portion to between the extended electrode portion and the substrate. The wiring is electrically connected with the extended electrode portion at the region on the substrate at which the charge conversion layer is not present.Type: ApplicationFiled: January 30, 2008Publication date: October 2, 2008Applicant: FUJIFILM CORPORATIONInventor: Nobuyuki IWAZAKI
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Publication number: 20080230864Abstract: Disclosed is an image sensor which includes a plurality of pixel patterns formed on corresponding metal interconnections of an interlayer dielectric and a dummy pixel pattern formed between adjacent pixel patterns of the plurality of the pixel patterns. The dummy pixel patterns are not formed connected to the metal interconnections. The dummy pixel patterns can be formed spaced a distance apart from the plurality of pixel patterns such that air gaps form between the dummy pixel patterns and the pixel patterns in an intrinsic layer that is formed on the dummy pixel pattern and the plurality of pixel patterns.Type: ApplicationFiled: August 21, 2007Publication date: September 25, 2008Inventor: MIN HYUNG LEE
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Patent number: 7423254Abstract: An optical device for sensing an incident optical wave within a wavelength range includes a first array and a second array of electrodes superposed on a substrate, and a sensor connected to the contacts. The arrays are interdigitated. Each array includes its own parameters: contact width, contact thickness, groove width, and a groove dielectric constant. A structure associated with the arrays resonantly couples the incident wave and a local electromagnetic resonance or hybrid mode including at least a surface plasmon cavity mode (CM). For coupling the CM, an aspect ratio of contact thickness to spacing between electrodes is at least 1. A preferred structure for coupling a hybrid mode for high bandwidth and responsivity includes a higher dielectric constant in alternating grooves. The substrate may include silicon, including silicon-on-insulator (SOI). An SOI device having a alternating grooves with a higher dielectric, e.g., silicon oxide, provides 0.25 A/W and 30 GHz bandwidth.Type: GrantFiled: March 22, 2005Date of Patent: September 9, 2008Assignee: Research Foundation of the City University of New YorkInventors: Mark Arend, David Crouse
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Photoconductor-on-active-pixel (POAP) sensor utilizing a multi-layered radiation absorbing structure
Patent number: 7411233Abstract: An active pixel sensor for producing images from electron-hole producing radiation includes a crystalline semiconductor substrate having an array of electrically conductive diffusion regions, an interlayer dielectric (ILD) layer formed over the crystalline semiconductor substrate and comprising an array of contact electrodes, and an interconnect structure formed over the ILD layer, wherein the interconnect structure includes at least one layer comprising an array of conductive vias. An array of patterned metal pads is formed over the interconnect structure and are electrically connected to an array of charge collecting pixel electrodes. A radiation absorbing structure includes a photoconductive N-I-B-P photodiode layer formed over the interconnect structure, and a surface electrode layer establishes an electrical field across the radiation absorbing structure and between the surface electrode layer and each of the array of charge collecting pixel electrodes.Type: GrantFiled: August 27, 2002Date of Patent: August 12, 2008Assignee: e-Phocus, IncInventors: Calvin Chao, Tzu-Chiang Hsieh, Michael Engelmann, Milam Pender -
Publication number: 20080169524Abstract: A method for forming an image sensor is provided. The method includes providing a semiconductor substrate having a pixel region and a peripheral circuit region, forming a photoelectric transformation section at the semiconductor substrate of the pixel region, forming a plurality of interlayer dielectrics over the semiconductor substrate with interconnections interposed therebetween, forming a passivation layer, partially patterning the passivation layer at the peripheral circuit region to form a via hole exposing the interconnection and removing the passivation layer and the underlying interlayer dielectric at the pixel region. The method further includes forming a conductive layer to fill the via hole and etching the conductive layer to remove the conductive layer at the pixel region and form a via plug and a conductive pad at the peripheral circuit region. The via plug fills the via hole and the conductive pad protrudes outwardly from the via hole.Type: ApplicationFiled: March 13, 2008Publication date: July 17, 2008Inventor: KI-HONG KIM
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Patent number: 7400023Abstract: In a photoelectric converting film stack type solid-state image pickup device, a plurality of photoelectric converting film are stacked on a semiconductor substrate in which a signal readout circuit is formed, each of the photoelectric converting films is sandwiched between a common electrode film and pixel electrode films corresponding to respective pixels, and photo-charges generated in the photoelectric converting films are taken out through the pixel electrode films. In the solid-state image pickup device, a common electrode film for a first photoelectric converting film is used also as a common electrode film for a second photoelectric converting film, the first photoelectric converting film is stacked below the common electrode film, and the second photoelectric converting film is stacked above the common electrode film.Type: GrantFiled: March 18, 2005Date of Patent: July 15, 2008Assignee: FUJIFILM CorporationInventors: Mikio Watanabe, Tomoki Inoue, Masafumi Inuiya
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Patent number: 7397066Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.Type: GrantFiled: August 19, 2004Date of Patent: July 8, 2008Assignee: Micron Technology, Inc.Inventor: Steven D. Oliver
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Publication number: 20080150070Abstract: Provided is an image sensor IC in which a conductive material transmissive to light, which is fixed to the same potential, is formed under a protection film in a plurality of pixel regions. The conductive material transmissive to light for potential fixation is formed in each pixel, has a narrow and linear shape, and is electrically connected so as to hold the same potential as a potential of a silicon substrate. Accordingly, a potential of each of the regions which become a base at the time of forming the protective film is kept constant in an entire pixel region, thereby obtaining a uniform thickness and quality of the protective film. As a result, variation in photoelectric conversion characteristic of the pixels can be eliminated.Type: ApplicationFiled: December 19, 2007Publication date: June 26, 2008Inventor: Hiroaki Takasu
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Publication number: 20080128848Abstract: A solid-state imaging device includes a semiconductor substrate having a foreside provided with an imaging area and an electrode pad, the imaging area having an array of optical sensors, the electrode pad being disposed around a periphery of the imaging area; a transparent substrate joined to the foreside of the semiconductor substrate with a sealant therebetween; underside wiring that extends through the semiconductor substrate from the electrode pad to an underside of the semiconductor substrate; and a protective film composed of an inorganic insulating material and interposed between the semiconductor substrate and the sealant, the protective film covering at least the electrode pad.Type: ApplicationFiled: November 26, 2007Publication date: June 5, 2008Applicant: SONY CORPORATIONInventors: Masami Suzuki, Yoshimichi Harada, Yoshihiro Nabe, Yuji Takaoka, Masaaki Takizawa, Chiaki Sakai
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Patent number: 7378717Abstract: An optical sensor and method for forming the same. The optical sensor structure includes (a) a semiconductor substrate, (b) first, second, third, fourth, fifth, and sixth electrodes and (c) first, second, and third semiconducting regions. The first and fourth electrodes are at a first depth. The second and fifth electrodes are at a second depth. The third and sixth electrodes are at a third depth. The first depth is greater than the second depth, and the second depth is greater than the third depth. The first, second, and third semiconducting regions are disposed between and in contact with the first and fourth electrodes, second and fifth electrodes, and third and sixth electrodes, respectively. The first, second, and third semiconducting regions are in contact with each other.Type: GrantFiled: November 15, 2005Date of Patent: May 27, 2008Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Steven J. Holmes, David V. Horak, Charles W. Koburger, III
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Publication number: 20080116537Abstract: A CMOS image sensor array and method of fabrication. The CMOS imager sensor array comprises a substrate; an array of light receiving pixel structures formed above the substrate, the array having formed therein “m” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer; a dense logic wiring region formed adjacent to the array of light receiving pixel structures having “n” levels of conductive structures, each level formed in a corresponding interlevel dielectric material layer, where n>m. A microlens array having microlenses and color filters formed above the interlevel dielectric material layer, a microlens and respective color filter in alignment with a respective light receiving structure formed at a surface of the substrate. A top surface of the interlevel dielectric material layer beneath the microlens array is recessed from a top surface of the interlevel dielectric material layers of the dense logic wiring region.Type: ApplicationFiled: November 17, 2006Publication date: May 22, 2008Inventors: James W. Adkisson, Jeffrey P. Gambino, Zhong-Xiang He, Mark D. Jaffe, Robert K. Leidy, Stephen E. Luce, Richard J. Rassel, Edmund J. Sprogis
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Publication number: 20080105943Abstract: The invention relates to an organic-based electronic component, especially a component with reduced pixel crosstalk. According to the invention, the crosstalk is reduced by a grid electrode.Type: ApplicationFiled: December 5, 2005Publication date: May 8, 2008Inventors: Jens Furst, Debora Henseler, Hagen Klausmann
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Patent number: 7352043Abstract: The invention concerns a matrix structure of multispectral detectors (200) comprising: a superimposition of several layers of semiconductor material separated by layers of dielectric material transparent to a light to be detected, said superimposition offering a face for receiving the light to be detected, said superimposition of layers of semiconductor material being spread out in picture elements or pixels, each part of the layer of semiconductor material corresponding to a pixel comprising a light detection element delivering electrical charges in response to the light received by said detection element, means for collecting the electrical charges delivered by each light detection element, said collection means being electrically connected to electrical connection means (153) and comprising conductive walls (151).Type: GrantFiled: December 17, 2003Date of Patent: April 1, 2008Assignee: Commissariat a l'Energie AtomiqueInventor: Pierre Gidon
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Patent number: 7342270Abstract: A solid state imaging system includes a plurality of amplifying units that are placed one by one for every pair of photoelectric conversion areas. Each amplifying unit is placed side-by-side in one direction of a two-dimensional matrix for outputting a pixel signal according to a photogenerated charge retained in a floating diffusion area. A plurality of transfer controlling elements are placed in pairs for each pair of the photoelectric conversion areas for controlling the transfer of the photogenerated charge by changing a potential barrier of a photogenerated charge transfer route between each of the accumulation wells in the pair of photoelectric conversion areas and the corresponding floating diffusion area. A plurality of transfer gate lines are connected to each of the transfer controlling elements in the plural photoelectric conversion areas that are aligned in the other direction of the two-dimensional matrix.Type: GrantFiled: August 18, 2005Date of Patent: March 11, 2008Assignee: Seiko Epson CorporationInventor: Kazunobu Kuwazawa
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Patent number: 7339248Abstract: The invention relates to a self-adjusting serial connection of thin layers and a method for the production thereof. The invention is characterized in that electrically conducting conductor tracks (20) are applied to a substrate (10), whereupon several main deposit layers (30, 40, 50) of conducting, semi-conducting or insulating materials are applied to the substrate. The application of the layers is carried out at various angles of incidence to the surface of the substrate.Type: GrantFiled: March 18, 2003Date of Patent: March 4, 2008Assignee: Scheuten GlasgroepInventor: Volker Geyer
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Patent number: 7301214Abstract: In the component of a radiation detector, an upper end face of a pad formation protrusion provided on an upper surface of an MID substrate is equal in height to an upper surface of a photodiode array, first pads are provided on upper surfaces of photodiodes arranged in the photodiode array, respectively, second pads are provided on the upper end face of the pad formation protrusion, a bonding wire is provided between one of the first pads and corresponding one of the second pads, a wiring pattern is provided on the upper surface of the MID substrate, first terminals as many as the second pads and one second terminal are provided on a lower surface of the MID substrate, the second pads and the first terminals are electrically connected to one another in a one-to-one correspondence, and the wiring pattern is electrically connected to the second terminal.Type: GrantFiled: July 20, 2004Date of Patent: November 27, 2007Assignee: Nihon Kessho Kogaku Co., Ltd.Inventors: Shigenori Sekine, Toshikazu Yanada
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Patent number: 7288426Abstract: The invention relates to a method for the production of automatically adjusting serial connections of thick and/or thin layers. The method comprises the following process steps: applying electrically conductive strip conductors (20) to a substrate (10); applying a first main layer (30) at an angle a relative to the surface of the substrate; applying a second main layer which is made of granular-shaped particles (40) to the substrate (10); applying several layers in conjunction with material and process-dependent processing steps; applying a third main layer (70) at an angle ? relative to the surface of the substrate; and applying a fourth main layer (80) at an angle y relative to the surface of the substrate.Type: GrantFiled: March 18, 2003Date of Patent: October 30, 2007Assignee: Scheuten GlasgroepInventor: Volker Geyer
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Publication number: 20070246789Abstract: A thermionic flat electron emitter has an emitter arrangement with an emitter plate having slits therein that produce serpentine current paths. The emitter arrangement has a structure that, in operation, causes the electron density of the emitted electrons to be lower in the central region of the emitter plate than in a region adjoining the central region.Type: ApplicationFiled: April 19, 2007Publication date: October 25, 2007Inventors: Joerg Freudenberger, Peter Schardt, Frank Sprenger
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Patent number: 7282754Abstract: A unit pixel for use in a CMOS image sensor is employed to minimize a contact resistance between adjacent unit pixels by employing a supplementary p-well or modifying a unit pixel layout. The unit pixel having a photodiode, a transfer transistor, a reset transistor, a drive transistor and a selection transistor, the unit pixel including: a first active area having a protrusive portion thereof where the transfer transistor, the reset transistor and a VDD contact are formed, in which the VDD contact is formed apart from the photodiode in an adjacent unit pixel by a predetermined distance, to thereby minimize a leakage current, the first active area being connected to the photodiode; and a second active area where the drive transistor, the selection transistor and an output contact are formed, wherein the second active area is perpendicularly connected to the first active area.Type: GrantFiled: December 23, 2003Date of Patent: October 16, 2007Assignee: Magnachip Semiconductor, Ltd.Inventor: Won-Ho Lee
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Patent number: 7265432Abstract: A method for fabricating a solid state imaging device comprising photoelectric conversion sections and charge transfer sections having single-layered charge transfer electrodes for transferring charges generated in the photoelectric conversion sections, the method including formation of the charge transfer electrodes, wherein the formation of the charge transfer electrodes comprises the steps of: forming a conductive film on a surface of a semiconductor substrate having formed thereon a gate oxide film; forming a mask pattern on the conductive film; forming interelectrode spacings in the conductive film using the mask pattern as a mask to make a patterned conductive film; and forming an insulating film to fill in the interelectrode spacings by vacuum chemical vapor deposition.Type: GrantFiled: April 29, 2004Date of Patent: September 4, 2007Assignee: Fujifilm CorporationInventor: Hiroaki Takao